1 /* 2 * Driver for Atmel AT91 / AT32 Serial ports 3 * Copyright (C) 2003 Rick Bronson 4 * 5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. 6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 7 * 8 * DMA support added by Chip Coldwell. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 #include <linux/module.h> 26 #include <linux/tty.h> 27 #include <linux/ioport.h> 28 #include <linux/slab.h> 29 #include <linux/init.h> 30 #include <linux/serial.h> 31 #include <linux/clk.h> 32 #include <linux/console.h> 33 #include <linux/sysrq.h> 34 #include <linux/tty_flip.h> 35 #include <linux/platform_device.h> 36 #include <linux/of.h> 37 #include <linux/of_device.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/atmel_pdc.h> 40 #include <linux/atmel_serial.h> 41 #include <linux/uaccess.h> 42 #include <linux/pinctrl/consumer.h> 43 #include <linux/platform_data/atmel.h> 44 45 #include <asm/io.h> 46 #include <asm/ioctls.h> 47 48 #ifdef CONFIG_ARM 49 #include <mach/cpu.h> 50 #include <asm/gpio.h> 51 #endif 52 53 #define PDC_BUFFER_SIZE 512 54 /* Revisit: We should calculate this based on the actual port settings */ 55 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ 56 57 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 58 #define SUPPORT_SYSRQ 59 #endif 60 61 #include <linux/serial_core.h> 62 63 static void atmel_start_rx(struct uart_port *port); 64 static void atmel_stop_rx(struct uart_port *port); 65 66 #ifdef CONFIG_SERIAL_ATMEL_TTYAT 67 68 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 69 * should coexist with the 8250 driver, such as if we have an external 16C550 70 * UART. */ 71 #define SERIAL_ATMEL_MAJOR 204 72 #define MINOR_START 154 73 #define ATMEL_DEVICENAME "ttyAT" 74 75 #else 76 77 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port 78 * name, but it is legally reserved for the 8250 driver. */ 79 #define SERIAL_ATMEL_MAJOR TTY_MAJOR 80 #define MINOR_START 64 81 #define ATMEL_DEVICENAME "ttyS" 82 83 #endif 84 85 #define ATMEL_ISR_PASS_LIMIT 256 86 87 /* UART registers. CR is write-only, hence no GET macro */ 88 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) 89 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) 90 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) 91 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) 92 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) 93 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) 94 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) 95 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) 96 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) 97 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) 98 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) 99 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) 100 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) 101 102 /* PDC registers */ 103 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) 104 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) 105 106 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) 107 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) 108 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) 109 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) 110 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) 111 112 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) 113 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) 114 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR) 115 116 static int (*atmel_open_hook)(struct uart_port *); 117 static void (*atmel_close_hook)(struct uart_port *); 118 119 struct atmel_dma_buffer { 120 unsigned char *buf; 121 dma_addr_t dma_addr; 122 unsigned int dma_size; 123 unsigned int ofs; 124 }; 125 126 struct atmel_uart_char { 127 u16 status; 128 u16 ch; 129 }; 130 131 #define ATMEL_SERIAL_RINGSIZE 1024 132 133 /* 134 * We wrap our port structure around the generic uart_port. 135 */ 136 struct atmel_uart_port { 137 struct uart_port uart; /* uart */ 138 struct clk *clk; /* uart clock */ 139 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */ 140 u32 backup_imr; /* IMR saved during suspend */ 141 int break_active; /* break being received */ 142 143 short use_dma_rx; /* enable PDC receiver */ 144 short pdc_rx_idx; /* current PDC RX buffer */ 145 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */ 146 147 short use_dma_tx; /* enable PDC transmitter */ 148 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */ 149 150 struct tasklet_struct tasklet; 151 unsigned int irq_status; 152 unsigned int irq_status_prev; 153 154 struct circ_buf rx_ring; 155 156 struct serial_rs485 rs485; /* rs485 settings */ 157 unsigned int tx_done_mask; 158 }; 159 160 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; 161 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART); 162 163 #ifdef SUPPORT_SYSRQ 164 static struct console atmel_console; 165 #endif 166 167 #if defined(CONFIG_OF) 168 static const struct of_device_id atmel_serial_dt_ids[] = { 169 { .compatible = "atmel,at91rm9200-usart" }, 170 { .compatible = "atmel,at91sam9260-usart" }, 171 { /* sentinel */ } 172 }; 173 174 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids); 175 #endif 176 177 static inline struct atmel_uart_port * 178 to_atmel_uart_port(struct uart_port *uart) 179 { 180 return container_of(uart, struct atmel_uart_port, uart); 181 } 182 183 #ifdef CONFIG_SERIAL_ATMEL_PDC 184 static bool atmel_use_dma_rx(struct uart_port *port) 185 { 186 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 187 188 return atmel_port->use_dma_rx; 189 } 190 191 static bool atmel_use_dma_tx(struct uart_port *port) 192 { 193 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 194 195 return atmel_port->use_dma_tx; 196 } 197 #else 198 static bool atmel_use_dma_rx(struct uart_port *port) 199 { 200 return false; 201 } 202 203 static bool atmel_use_dma_tx(struct uart_port *port) 204 { 205 return false; 206 } 207 #endif 208 209 /* Enable or disable the rs485 support */ 210 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) 211 { 212 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 213 unsigned int mode; 214 unsigned long flags; 215 216 spin_lock_irqsave(&port->lock, flags); 217 218 /* Disable interrupts */ 219 UART_PUT_IDR(port, atmel_port->tx_done_mask); 220 221 mode = UART_GET_MR(port); 222 223 /* Resetting serial mode to RS232 (0x0) */ 224 mode &= ~ATMEL_US_USMODE; 225 226 atmel_port->rs485 = *rs485conf; 227 228 if (rs485conf->flags & SER_RS485_ENABLED) { 229 dev_dbg(port->dev, "Setting UART to RS485\n"); 230 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; 231 if ((rs485conf->delay_rts_after_send) > 0) 232 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send); 233 mode |= ATMEL_US_USMODE_RS485; 234 } else { 235 dev_dbg(port->dev, "Setting UART to RS232\n"); 236 if (atmel_use_dma_tx(port)) 237 atmel_port->tx_done_mask = ATMEL_US_ENDTX | 238 ATMEL_US_TXBUFE; 239 else 240 atmel_port->tx_done_mask = ATMEL_US_TXRDY; 241 } 242 UART_PUT_MR(port, mode); 243 244 /* Enable interrupts */ 245 UART_PUT_IER(port, atmel_port->tx_done_mask); 246 247 spin_unlock_irqrestore(&port->lock, flags); 248 249 } 250 251 /* 252 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. 253 */ 254 static u_int atmel_tx_empty(struct uart_port *port) 255 { 256 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0; 257 } 258 259 /* 260 * Set state of the modem control output lines 261 */ 262 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) 263 { 264 unsigned int control = 0; 265 unsigned int mode; 266 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 267 268 #ifdef CONFIG_ARCH_AT91RM9200 269 if (cpu_is_at91rm9200()) { 270 /* 271 * AT91RM9200 Errata #39: RTS0 is not internally connected 272 * to PA21. We need to drive the pin manually. 273 */ 274 if (port->mapbase == AT91RM9200_BASE_US0) { 275 if (mctrl & TIOCM_RTS) 276 at91_set_gpio_value(AT91_PIN_PA21, 0); 277 else 278 at91_set_gpio_value(AT91_PIN_PA21, 1); 279 } 280 } 281 #endif 282 283 if (mctrl & TIOCM_RTS) 284 control |= ATMEL_US_RTSEN; 285 else 286 control |= ATMEL_US_RTSDIS; 287 288 if (mctrl & TIOCM_DTR) 289 control |= ATMEL_US_DTREN; 290 else 291 control |= ATMEL_US_DTRDIS; 292 293 UART_PUT_CR(port, control); 294 295 /* Local loopback mode? */ 296 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE; 297 if (mctrl & TIOCM_LOOP) 298 mode |= ATMEL_US_CHMODE_LOC_LOOP; 299 else 300 mode |= ATMEL_US_CHMODE_NORMAL; 301 302 /* Resetting serial mode to RS232 (0x0) */ 303 mode &= ~ATMEL_US_USMODE; 304 305 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 306 dev_dbg(port->dev, "Setting UART to RS485\n"); 307 if ((atmel_port->rs485.delay_rts_after_send) > 0) 308 UART_PUT_TTGR(port, 309 atmel_port->rs485.delay_rts_after_send); 310 mode |= ATMEL_US_USMODE_RS485; 311 } else { 312 dev_dbg(port->dev, "Setting UART to RS232\n"); 313 } 314 UART_PUT_MR(port, mode); 315 } 316 317 /* 318 * Get state of the modem control input lines 319 */ 320 static u_int atmel_get_mctrl(struct uart_port *port) 321 { 322 unsigned int status, ret = 0; 323 324 status = UART_GET_CSR(port); 325 326 /* 327 * The control signals are active low. 328 */ 329 if (!(status & ATMEL_US_DCD)) 330 ret |= TIOCM_CD; 331 if (!(status & ATMEL_US_CTS)) 332 ret |= TIOCM_CTS; 333 if (!(status & ATMEL_US_DSR)) 334 ret |= TIOCM_DSR; 335 if (!(status & ATMEL_US_RI)) 336 ret |= TIOCM_RI; 337 338 return ret; 339 } 340 341 /* 342 * Stop transmitting. 343 */ 344 static void atmel_stop_tx(struct uart_port *port) 345 { 346 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 347 348 if (atmel_use_dma_tx(port)) { 349 /* disable PDC transmit */ 350 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 351 } 352 /* Disable interrupts */ 353 UART_PUT_IDR(port, atmel_port->tx_done_mask); 354 355 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && 356 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) 357 atmel_start_rx(port); 358 } 359 360 /* 361 * Start transmitting. 362 */ 363 static void atmel_start_tx(struct uart_port *port) 364 { 365 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 366 367 if (atmel_use_dma_tx(port)) { 368 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) 369 /* The transmitter is already running. Yes, we 370 really need this.*/ 371 return; 372 373 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && 374 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) 375 atmel_stop_rx(port); 376 377 /* re-enable PDC transmit */ 378 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 379 } 380 /* Enable interrupts */ 381 UART_PUT_IER(port, atmel_port->tx_done_mask); 382 } 383 384 /* 385 * start receiving - port is in process of being opened. 386 */ 387 static void atmel_start_rx(struct uart_port *port) 388 { 389 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */ 390 391 UART_PUT_CR(port, ATMEL_US_RXEN); 392 393 if (atmel_use_dma_rx(port)) { 394 /* enable PDC controller */ 395 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | 396 port->read_status_mask); 397 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); 398 } else { 399 UART_PUT_IER(port, ATMEL_US_RXRDY); 400 } 401 } 402 403 /* 404 * Stop receiving - port is in process of being closed. 405 */ 406 static void atmel_stop_rx(struct uart_port *port) 407 { 408 UART_PUT_CR(port, ATMEL_US_RXDIS); 409 410 if (atmel_use_dma_rx(port)) { 411 /* disable PDC receive */ 412 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); 413 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | 414 port->read_status_mask); 415 } else { 416 UART_PUT_IDR(port, ATMEL_US_RXRDY); 417 } 418 } 419 420 /* 421 * Enable modem status interrupts 422 */ 423 static void atmel_enable_ms(struct uart_port *port) 424 { 425 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC 426 | ATMEL_US_DCDIC | ATMEL_US_CTSIC); 427 } 428 429 /* 430 * Control the transmission of a break signal 431 */ 432 static void atmel_break_ctl(struct uart_port *port, int break_state) 433 { 434 if (break_state != 0) 435 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */ 436 else 437 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */ 438 } 439 440 /* 441 * Stores the incoming character in the ring buffer 442 */ 443 static void 444 atmel_buffer_rx_char(struct uart_port *port, unsigned int status, 445 unsigned int ch) 446 { 447 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 448 struct circ_buf *ring = &atmel_port->rx_ring; 449 struct atmel_uart_char *c; 450 451 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE)) 452 /* Buffer overflow, ignore char */ 453 return; 454 455 c = &((struct atmel_uart_char *)ring->buf)[ring->head]; 456 c->status = status; 457 c->ch = ch; 458 459 /* Make sure the character is stored before we update head. */ 460 smp_wmb(); 461 462 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1); 463 } 464 465 /* 466 * Deal with parity, framing and overrun errors. 467 */ 468 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status) 469 { 470 /* clear error */ 471 UART_PUT_CR(port, ATMEL_US_RSTSTA); 472 473 if (status & ATMEL_US_RXBRK) { 474 /* ignore side-effect */ 475 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); 476 port->icount.brk++; 477 } 478 if (status & ATMEL_US_PARE) 479 port->icount.parity++; 480 if (status & ATMEL_US_FRAME) 481 port->icount.frame++; 482 if (status & ATMEL_US_OVRE) 483 port->icount.overrun++; 484 } 485 486 /* 487 * Characters received (called from interrupt handler) 488 */ 489 static void atmel_rx_chars(struct uart_port *port) 490 { 491 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 492 unsigned int status, ch; 493 494 status = UART_GET_CSR(port); 495 while (status & ATMEL_US_RXRDY) { 496 ch = UART_GET_CHAR(port); 497 498 /* 499 * note that the error handling code is 500 * out of the main execution path 501 */ 502 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME 503 | ATMEL_US_OVRE | ATMEL_US_RXBRK) 504 || atmel_port->break_active)) { 505 506 /* clear error */ 507 UART_PUT_CR(port, ATMEL_US_RSTSTA); 508 509 if (status & ATMEL_US_RXBRK 510 && !atmel_port->break_active) { 511 atmel_port->break_active = 1; 512 UART_PUT_IER(port, ATMEL_US_RXBRK); 513 } else { 514 /* 515 * This is either the end-of-break 516 * condition or we've received at 517 * least one character without RXBRK 518 * being set. In both cases, the next 519 * RXBRK will indicate start-of-break. 520 */ 521 UART_PUT_IDR(port, ATMEL_US_RXBRK); 522 status &= ~ATMEL_US_RXBRK; 523 atmel_port->break_active = 0; 524 } 525 } 526 527 atmel_buffer_rx_char(port, status, ch); 528 status = UART_GET_CSR(port); 529 } 530 531 tasklet_schedule(&atmel_port->tasklet); 532 } 533 534 /* 535 * Transmit characters (called from tasklet with TXRDY interrupt 536 * disabled) 537 */ 538 static void atmel_tx_chars(struct uart_port *port) 539 { 540 struct circ_buf *xmit = &port->state->xmit; 541 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 542 543 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) { 544 UART_PUT_CHAR(port, port->x_char); 545 port->icount.tx++; 546 port->x_char = 0; 547 } 548 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) 549 return; 550 551 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) { 552 UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 553 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 554 port->icount.tx++; 555 if (uart_circ_empty(xmit)) 556 break; 557 } 558 559 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 560 uart_write_wakeup(port); 561 562 if (!uart_circ_empty(xmit)) 563 /* Enable interrupts */ 564 UART_PUT_IER(port, atmel_port->tx_done_mask); 565 } 566 567 /* 568 * receive interrupt handler. 569 */ 570 static void 571 atmel_handle_receive(struct uart_port *port, unsigned int pending) 572 { 573 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 574 575 if (atmel_use_dma_rx(port)) { 576 /* 577 * PDC receive. Just schedule the tasklet and let it 578 * figure out the details. 579 * 580 * TODO: We're not handling error flags correctly at 581 * the moment. 582 */ 583 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) { 584 UART_PUT_IDR(port, (ATMEL_US_ENDRX 585 | ATMEL_US_TIMEOUT)); 586 tasklet_schedule(&atmel_port->tasklet); 587 } 588 589 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | 590 ATMEL_US_FRAME | ATMEL_US_PARE)) 591 atmel_pdc_rxerr(port, pending); 592 } 593 594 /* Interrupt receive */ 595 if (pending & ATMEL_US_RXRDY) 596 atmel_rx_chars(port); 597 else if (pending & ATMEL_US_RXBRK) { 598 /* 599 * End of break detected. If it came along with a 600 * character, atmel_rx_chars will handle it. 601 */ 602 UART_PUT_CR(port, ATMEL_US_RSTSTA); 603 UART_PUT_IDR(port, ATMEL_US_RXBRK); 604 atmel_port->break_active = 0; 605 } 606 } 607 608 /* 609 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe) 610 */ 611 static void 612 atmel_handle_transmit(struct uart_port *port, unsigned int pending) 613 { 614 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 615 616 if (pending & atmel_port->tx_done_mask) { 617 /* Either PDC or interrupt transmission */ 618 UART_PUT_IDR(port, atmel_port->tx_done_mask); 619 tasklet_schedule(&atmel_port->tasklet); 620 } 621 } 622 623 /* 624 * status flags interrupt handler. 625 */ 626 static void 627 atmel_handle_status(struct uart_port *port, unsigned int pending, 628 unsigned int status) 629 { 630 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 631 632 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC 633 | ATMEL_US_CTSIC)) { 634 atmel_port->irq_status = status; 635 tasklet_schedule(&atmel_port->tasklet); 636 } 637 } 638 639 /* 640 * Interrupt handler 641 */ 642 static irqreturn_t atmel_interrupt(int irq, void *dev_id) 643 { 644 struct uart_port *port = dev_id; 645 unsigned int status, pending, pass_counter = 0; 646 647 do { 648 status = UART_GET_CSR(port); 649 pending = status & UART_GET_IMR(port); 650 if (!pending) 651 break; 652 653 atmel_handle_receive(port, pending); 654 atmel_handle_status(port, pending, status); 655 atmel_handle_transmit(port, pending); 656 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT); 657 658 return pass_counter ? IRQ_HANDLED : IRQ_NONE; 659 } 660 661 /* 662 * Called from tasklet with ENDTX and TXBUFE interrupts disabled. 663 */ 664 static void atmel_tx_dma(struct uart_port *port) 665 { 666 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 667 struct circ_buf *xmit = &port->state->xmit; 668 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; 669 int count; 670 671 /* nothing left to transmit? */ 672 if (UART_GET_TCR(port)) 673 return; 674 675 xmit->tail += pdc->ofs; 676 xmit->tail &= UART_XMIT_SIZE - 1; 677 678 port->icount.tx += pdc->ofs; 679 pdc->ofs = 0; 680 681 /* more to transmit - setup next transfer */ 682 683 /* disable PDC transmit */ 684 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 685 686 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) { 687 dma_sync_single_for_device(port->dev, 688 pdc->dma_addr, 689 pdc->dma_size, 690 DMA_TO_DEVICE); 691 692 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 693 pdc->ofs = count; 694 695 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); 696 UART_PUT_TCR(port, count); 697 /* re-enable PDC transmit */ 698 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 699 /* Enable interrupts */ 700 UART_PUT_IER(port, atmel_port->tx_done_mask); 701 } else { 702 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && 703 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) { 704 /* DMA done, stop TX, start RX for RS485 */ 705 atmel_start_rx(port); 706 } 707 } 708 709 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 710 uart_write_wakeup(port); 711 } 712 713 static void atmel_rx_from_ring(struct uart_port *port) 714 { 715 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 716 struct circ_buf *ring = &atmel_port->rx_ring; 717 unsigned int flg; 718 unsigned int status; 719 720 while (ring->head != ring->tail) { 721 struct atmel_uart_char c; 722 723 /* Make sure c is loaded after head. */ 724 smp_rmb(); 725 726 c = ((struct atmel_uart_char *)ring->buf)[ring->tail]; 727 728 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1); 729 730 port->icount.rx++; 731 status = c.status; 732 flg = TTY_NORMAL; 733 734 /* 735 * note that the error handling code is 736 * out of the main execution path 737 */ 738 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME 739 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { 740 if (status & ATMEL_US_RXBRK) { 741 /* ignore side-effect */ 742 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); 743 744 port->icount.brk++; 745 if (uart_handle_break(port)) 746 continue; 747 } 748 if (status & ATMEL_US_PARE) 749 port->icount.parity++; 750 if (status & ATMEL_US_FRAME) 751 port->icount.frame++; 752 if (status & ATMEL_US_OVRE) 753 port->icount.overrun++; 754 755 status &= port->read_status_mask; 756 757 if (status & ATMEL_US_RXBRK) 758 flg = TTY_BREAK; 759 else if (status & ATMEL_US_PARE) 760 flg = TTY_PARITY; 761 else if (status & ATMEL_US_FRAME) 762 flg = TTY_FRAME; 763 } 764 765 766 if (uart_handle_sysrq_char(port, c.ch)) 767 continue; 768 769 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg); 770 } 771 772 /* 773 * Drop the lock here since it might end up calling 774 * uart_start(), which takes the lock. 775 */ 776 spin_unlock(&port->lock); 777 tty_flip_buffer_push(&port->state->port); 778 spin_lock(&port->lock); 779 } 780 781 static void atmel_rx_from_dma(struct uart_port *port) 782 { 783 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 784 struct tty_port *tport = &port->state->port; 785 struct atmel_dma_buffer *pdc; 786 int rx_idx = atmel_port->pdc_rx_idx; 787 unsigned int head; 788 unsigned int tail; 789 unsigned int count; 790 791 do { 792 /* Reset the UART timeout early so that we don't miss one */ 793 UART_PUT_CR(port, ATMEL_US_STTTO); 794 795 pdc = &atmel_port->pdc_rx[rx_idx]; 796 head = UART_GET_RPR(port) - pdc->dma_addr; 797 tail = pdc->ofs; 798 799 /* If the PDC has switched buffers, RPR won't contain 800 * any address within the current buffer. Since head 801 * is unsigned, we just need a one-way comparison to 802 * find out. 803 * 804 * In this case, we just need to consume the entire 805 * buffer and resubmit it for DMA. This will clear the 806 * ENDRX bit as well, so that we can safely re-enable 807 * all interrupts below. 808 */ 809 head = min(head, pdc->dma_size); 810 811 if (likely(head != tail)) { 812 dma_sync_single_for_cpu(port->dev, pdc->dma_addr, 813 pdc->dma_size, DMA_FROM_DEVICE); 814 815 /* 816 * head will only wrap around when we recycle 817 * the DMA buffer, and when that happens, we 818 * explicitly set tail to 0. So head will 819 * always be greater than tail. 820 */ 821 count = head - tail; 822 823 tty_insert_flip_string(tport, pdc->buf + pdc->ofs, 824 count); 825 826 dma_sync_single_for_device(port->dev, pdc->dma_addr, 827 pdc->dma_size, DMA_FROM_DEVICE); 828 829 port->icount.rx += count; 830 pdc->ofs = head; 831 } 832 833 /* 834 * If the current buffer is full, we need to check if 835 * the next one contains any additional data. 836 */ 837 if (head >= pdc->dma_size) { 838 pdc->ofs = 0; 839 UART_PUT_RNPR(port, pdc->dma_addr); 840 UART_PUT_RNCR(port, pdc->dma_size); 841 842 rx_idx = !rx_idx; 843 atmel_port->pdc_rx_idx = rx_idx; 844 } 845 } while (head >= pdc->dma_size); 846 847 /* 848 * Drop the lock here since it might end up calling 849 * uart_start(), which takes the lock. 850 */ 851 spin_unlock(&port->lock); 852 tty_flip_buffer_push(tport); 853 spin_lock(&port->lock); 854 855 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); 856 } 857 858 /* 859 * tasklet handling tty stuff outside the interrupt handler. 860 */ 861 static void atmel_tasklet_func(unsigned long data) 862 { 863 struct uart_port *port = (struct uart_port *)data; 864 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 865 unsigned int status; 866 unsigned int status_change; 867 868 /* The interrupt handler does not take the lock */ 869 spin_lock(&port->lock); 870 871 if (atmel_use_dma_tx(port)) 872 atmel_tx_dma(port); 873 else 874 atmel_tx_chars(port); 875 876 status = atmel_port->irq_status; 877 status_change = status ^ atmel_port->irq_status_prev; 878 879 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR 880 | ATMEL_US_DCD | ATMEL_US_CTS)) { 881 /* TODO: All reads to CSR will clear these interrupts! */ 882 if (status_change & ATMEL_US_RI) 883 port->icount.rng++; 884 if (status_change & ATMEL_US_DSR) 885 port->icount.dsr++; 886 if (status_change & ATMEL_US_DCD) 887 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); 888 if (status_change & ATMEL_US_CTS) 889 uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); 890 891 wake_up_interruptible(&port->state->port.delta_msr_wait); 892 893 atmel_port->irq_status_prev = status; 894 } 895 896 if (atmel_use_dma_rx(port)) 897 atmel_rx_from_dma(port); 898 else 899 atmel_rx_from_ring(port); 900 901 spin_unlock(&port->lock); 902 } 903 904 /* 905 * Perform initialization and enable port for reception 906 */ 907 static int atmel_startup(struct uart_port *port) 908 { 909 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 910 struct tty_struct *tty = port->state->port.tty; 911 int retval; 912 913 /* 914 * Ensure that no interrupts are enabled otherwise when 915 * request_irq() is called we could get stuck trying to 916 * handle an unexpected interrupt 917 */ 918 UART_PUT_IDR(port, -1); 919 920 /* 921 * Allocate the IRQ 922 */ 923 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, 924 tty ? tty->name : "atmel_serial", port); 925 if (retval) { 926 printk("atmel_serial: atmel_startup - Can't get irq\n"); 927 return retval; 928 } 929 930 /* 931 * Initialize DMA (if necessary) 932 */ 933 if (atmel_use_dma_rx(port)) { 934 int i; 935 936 for (i = 0; i < 2; i++) { 937 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; 938 939 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL); 940 if (pdc->buf == NULL) { 941 if (i != 0) { 942 dma_unmap_single(port->dev, 943 atmel_port->pdc_rx[0].dma_addr, 944 PDC_BUFFER_SIZE, 945 DMA_FROM_DEVICE); 946 kfree(atmel_port->pdc_rx[0].buf); 947 } 948 free_irq(port->irq, port); 949 return -ENOMEM; 950 } 951 pdc->dma_addr = dma_map_single(port->dev, 952 pdc->buf, 953 PDC_BUFFER_SIZE, 954 DMA_FROM_DEVICE); 955 pdc->dma_size = PDC_BUFFER_SIZE; 956 pdc->ofs = 0; 957 } 958 959 atmel_port->pdc_rx_idx = 0; 960 961 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr); 962 UART_PUT_RCR(port, PDC_BUFFER_SIZE); 963 964 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr); 965 UART_PUT_RNCR(port, PDC_BUFFER_SIZE); 966 } 967 if (atmel_use_dma_tx(port)) { 968 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; 969 struct circ_buf *xmit = &port->state->xmit; 970 971 pdc->buf = xmit->buf; 972 pdc->dma_addr = dma_map_single(port->dev, 973 pdc->buf, 974 UART_XMIT_SIZE, 975 DMA_TO_DEVICE); 976 pdc->dma_size = UART_XMIT_SIZE; 977 pdc->ofs = 0; 978 } 979 980 /* 981 * If there is a specific "open" function (to register 982 * control line interrupts) 983 */ 984 if (atmel_open_hook) { 985 retval = atmel_open_hook(port); 986 if (retval) { 987 free_irq(port->irq, port); 988 return retval; 989 } 990 } 991 992 /* Save current CSR for comparison in atmel_tasklet_func() */ 993 atmel_port->irq_status_prev = UART_GET_CSR(port); 994 atmel_port->irq_status = atmel_port->irq_status_prev; 995 996 /* 997 * Finally, enable the serial port 998 */ 999 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 1000 /* enable xmit & rcvr */ 1001 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 1002 1003 if (atmel_use_dma_rx(port)) { 1004 /* set UART timeout */ 1005 UART_PUT_RTOR(port, PDC_RX_TIMEOUT); 1006 UART_PUT_CR(port, ATMEL_US_STTTO); 1007 1008 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); 1009 /* enable PDC controller */ 1010 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); 1011 } else { 1012 /* enable receive only */ 1013 UART_PUT_IER(port, ATMEL_US_RXRDY); 1014 } 1015 1016 return 0; 1017 } 1018 1019 /* 1020 * Disable the port 1021 */ 1022 static void atmel_shutdown(struct uart_port *port) 1023 { 1024 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1025 /* 1026 * Ensure everything is stopped. 1027 */ 1028 atmel_stop_rx(port); 1029 atmel_stop_tx(port); 1030 1031 /* 1032 * Shut-down the DMA. 1033 */ 1034 if (atmel_use_dma_rx(port)) { 1035 int i; 1036 1037 for (i = 0; i < 2; i++) { 1038 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; 1039 1040 dma_unmap_single(port->dev, 1041 pdc->dma_addr, 1042 pdc->dma_size, 1043 DMA_FROM_DEVICE); 1044 kfree(pdc->buf); 1045 } 1046 } 1047 if (atmel_use_dma_tx(port)) { 1048 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; 1049 1050 dma_unmap_single(port->dev, 1051 pdc->dma_addr, 1052 pdc->dma_size, 1053 DMA_TO_DEVICE); 1054 } 1055 1056 /* 1057 * Disable all interrupts, port and break condition. 1058 */ 1059 UART_PUT_CR(port, ATMEL_US_RSTSTA); 1060 UART_PUT_IDR(port, -1); 1061 1062 /* 1063 * Free the interrupt 1064 */ 1065 free_irq(port->irq, port); 1066 1067 /* 1068 * If there is a specific "close" function (to unregister 1069 * control line interrupts) 1070 */ 1071 if (atmel_close_hook) 1072 atmel_close_hook(port); 1073 } 1074 1075 /* 1076 * Flush any TX data submitted for DMA. Called when the TX circular 1077 * buffer is reset. 1078 */ 1079 static void atmel_flush_buffer(struct uart_port *port) 1080 { 1081 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1082 1083 if (atmel_use_dma_tx(port)) { 1084 UART_PUT_TCR(port, 0); 1085 atmel_port->pdc_tx.ofs = 0; 1086 } 1087 } 1088 1089 /* 1090 * Power / Clock management. 1091 */ 1092 static void atmel_serial_pm(struct uart_port *port, unsigned int state, 1093 unsigned int oldstate) 1094 { 1095 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1096 1097 switch (state) { 1098 case 0: 1099 /* 1100 * Enable the peripheral clock for this serial port. 1101 * This is called on uart_open() or a resume event. 1102 */ 1103 clk_enable(atmel_port->clk); 1104 1105 /* re-enable interrupts if we disabled some on suspend */ 1106 UART_PUT_IER(port, atmel_port->backup_imr); 1107 break; 1108 case 3: 1109 /* Back up the interrupt mask and disable all interrupts */ 1110 atmel_port->backup_imr = UART_GET_IMR(port); 1111 UART_PUT_IDR(port, -1); 1112 1113 /* 1114 * Disable the peripheral clock for this serial port. 1115 * This is called on uart_close() or a suspend event. 1116 */ 1117 clk_disable(atmel_port->clk); 1118 break; 1119 default: 1120 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); 1121 } 1122 } 1123 1124 /* 1125 * Change the port parameters 1126 */ 1127 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, 1128 struct ktermios *old) 1129 { 1130 unsigned long flags; 1131 unsigned int mode, imr, quot, baud; 1132 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1133 1134 /* Get current mode register */ 1135 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL 1136 | ATMEL_US_NBSTOP | ATMEL_US_PAR 1137 | ATMEL_US_USMODE); 1138 1139 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); 1140 quot = uart_get_divisor(port, baud); 1141 1142 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ 1143 quot /= 8; 1144 mode |= ATMEL_US_USCLKS_MCK_DIV8; 1145 } 1146 1147 /* byte size */ 1148 switch (termios->c_cflag & CSIZE) { 1149 case CS5: 1150 mode |= ATMEL_US_CHRL_5; 1151 break; 1152 case CS6: 1153 mode |= ATMEL_US_CHRL_6; 1154 break; 1155 case CS7: 1156 mode |= ATMEL_US_CHRL_7; 1157 break; 1158 default: 1159 mode |= ATMEL_US_CHRL_8; 1160 break; 1161 } 1162 1163 /* stop bits */ 1164 if (termios->c_cflag & CSTOPB) 1165 mode |= ATMEL_US_NBSTOP_2; 1166 1167 /* parity */ 1168 if (termios->c_cflag & PARENB) { 1169 /* Mark or Space parity */ 1170 if (termios->c_cflag & CMSPAR) { 1171 if (termios->c_cflag & PARODD) 1172 mode |= ATMEL_US_PAR_MARK; 1173 else 1174 mode |= ATMEL_US_PAR_SPACE; 1175 } else if (termios->c_cflag & PARODD) 1176 mode |= ATMEL_US_PAR_ODD; 1177 else 1178 mode |= ATMEL_US_PAR_EVEN; 1179 } else 1180 mode |= ATMEL_US_PAR_NONE; 1181 1182 /* hardware handshake (RTS/CTS) */ 1183 if (termios->c_cflag & CRTSCTS) 1184 mode |= ATMEL_US_USMODE_HWHS; 1185 else 1186 mode |= ATMEL_US_USMODE_NORMAL; 1187 1188 spin_lock_irqsave(&port->lock, flags); 1189 1190 port->read_status_mask = ATMEL_US_OVRE; 1191 if (termios->c_iflag & INPCK) 1192 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); 1193 if (termios->c_iflag & (BRKINT | PARMRK)) 1194 port->read_status_mask |= ATMEL_US_RXBRK; 1195 1196 if (atmel_use_dma_rx(port)) 1197 /* need to enable error interrupts */ 1198 UART_PUT_IER(port, port->read_status_mask); 1199 1200 /* 1201 * Characters to ignore 1202 */ 1203 port->ignore_status_mask = 0; 1204 if (termios->c_iflag & IGNPAR) 1205 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); 1206 if (termios->c_iflag & IGNBRK) { 1207 port->ignore_status_mask |= ATMEL_US_RXBRK; 1208 /* 1209 * If we're ignoring parity and break indicators, 1210 * ignore overruns too (for real raw support). 1211 */ 1212 if (termios->c_iflag & IGNPAR) 1213 port->ignore_status_mask |= ATMEL_US_OVRE; 1214 } 1215 /* TODO: Ignore all characters if CREAD is set.*/ 1216 1217 /* update the per-port timeout */ 1218 uart_update_timeout(port, termios->c_cflag, baud); 1219 1220 /* 1221 * save/disable interrupts. The tty layer will ensure that the 1222 * transmitter is empty if requested by the caller, so there's 1223 * no need to wait for it here. 1224 */ 1225 imr = UART_GET_IMR(port); 1226 UART_PUT_IDR(port, -1); 1227 1228 /* disable receiver and transmitter */ 1229 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); 1230 1231 /* Resetting serial mode to RS232 (0x0) */ 1232 mode &= ~ATMEL_US_USMODE; 1233 1234 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 1235 dev_dbg(port->dev, "Setting UART to RS485\n"); 1236 if ((atmel_port->rs485.delay_rts_after_send) > 0) 1237 UART_PUT_TTGR(port, 1238 atmel_port->rs485.delay_rts_after_send); 1239 mode |= ATMEL_US_USMODE_RS485; 1240 } else { 1241 dev_dbg(port->dev, "Setting UART to RS232\n"); 1242 } 1243 1244 /* set the parity, stop bits and data size */ 1245 UART_PUT_MR(port, mode); 1246 1247 /* set the baud rate */ 1248 UART_PUT_BRGR(port, quot); 1249 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 1250 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 1251 1252 /* restore interrupts */ 1253 UART_PUT_IER(port, imr); 1254 1255 /* CTS flow-control and modem-status interrupts */ 1256 if (UART_ENABLE_MS(port, termios->c_cflag)) 1257 port->ops->enable_ms(port); 1258 1259 spin_unlock_irqrestore(&port->lock, flags); 1260 } 1261 1262 static void atmel_set_ldisc(struct uart_port *port, int new) 1263 { 1264 if (new == N_PPS) { 1265 port->flags |= UPF_HARDPPS_CD; 1266 atmel_enable_ms(port); 1267 } else { 1268 port->flags &= ~UPF_HARDPPS_CD; 1269 } 1270 } 1271 1272 /* 1273 * Return string describing the specified port 1274 */ 1275 static const char *atmel_type(struct uart_port *port) 1276 { 1277 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL; 1278 } 1279 1280 /* 1281 * Release the memory region(s) being used by 'port'. 1282 */ 1283 static void atmel_release_port(struct uart_port *port) 1284 { 1285 struct platform_device *pdev = to_platform_device(port->dev); 1286 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 1287 1288 release_mem_region(port->mapbase, size); 1289 1290 if (port->flags & UPF_IOREMAP) { 1291 iounmap(port->membase); 1292 port->membase = NULL; 1293 } 1294 } 1295 1296 /* 1297 * Request the memory region(s) being used by 'port'. 1298 */ 1299 static int atmel_request_port(struct uart_port *port) 1300 { 1301 struct platform_device *pdev = to_platform_device(port->dev); 1302 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 1303 1304 if (!request_mem_region(port->mapbase, size, "atmel_serial")) 1305 return -EBUSY; 1306 1307 if (port->flags & UPF_IOREMAP) { 1308 port->membase = ioremap(port->mapbase, size); 1309 if (port->membase == NULL) { 1310 release_mem_region(port->mapbase, size); 1311 return -ENOMEM; 1312 } 1313 } 1314 1315 return 0; 1316 } 1317 1318 /* 1319 * Configure/autoconfigure the port. 1320 */ 1321 static void atmel_config_port(struct uart_port *port, int flags) 1322 { 1323 if (flags & UART_CONFIG_TYPE) { 1324 port->type = PORT_ATMEL; 1325 atmel_request_port(port); 1326 } 1327 } 1328 1329 /* 1330 * Verify the new serial_struct (for TIOCSSERIAL). 1331 */ 1332 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser) 1333 { 1334 int ret = 0; 1335 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL) 1336 ret = -EINVAL; 1337 if (port->irq != ser->irq) 1338 ret = -EINVAL; 1339 if (ser->io_type != SERIAL_IO_MEM) 1340 ret = -EINVAL; 1341 if (port->uartclk / 16 != ser->baud_base) 1342 ret = -EINVAL; 1343 if ((void *)port->mapbase != ser->iomem_base) 1344 ret = -EINVAL; 1345 if (port->iobase != ser->port) 1346 ret = -EINVAL; 1347 if (ser->hub6 != 0) 1348 ret = -EINVAL; 1349 return ret; 1350 } 1351 1352 #ifdef CONFIG_CONSOLE_POLL 1353 static int atmel_poll_get_char(struct uart_port *port) 1354 { 1355 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY)) 1356 cpu_relax(); 1357 1358 return UART_GET_CHAR(port); 1359 } 1360 1361 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch) 1362 { 1363 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) 1364 cpu_relax(); 1365 1366 UART_PUT_CHAR(port, ch); 1367 } 1368 #endif 1369 1370 static int 1371 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) 1372 { 1373 struct serial_rs485 rs485conf; 1374 1375 switch (cmd) { 1376 case TIOCSRS485: 1377 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, 1378 sizeof(rs485conf))) 1379 return -EFAULT; 1380 1381 atmel_config_rs485(port, &rs485conf); 1382 break; 1383 1384 case TIOCGRS485: 1385 if (copy_to_user((struct serial_rs485 *) arg, 1386 &(to_atmel_uart_port(port)->rs485), 1387 sizeof(rs485conf))) 1388 return -EFAULT; 1389 break; 1390 1391 default: 1392 return -ENOIOCTLCMD; 1393 } 1394 return 0; 1395 } 1396 1397 1398 1399 static struct uart_ops atmel_pops = { 1400 .tx_empty = atmel_tx_empty, 1401 .set_mctrl = atmel_set_mctrl, 1402 .get_mctrl = atmel_get_mctrl, 1403 .stop_tx = atmel_stop_tx, 1404 .start_tx = atmel_start_tx, 1405 .stop_rx = atmel_stop_rx, 1406 .enable_ms = atmel_enable_ms, 1407 .break_ctl = atmel_break_ctl, 1408 .startup = atmel_startup, 1409 .shutdown = atmel_shutdown, 1410 .flush_buffer = atmel_flush_buffer, 1411 .set_termios = atmel_set_termios, 1412 .set_ldisc = atmel_set_ldisc, 1413 .type = atmel_type, 1414 .release_port = atmel_release_port, 1415 .request_port = atmel_request_port, 1416 .config_port = atmel_config_port, 1417 .verify_port = atmel_verify_port, 1418 .pm = atmel_serial_pm, 1419 .ioctl = atmel_ioctl, 1420 #ifdef CONFIG_CONSOLE_POLL 1421 .poll_get_char = atmel_poll_get_char, 1422 .poll_put_char = atmel_poll_put_char, 1423 #endif 1424 }; 1425 1426 static void atmel_of_init_port(struct atmel_uart_port *atmel_port, 1427 struct device_node *np) 1428 { 1429 u32 rs485_delay[2]; 1430 1431 /* DMA/PDC usage specification */ 1432 if (of_get_property(np, "atmel,use-dma-rx", NULL)) 1433 atmel_port->use_dma_rx = 1; 1434 else 1435 atmel_port->use_dma_rx = 0; 1436 if (of_get_property(np, "atmel,use-dma-tx", NULL)) 1437 atmel_port->use_dma_tx = 1; 1438 else 1439 atmel_port->use_dma_tx = 0; 1440 1441 /* rs485 properties */ 1442 if (of_property_read_u32_array(np, "rs485-rts-delay", 1443 rs485_delay, 2) == 0) { 1444 struct serial_rs485 *rs485conf = &atmel_port->rs485; 1445 1446 rs485conf->delay_rts_before_send = rs485_delay[0]; 1447 rs485conf->delay_rts_after_send = rs485_delay[1]; 1448 rs485conf->flags = 0; 1449 1450 if (of_get_property(np, "rs485-rx-during-tx", NULL)) 1451 rs485conf->flags |= SER_RS485_RX_DURING_TX; 1452 1453 if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL)) 1454 rs485conf->flags |= SER_RS485_ENABLED; 1455 } 1456 } 1457 1458 /* 1459 * Configure the port from the platform device resource info. 1460 */ 1461 static void atmel_init_port(struct atmel_uart_port *atmel_port, 1462 struct platform_device *pdev) 1463 { 1464 struct uart_port *port = &atmel_port->uart; 1465 struct atmel_uart_data *pdata = pdev->dev.platform_data; 1466 1467 if (pdev->dev.of_node) { 1468 atmel_of_init_port(atmel_port, pdev->dev.of_node); 1469 } else { 1470 atmel_port->use_dma_rx = pdata->use_dma_rx; 1471 atmel_port->use_dma_tx = pdata->use_dma_tx; 1472 atmel_port->rs485 = pdata->rs485; 1473 } 1474 1475 port->iotype = UPIO_MEM; 1476 port->flags = UPF_BOOT_AUTOCONF; 1477 port->ops = &atmel_pops; 1478 port->fifosize = 1; 1479 port->dev = &pdev->dev; 1480 port->mapbase = pdev->resource[0].start; 1481 port->irq = pdev->resource[1].start; 1482 1483 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func, 1484 (unsigned long)port); 1485 1486 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring)); 1487 1488 if (pdata && pdata->regs) { 1489 /* Already mapped by setup code */ 1490 port->membase = pdata->regs; 1491 } else { 1492 port->flags |= UPF_IOREMAP; 1493 port->membase = NULL; 1494 } 1495 1496 /* for console, the clock could already be configured */ 1497 if (!atmel_port->clk) { 1498 atmel_port->clk = clk_get(&pdev->dev, "usart"); 1499 clk_enable(atmel_port->clk); 1500 port->uartclk = clk_get_rate(atmel_port->clk); 1501 clk_disable(atmel_port->clk); 1502 /* only enable clock when USART is in use */ 1503 } 1504 1505 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */ 1506 if (atmel_port->rs485.flags & SER_RS485_ENABLED) 1507 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; 1508 else if (atmel_use_dma_tx(port)) { 1509 port->fifosize = PDC_BUFFER_SIZE; 1510 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE; 1511 } else { 1512 atmel_port->tx_done_mask = ATMEL_US_TXRDY; 1513 } 1514 } 1515 1516 struct platform_device *atmel_default_console_device; /* the serial console device */ 1517 1518 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE 1519 static void atmel_console_putchar(struct uart_port *port, int ch) 1520 { 1521 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) 1522 cpu_relax(); 1523 UART_PUT_CHAR(port, ch); 1524 } 1525 1526 /* 1527 * Interrupts are disabled on entering 1528 */ 1529 static void atmel_console_write(struct console *co, const char *s, u_int count) 1530 { 1531 struct uart_port *port = &atmel_ports[co->index].uart; 1532 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1533 unsigned int status, imr; 1534 unsigned int pdc_tx; 1535 1536 /* 1537 * First, save IMR and then disable interrupts 1538 */ 1539 imr = UART_GET_IMR(port); 1540 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask); 1541 1542 /* Store PDC transmit status and disable it */ 1543 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; 1544 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 1545 1546 uart_console_write(port, s, count, atmel_console_putchar); 1547 1548 /* 1549 * Finally, wait for transmitter to become empty 1550 * and restore IMR 1551 */ 1552 do { 1553 status = UART_GET_CSR(port); 1554 } while (!(status & ATMEL_US_TXRDY)); 1555 1556 /* Restore PDC transmit status */ 1557 if (pdc_tx) 1558 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 1559 1560 /* set interrupts back the way they were */ 1561 UART_PUT_IER(port, imr); 1562 } 1563 1564 /* 1565 * If the port was already initialised (eg, by a boot loader), 1566 * try to determine the current setup. 1567 */ 1568 static void __init atmel_console_get_options(struct uart_port *port, int *baud, 1569 int *parity, int *bits) 1570 { 1571 unsigned int mr, quot; 1572 1573 /* 1574 * If the baud rate generator isn't running, the port wasn't 1575 * initialized by the boot loader. 1576 */ 1577 quot = UART_GET_BRGR(port) & ATMEL_US_CD; 1578 if (!quot) 1579 return; 1580 1581 mr = UART_GET_MR(port) & ATMEL_US_CHRL; 1582 if (mr == ATMEL_US_CHRL_8) 1583 *bits = 8; 1584 else 1585 *bits = 7; 1586 1587 mr = UART_GET_MR(port) & ATMEL_US_PAR; 1588 if (mr == ATMEL_US_PAR_EVEN) 1589 *parity = 'e'; 1590 else if (mr == ATMEL_US_PAR_ODD) 1591 *parity = 'o'; 1592 1593 /* 1594 * The serial core only rounds down when matching this to a 1595 * supported baud rate. Make sure we don't end up slightly 1596 * lower than one of those, as it would make us fall through 1597 * to a much lower baud rate than we really want. 1598 */ 1599 *baud = port->uartclk / (16 * (quot - 1)); 1600 } 1601 1602 static int __init atmel_console_setup(struct console *co, char *options) 1603 { 1604 struct uart_port *port = &atmel_ports[co->index].uart; 1605 int baud = 115200; 1606 int bits = 8; 1607 int parity = 'n'; 1608 int flow = 'n'; 1609 1610 if (port->membase == NULL) { 1611 /* Port not initialized yet - delay setup */ 1612 return -ENODEV; 1613 } 1614 1615 clk_enable(atmel_ports[co->index].clk); 1616 1617 UART_PUT_IDR(port, -1); 1618 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 1619 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 1620 1621 if (options) 1622 uart_parse_options(options, &baud, &parity, &bits, &flow); 1623 else 1624 atmel_console_get_options(port, &baud, &parity, &bits); 1625 1626 return uart_set_options(port, co, baud, parity, bits, flow); 1627 } 1628 1629 static struct uart_driver atmel_uart; 1630 1631 static struct console atmel_console = { 1632 .name = ATMEL_DEVICENAME, 1633 .write = atmel_console_write, 1634 .device = uart_console_device, 1635 .setup = atmel_console_setup, 1636 .flags = CON_PRINTBUFFER, 1637 .index = -1, 1638 .data = &atmel_uart, 1639 }; 1640 1641 #define ATMEL_CONSOLE_DEVICE (&atmel_console) 1642 1643 /* 1644 * Early console initialization (before VM subsystem initialized). 1645 */ 1646 static int __init atmel_console_init(void) 1647 { 1648 if (atmel_default_console_device) { 1649 struct atmel_uart_data *pdata = 1650 atmel_default_console_device->dev.platform_data; 1651 int id = pdata->num; 1652 struct atmel_uart_port *port = &atmel_ports[id]; 1653 1654 port->backup_imr = 0; 1655 port->uart.line = id; 1656 1657 add_preferred_console(ATMEL_DEVICENAME, id, NULL); 1658 atmel_init_port(port, atmel_default_console_device); 1659 register_console(&atmel_console); 1660 } 1661 1662 return 0; 1663 } 1664 1665 console_initcall(atmel_console_init); 1666 1667 /* 1668 * Late console initialization. 1669 */ 1670 static int __init atmel_late_console_init(void) 1671 { 1672 if (atmel_default_console_device 1673 && !(atmel_console.flags & CON_ENABLED)) 1674 register_console(&atmel_console); 1675 1676 return 0; 1677 } 1678 1679 core_initcall(atmel_late_console_init); 1680 1681 static inline bool atmel_is_console_port(struct uart_port *port) 1682 { 1683 return port->cons && port->cons->index == port->line; 1684 } 1685 1686 #else 1687 #define ATMEL_CONSOLE_DEVICE NULL 1688 1689 static inline bool atmel_is_console_port(struct uart_port *port) 1690 { 1691 return false; 1692 } 1693 #endif 1694 1695 static struct uart_driver atmel_uart = { 1696 .owner = THIS_MODULE, 1697 .driver_name = "atmel_serial", 1698 .dev_name = ATMEL_DEVICENAME, 1699 .major = SERIAL_ATMEL_MAJOR, 1700 .minor = MINOR_START, 1701 .nr = ATMEL_MAX_UART, 1702 .cons = ATMEL_CONSOLE_DEVICE, 1703 }; 1704 1705 #ifdef CONFIG_PM 1706 static bool atmel_serial_clk_will_stop(void) 1707 { 1708 #ifdef CONFIG_ARCH_AT91 1709 return at91_suspend_entering_slow_clock(); 1710 #else 1711 return false; 1712 #endif 1713 } 1714 1715 static int atmel_serial_suspend(struct platform_device *pdev, 1716 pm_message_t state) 1717 { 1718 struct uart_port *port = platform_get_drvdata(pdev); 1719 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1720 1721 if (atmel_is_console_port(port) && console_suspend_enabled) { 1722 /* Drain the TX shifter */ 1723 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) 1724 cpu_relax(); 1725 } 1726 1727 /* we can not wake up if we're running on slow clock */ 1728 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev); 1729 if (atmel_serial_clk_will_stop()) 1730 device_set_wakeup_enable(&pdev->dev, 0); 1731 1732 uart_suspend_port(&atmel_uart, port); 1733 1734 return 0; 1735 } 1736 1737 static int atmel_serial_resume(struct platform_device *pdev) 1738 { 1739 struct uart_port *port = platform_get_drvdata(pdev); 1740 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1741 1742 uart_resume_port(&atmel_uart, port); 1743 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup); 1744 1745 return 0; 1746 } 1747 #else 1748 #define atmel_serial_suspend NULL 1749 #define atmel_serial_resume NULL 1750 #endif 1751 1752 static int atmel_serial_probe(struct platform_device *pdev) 1753 { 1754 struct atmel_uart_port *port; 1755 struct device_node *np = pdev->dev.of_node; 1756 struct atmel_uart_data *pdata = pdev->dev.platform_data; 1757 void *data; 1758 int ret = -ENODEV; 1759 struct pinctrl *pinctrl; 1760 1761 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); 1762 1763 if (np) 1764 ret = of_alias_get_id(np, "serial"); 1765 else 1766 if (pdata) 1767 ret = pdata->num; 1768 1769 if (ret < 0) 1770 /* port id not found in platform data nor device-tree aliases: 1771 * auto-enumerate it */ 1772 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART); 1773 1774 if (ret >= ATMEL_MAX_UART) { 1775 ret = -ENODEV; 1776 goto err; 1777 } 1778 1779 if (test_and_set_bit(ret, atmel_ports_in_use)) { 1780 /* port already in use */ 1781 ret = -EBUSY; 1782 goto err; 1783 } 1784 1785 port = &atmel_ports[ret]; 1786 port->backup_imr = 0; 1787 port->uart.line = ret; 1788 1789 atmel_init_port(port, pdev); 1790 1791 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 1792 if (IS_ERR(pinctrl)) { 1793 ret = PTR_ERR(pinctrl); 1794 goto err; 1795 } 1796 1797 if (!atmel_use_dma_rx(&port->uart)) { 1798 ret = -ENOMEM; 1799 data = kmalloc(sizeof(struct atmel_uart_char) 1800 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL); 1801 if (!data) 1802 goto err_alloc_ring; 1803 port->rx_ring.buf = data; 1804 } 1805 1806 ret = uart_add_one_port(&atmel_uart, &port->uart); 1807 if (ret) 1808 goto err_add_port; 1809 1810 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE 1811 if (atmel_is_console_port(&port->uart) 1812 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) { 1813 /* 1814 * The serial core enabled the clock for us, so undo 1815 * the clk_enable() in atmel_console_setup() 1816 */ 1817 clk_disable(port->clk); 1818 } 1819 #endif 1820 1821 device_init_wakeup(&pdev->dev, 1); 1822 platform_set_drvdata(pdev, port); 1823 1824 if (port->rs485.flags & SER_RS485_ENABLED) { 1825 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL); 1826 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN); 1827 } 1828 1829 return 0; 1830 1831 err_add_port: 1832 kfree(port->rx_ring.buf); 1833 port->rx_ring.buf = NULL; 1834 err_alloc_ring: 1835 if (!atmel_is_console_port(&port->uart)) { 1836 clk_put(port->clk); 1837 port->clk = NULL; 1838 } 1839 err: 1840 return ret; 1841 } 1842 1843 static int atmel_serial_remove(struct platform_device *pdev) 1844 { 1845 struct uart_port *port = platform_get_drvdata(pdev); 1846 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1847 int ret = 0; 1848 1849 device_init_wakeup(&pdev->dev, 0); 1850 platform_set_drvdata(pdev, NULL); 1851 1852 ret = uart_remove_one_port(&atmel_uart, port); 1853 1854 tasklet_kill(&atmel_port->tasklet); 1855 kfree(atmel_port->rx_ring.buf); 1856 1857 /* "port" is allocated statically, so we shouldn't free it */ 1858 1859 clear_bit(port->line, atmel_ports_in_use); 1860 1861 clk_put(atmel_port->clk); 1862 1863 return ret; 1864 } 1865 1866 static struct platform_driver atmel_serial_driver = { 1867 .probe = atmel_serial_probe, 1868 .remove = atmel_serial_remove, 1869 .suspend = atmel_serial_suspend, 1870 .resume = atmel_serial_resume, 1871 .driver = { 1872 .name = "atmel_usart", 1873 .owner = THIS_MODULE, 1874 .of_match_table = of_match_ptr(atmel_serial_dt_ids), 1875 }, 1876 }; 1877 1878 static int __init atmel_serial_init(void) 1879 { 1880 int ret; 1881 1882 ret = uart_register_driver(&atmel_uart); 1883 if (ret) 1884 return ret; 1885 1886 ret = platform_driver_register(&atmel_serial_driver); 1887 if (ret) 1888 uart_unregister_driver(&atmel_uart); 1889 1890 return ret; 1891 } 1892 1893 static void __exit atmel_serial_exit(void) 1894 { 1895 platform_driver_unregister(&atmel_serial_driver); 1896 uart_unregister_driver(&atmel_uart); 1897 } 1898 1899 module_init(atmel_serial_init); 1900 module_exit(atmel_serial_exit); 1901 1902 MODULE_AUTHOR("Rick Bronson"); 1903 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver"); 1904 MODULE_LICENSE("GPL"); 1905 MODULE_ALIAS("platform:atmel_usart"); 1906