1 /* 2 * Atheros AR933X SoC built-in UART driver 3 * 4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 5 * 6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published 10 * by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/ioport.h> 15 #include <linux/init.h> 16 #include <linux/console.h> 17 #include <linux/sysrq.h> 18 #include <linux/delay.h> 19 #include <linux/platform_device.h> 20 #include <linux/of.h> 21 #include <linux/of_platform.h> 22 #include <linux/tty.h> 23 #include <linux/tty_flip.h> 24 #include <linux/serial_core.h> 25 #include <linux/serial.h> 26 #include <linux/slab.h> 27 #include <linux/io.h> 28 #include <linux/irq.h> 29 #include <linux/clk.h> 30 31 #include <asm/div64.h> 32 33 #include <asm/mach-ath79/ar933x_uart.h> 34 35 #define DRIVER_NAME "ar933x-uart" 36 37 #define AR933X_UART_MAX_SCALE 0xff 38 #define AR933X_UART_MAX_STEP 0xffff 39 40 #define AR933X_UART_MIN_BAUD 300 41 #define AR933X_UART_MAX_BAUD 3000000 42 43 #define AR933X_DUMMY_STATUS_RD 0x01 44 45 static struct uart_driver ar933x_uart_driver; 46 47 struct ar933x_uart_port { 48 struct uart_port port; 49 unsigned int ier; /* shadow Interrupt Enable Register */ 50 unsigned int min_baud; 51 unsigned int max_baud; 52 struct clk *clk; 53 }; 54 55 static inline bool ar933x_uart_console_enabled(void) 56 { 57 return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE); 58 } 59 60 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, 61 int offset) 62 { 63 return readl(up->port.membase + offset); 64 } 65 66 static inline void ar933x_uart_write(struct ar933x_uart_port *up, 67 int offset, unsigned int value) 68 { 69 writel(value, up->port.membase + offset); 70 } 71 72 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, 73 unsigned int offset, 74 unsigned int mask, 75 unsigned int val) 76 { 77 unsigned int t; 78 79 t = ar933x_uart_read(up, offset); 80 t &= ~mask; 81 t |= val; 82 ar933x_uart_write(up, offset, t); 83 } 84 85 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, 86 unsigned int offset, 87 unsigned int val) 88 { 89 ar933x_uart_rmw(up, offset, 0, val); 90 } 91 92 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, 93 unsigned int offset, 94 unsigned int val) 95 { 96 ar933x_uart_rmw(up, offset, val, 0); 97 } 98 99 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) 100 { 101 up->ier |= AR933X_UART_INT_TX_EMPTY; 102 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 103 } 104 105 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) 106 { 107 up->ier &= ~AR933X_UART_INT_TX_EMPTY; 108 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 109 } 110 111 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) 112 { 113 unsigned int rdata; 114 115 rdata = ch & AR933X_UART_DATA_TX_RX_MASK; 116 rdata |= AR933X_UART_DATA_TX_CSR; 117 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); 118 } 119 120 static unsigned int ar933x_uart_tx_empty(struct uart_port *port) 121 { 122 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 123 unsigned long flags; 124 unsigned int rdata; 125 126 spin_lock_irqsave(&up->port.lock, flags); 127 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 128 spin_unlock_irqrestore(&up->port.lock, flags); 129 130 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; 131 } 132 133 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) 134 { 135 return TIOCM_CAR; 136 } 137 138 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 139 { 140 } 141 142 static void ar933x_uart_start_tx(struct uart_port *port) 143 { 144 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 145 146 ar933x_uart_start_tx_interrupt(up); 147 } 148 149 static void ar933x_uart_stop_tx(struct uart_port *port) 150 { 151 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 152 153 ar933x_uart_stop_tx_interrupt(up); 154 } 155 156 static void ar933x_uart_stop_rx(struct uart_port *port) 157 { 158 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 159 160 up->ier &= ~AR933X_UART_INT_RX_VALID; 161 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 162 } 163 164 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) 165 { 166 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 167 unsigned long flags; 168 169 spin_lock_irqsave(&up->port.lock, flags); 170 if (break_state == -1) 171 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 172 AR933X_UART_CS_TX_BREAK); 173 else 174 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 175 AR933X_UART_CS_TX_BREAK); 176 spin_unlock_irqrestore(&up->port.lock, flags); 177 } 178 179 /* 180 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) 181 */ 182 static unsigned long ar933x_uart_get_baud(unsigned int clk, 183 unsigned int scale, 184 unsigned int step) 185 { 186 u64 t; 187 u32 div; 188 189 div = (2 << 16) * (scale + 1); 190 t = clk; 191 t *= step; 192 t += (div / 2); 193 do_div(t, div); 194 195 return t; 196 } 197 198 static void ar933x_uart_get_scale_step(unsigned int clk, 199 unsigned int baud, 200 unsigned int *scale, 201 unsigned int *step) 202 { 203 unsigned int tscale; 204 long min_diff; 205 206 *scale = 0; 207 *step = 0; 208 209 min_diff = baud; 210 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { 211 u64 tstep; 212 int diff; 213 214 tstep = baud * (tscale + 1); 215 tstep *= (2 << 16); 216 do_div(tstep, clk); 217 218 if (tstep > AR933X_UART_MAX_STEP) 219 break; 220 221 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); 222 if (diff < min_diff) { 223 min_diff = diff; 224 *scale = tscale; 225 *step = tstep; 226 } 227 } 228 } 229 230 static void ar933x_uart_set_termios(struct uart_port *port, 231 struct ktermios *new, 232 struct ktermios *old) 233 { 234 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 235 unsigned int cs; 236 unsigned long flags; 237 unsigned int baud, scale, step; 238 239 /* Only CS8 is supported */ 240 new->c_cflag &= ~CSIZE; 241 new->c_cflag |= CS8; 242 243 /* Only one stop bit is supported */ 244 new->c_cflag &= ~CSTOPB; 245 246 cs = 0; 247 if (new->c_cflag & PARENB) { 248 if (!(new->c_cflag & PARODD)) 249 cs |= AR933X_UART_CS_PARITY_EVEN; 250 else 251 cs |= AR933X_UART_CS_PARITY_ODD; 252 } else { 253 cs |= AR933X_UART_CS_PARITY_NONE; 254 } 255 256 /* Mark/space parity is not supported */ 257 new->c_cflag &= ~CMSPAR; 258 259 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); 260 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); 261 262 /* 263 * Ok, we're now changing the port state. Do it with 264 * interrupts disabled. 265 */ 266 spin_lock_irqsave(&up->port.lock, flags); 267 268 /* disable the UART */ 269 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 270 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); 271 272 /* Update the per-port timeout. */ 273 uart_update_timeout(port, new->c_cflag, baud); 274 275 up->port.ignore_status_mask = 0; 276 277 /* ignore all characters if CREAD is not set */ 278 if ((new->c_cflag & CREAD) == 0) 279 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; 280 281 ar933x_uart_write(up, AR933X_UART_CLOCK_REG, 282 scale << AR933X_UART_CLOCK_SCALE_S | step); 283 284 /* setup configuration register */ 285 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); 286 287 /* enable host interrupt */ 288 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 289 AR933X_UART_CS_HOST_INT_EN); 290 291 /* reenable the UART */ 292 ar933x_uart_rmw(up, AR933X_UART_CS_REG, 293 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, 294 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); 295 296 spin_unlock_irqrestore(&up->port.lock, flags); 297 298 if (tty_termios_baud_rate(new)) 299 tty_termios_encode_baud_rate(new, baud, baud); 300 } 301 302 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) 303 { 304 struct tty_port *port = &up->port.state->port; 305 int max_count = 256; 306 307 do { 308 unsigned int rdata; 309 unsigned char ch; 310 311 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 312 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) 313 break; 314 315 /* remove the character from the FIFO */ 316 ar933x_uart_write(up, AR933X_UART_DATA_REG, 317 AR933X_UART_DATA_RX_CSR); 318 319 up->port.icount.rx++; 320 ch = rdata & AR933X_UART_DATA_TX_RX_MASK; 321 322 if (uart_handle_sysrq_char(&up->port, ch)) 323 continue; 324 325 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) 326 tty_insert_flip_char(port, ch, TTY_NORMAL); 327 } while (max_count-- > 0); 328 329 spin_unlock(&up->port.lock); 330 tty_flip_buffer_push(port); 331 spin_lock(&up->port.lock); 332 } 333 334 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) 335 { 336 struct circ_buf *xmit = &up->port.state->xmit; 337 int count; 338 339 if (uart_tx_stopped(&up->port)) 340 return; 341 342 count = up->port.fifosize; 343 do { 344 unsigned int rdata; 345 346 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 347 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) 348 break; 349 350 if (up->port.x_char) { 351 ar933x_uart_putc(up, up->port.x_char); 352 up->port.icount.tx++; 353 up->port.x_char = 0; 354 continue; 355 } 356 357 if (uart_circ_empty(xmit)) 358 break; 359 360 ar933x_uart_putc(up, xmit->buf[xmit->tail]); 361 362 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 363 up->port.icount.tx++; 364 } while (--count > 0); 365 366 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 367 uart_write_wakeup(&up->port); 368 369 if (!uart_circ_empty(xmit)) 370 ar933x_uart_start_tx_interrupt(up); 371 } 372 373 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) 374 { 375 struct ar933x_uart_port *up = dev_id; 376 unsigned int status; 377 378 status = ar933x_uart_read(up, AR933X_UART_CS_REG); 379 if ((status & AR933X_UART_CS_HOST_INT) == 0) 380 return IRQ_NONE; 381 382 spin_lock(&up->port.lock); 383 384 status = ar933x_uart_read(up, AR933X_UART_INT_REG); 385 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); 386 387 if (status & AR933X_UART_INT_RX_VALID) { 388 ar933x_uart_write(up, AR933X_UART_INT_REG, 389 AR933X_UART_INT_RX_VALID); 390 ar933x_uart_rx_chars(up); 391 } 392 393 if (status & AR933X_UART_INT_TX_EMPTY) { 394 ar933x_uart_write(up, AR933X_UART_INT_REG, 395 AR933X_UART_INT_TX_EMPTY); 396 ar933x_uart_stop_tx_interrupt(up); 397 ar933x_uart_tx_chars(up); 398 } 399 400 spin_unlock(&up->port.lock); 401 402 return IRQ_HANDLED; 403 } 404 405 static int ar933x_uart_startup(struct uart_port *port) 406 { 407 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 408 unsigned long flags; 409 int ret; 410 411 ret = request_irq(up->port.irq, ar933x_uart_interrupt, 412 up->port.irqflags, dev_name(up->port.dev), up); 413 if (ret) 414 return ret; 415 416 spin_lock_irqsave(&up->port.lock, flags); 417 418 /* Enable HOST interrupts */ 419 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 420 AR933X_UART_CS_HOST_INT_EN); 421 422 /* Enable RX interrupts */ 423 up->ier = AR933X_UART_INT_RX_VALID; 424 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 425 426 spin_unlock_irqrestore(&up->port.lock, flags); 427 428 return 0; 429 } 430 431 static void ar933x_uart_shutdown(struct uart_port *port) 432 { 433 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 434 435 /* Disable all interrupts */ 436 up->ier = 0; 437 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 438 439 /* Disable break condition */ 440 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 441 AR933X_UART_CS_TX_BREAK); 442 443 free_irq(up->port.irq, up); 444 } 445 446 static const char *ar933x_uart_type(struct uart_port *port) 447 { 448 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; 449 } 450 451 static void ar933x_uart_release_port(struct uart_port *port) 452 { 453 /* Nothing to release ... */ 454 } 455 456 static int ar933x_uart_request_port(struct uart_port *port) 457 { 458 /* UARTs always present */ 459 return 0; 460 } 461 462 static void ar933x_uart_config_port(struct uart_port *port, int flags) 463 { 464 if (flags & UART_CONFIG_TYPE) 465 port->type = PORT_AR933X; 466 } 467 468 static int ar933x_uart_verify_port(struct uart_port *port, 469 struct serial_struct *ser) 470 { 471 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 472 473 if (ser->type != PORT_UNKNOWN && 474 ser->type != PORT_AR933X) 475 return -EINVAL; 476 477 if (ser->irq < 0 || ser->irq >= NR_IRQS) 478 return -EINVAL; 479 480 if (ser->baud_base < up->min_baud || 481 ser->baud_base > up->max_baud) 482 return -EINVAL; 483 484 return 0; 485 } 486 487 static struct uart_ops ar933x_uart_ops = { 488 .tx_empty = ar933x_uart_tx_empty, 489 .set_mctrl = ar933x_uart_set_mctrl, 490 .get_mctrl = ar933x_uart_get_mctrl, 491 .stop_tx = ar933x_uart_stop_tx, 492 .start_tx = ar933x_uart_start_tx, 493 .stop_rx = ar933x_uart_stop_rx, 494 .break_ctl = ar933x_uart_break_ctl, 495 .startup = ar933x_uart_startup, 496 .shutdown = ar933x_uart_shutdown, 497 .set_termios = ar933x_uart_set_termios, 498 .type = ar933x_uart_type, 499 .release_port = ar933x_uart_release_port, 500 .request_port = ar933x_uart_request_port, 501 .config_port = ar933x_uart_config_port, 502 .verify_port = ar933x_uart_verify_port, 503 }; 504 505 static struct ar933x_uart_port * 506 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; 507 508 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) 509 { 510 unsigned int status; 511 unsigned int timeout = 60000; 512 513 /* Wait up to 60ms for the character(s) to be sent. */ 514 do { 515 status = ar933x_uart_read(up, AR933X_UART_DATA_REG); 516 if (--timeout == 0) 517 break; 518 udelay(1); 519 } while ((status & AR933X_UART_DATA_TX_CSR) == 0); 520 } 521 522 static void ar933x_uart_console_putchar(struct uart_port *port, int ch) 523 { 524 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; 525 526 ar933x_uart_wait_xmitr(up); 527 ar933x_uart_putc(up, ch); 528 } 529 530 static void ar933x_uart_console_write(struct console *co, const char *s, 531 unsigned int count) 532 { 533 struct ar933x_uart_port *up = ar933x_console_ports[co->index]; 534 unsigned long flags; 535 unsigned int int_en; 536 int locked = 1; 537 538 local_irq_save(flags); 539 540 if (up->port.sysrq) 541 locked = 0; 542 else if (oops_in_progress) 543 locked = spin_trylock(&up->port.lock); 544 else 545 spin_lock(&up->port.lock); 546 547 /* 548 * First save the IER then disable the interrupts 549 */ 550 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); 551 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); 552 553 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); 554 555 /* 556 * Finally, wait for transmitter to become empty 557 * and restore the IER 558 */ 559 ar933x_uart_wait_xmitr(up); 560 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); 561 562 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); 563 564 if (locked) 565 spin_unlock(&up->port.lock); 566 567 local_irq_restore(flags); 568 } 569 570 static int ar933x_uart_console_setup(struct console *co, char *options) 571 { 572 struct ar933x_uart_port *up; 573 int baud = 115200; 574 int bits = 8; 575 int parity = 'n'; 576 int flow = 'n'; 577 578 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) 579 return -EINVAL; 580 581 up = ar933x_console_ports[co->index]; 582 if (!up) 583 return -ENODEV; 584 585 if (options) 586 uart_parse_options(options, &baud, &parity, &bits, &flow); 587 588 return uart_set_options(&up->port, co, baud, parity, bits, flow); 589 } 590 591 static struct console ar933x_uart_console = { 592 .name = "ttyATH", 593 .write = ar933x_uart_console_write, 594 .device = uart_console_device, 595 .setup = ar933x_uart_console_setup, 596 .flags = CON_PRINTBUFFER, 597 .index = -1, 598 .data = &ar933x_uart_driver, 599 }; 600 601 static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) 602 { 603 if (!ar933x_uart_console_enabled()) 604 return; 605 606 ar933x_console_ports[up->port.line] = up; 607 } 608 609 static struct uart_driver ar933x_uart_driver = { 610 .owner = THIS_MODULE, 611 .driver_name = DRIVER_NAME, 612 .dev_name = "ttyATH", 613 .nr = CONFIG_SERIAL_AR933X_NR_UARTS, 614 .cons = NULL, /* filled in runtime */ 615 }; 616 617 static int ar933x_uart_probe(struct platform_device *pdev) 618 { 619 struct ar933x_uart_port *up; 620 struct uart_port *port; 621 struct resource *mem_res; 622 struct resource *irq_res; 623 struct device_node *np; 624 unsigned int baud; 625 int id; 626 int ret; 627 628 np = pdev->dev.of_node; 629 if (config_enabled(CONFIG_OF) && np) { 630 id = of_alias_get_id(np, "serial"); 631 if (id < 0) { 632 dev_err(&pdev->dev, "unable to get alias id, err=%d\n", 633 id); 634 return id; 635 } 636 } else { 637 id = pdev->id; 638 if (id == -1) 639 id = 0; 640 } 641 642 if (id > CONFIG_SERIAL_AR933X_NR_UARTS) 643 return -EINVAL; 644 645 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 646 if (!irq_res) { 647 dev_err(&pdev->dev, "no IRQ resource\n"); 648 return -EINVAL; 649 } 650 651 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), 652 GFP_KERNEL); 653 if (!up) 654 return -ENOMEM; 655 656 up->clk = devm_clk_get(&pdev->dev, "uart"); 657 if (IS_ERR(up->clk)) { 658 dev_err(&pdev->dev, "unable to get UART clock\n"); 659 return PTR_ERR(up->clk); 660 } 661 662 port = &up->port; 663 664 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 665 port->membase = devm_ioremap_resource(&pdev->dev, mem_res); 666 if (IS_ERR(port->membase)) 667 return PTR_ERR(port->membase); 668 669 ret = clk_prepare_enable(up->clk); 670 if (ret) 671 return ret; 672 673 port->uartclk = clk_get_rate(up->clk); 674 if (!port->uartclk) { 675 ret = -EINVAL; 676 goto err_disable_clk; 677 } 678 679 port->mapbase = mem_res->start; 680 port->line = id; 681 port->irq = irq_res->start; 682 port->dev = &pdev->dev; 683 port->type = PORT_AR933X; 684 port->iotype = UPIO_MEM32; 685 686 port->regshift = 2; 687 port->fifosize = AR933X_UART_FIFO_SIZE; 688 port->ops = &ar933x_uart_ops; 689 690 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); 691 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); 692 693 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); 694 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); 695 696 ar933x_uart_add_console_port(up); 697 698 ret = uart_add_one_port(&ar933x_uart_driver, &up->port); 699 if (ret) 700 goto err_disable_clk; 701 702 platform_set_drvdata(pdev, up); 703 return 0; 704 705 err_disable_clk: 706 clk_disable_unprepare(up->clk); 707 return ret; 708 } 709 710 static int ar933x_uart_remove(struct platform_device *pdev) 711 { 712 struct ar933x_uart_port *up; 713 714 up = platform_get_drvdata(pdev); 715 716 if (up) { 717 uart_remove_one_port(&ar933x_uart_driver, &up->port); 718 clk_disable_unprepare(up->clk); 719 } 720 721 return 0; 722 } 723 724 #ifdef CONFIG_OF 725 static const struct of_device_id ar933x_uart_of_ids[] = { 726 { .compatible = "qca,ar9330-uart" }, 727 {}, 728 }; 729 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids); 730 #endif 731 732 static struct platform_driver ar933x_uart_platform_driver = { 733 .probe = ar933x_uart_probe, 734 .remove = ar933x_uart_remove, 735 .driver = { 736 .name = DRIVER_NAME, 737 .owner = THIS_MODULE, 738 .of_match_table = of_match_ptr(ar933x_uart_of_ids), 739 }, 740 }; 741 742 static int __init ar933x_uart_init(void) 743 { 744 int ret; 745 746 if (ar933x_uart_console_enabled()) 747 ar933x_uart_driver.cons = &ar933x_uart_console; 748 749 ret = uart_register_driver(&ar933x_uart_driver); 750 if (ret) 751 goto err_out; 752 753 ret = platform_driver_register(&ar933x_uart_platform_driver); 754 if (ret) 755 goto err_unregister_uart_driver; 756 757 return 0; 758 759 err_unregister_uart_driver: 760 uart_unregister_driver(&ar933x_uart_driver); 761 err_out: 762 return ret; 763 } 764 765 static void __exit ar933x_uart_exit(void) 766 { 767 platform_driver_unregister(&ar933x_uart_platform_driver); 768 uart_unregister_driver(&ar933x_uart_driver); 769 } 770 771 module_init(ar933x_uart_init); 772 module_exit(ar933x_uart_exit); 773 774 MODULE_DESCRIPTION("Atheros AR933X UART driver"); 775 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); 776 MODULE_LICENSE("GPL v2"); 777 MODULE_ALIAS("platform:" DRIVER_NAME); 778