xref: /openbmc/linux/drivers/tty/serial/altera_uart.c (revision d9c12811) 
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * altera_uart.c -- Altera UART driver
4  *
5  * Based on mcf.c -- Freescale ColdFire UART driver
6  *
7  * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8  * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
9  * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/console.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/serial.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/io.h>
25 #include <linux/altera_uart.h>
26 
27 #define DRV_NAME "altera_uart"
28 #define SERIAL_ALTERA_MAJOR 204
29 #define SERIAL_ALTERA_MINOR 213
30 
31 /*
32  * Altera UART register definitions according to the Nios UART datasheet:
33  * http://www.altera.com/literature/ds/ds_nios_uart.pdf
34  */
35 
36 #define ALTERA_UART_SIZE		32
37 
38 #define ALTERA_UART_RXDATA_REG		0
39 #define ALTERA_UART_TXDATA_REG		4
40 #define ALTERA_UART_STATUS_REG		8
41 #define ALTERA_UART_CONTROL_REG		12
42 #define ALTERA_UART_DIVISOR_REG		16
43 #define ALTERA_UART_EOP_REG		20
44 
45 #define ALTERA_UART_STATUS_PE_MSK	0x0001	/* parity error */
46 #define ALTERA_UART_STATUS_FE_MSK	0x0002	/* framing error */
47 #define ALTERA_UART_STATUS_BRK_MSK	0x0004	/* break */
48 #define ALTERA_UART_STATUS_ROE_MSK	0x0008	/* RX overrun error */
49 #define ALTERA_UART_STATUS_TOE_MSK	0x0010	/* TX overrun error */
50 #define ALTERA_UART_STATUS_TMT_MSK	0x0020	/* TX shift register state */
51 #define ALTERA_UART_STATUS_TRDY_MSK	0x0040	/* TX ready */
52 #define ALTERA_UART_STATUS_RRDY_MSK	0x0080	/* RX ready */
53 #define ALTERA_UART_STATUS_E_MSK	0x0100	/* exception condition */
54 #define ALTERA_UART_STATUS_DCTS_MSK	0x0400	/* CTS logic-level change */
55 #define ALTERA_UART_STATUS_CTS_MSK	0x0800	/* CTS logic state */
56 #define ALTERA_UART_STATUS_EOP_MSK	0x1000	/* EOP written/read */
57 
58 						/* Enable interrupt on... */
59 #define ALTERA_UART_CONTROL_PE_MSK	0x0001	/* ...parity error */
60 #define ALTERA_UART_CONTROL_FE_MSK	0x0002	/* ...framing error */
61 #define ALTERA_UART_CONTROL_BRK_MSK	0x0004	/* ...break */
62 #define ALTERA_UART_CONTROL_ROE_MSK	0x0008	/* ...RX overrun */
63 #define ALTERA_UART_CONTROL_TOE_MSK	0x0010	/* ...TX overrun */
64 #define ALTERA_UART_CONTROL_TMT_MSK	0x0020	/* ...TX shift register empty */
65 #define ALTERA_UART_CONTROL_TRDY_MSK	0x0040	/* ...TX ready */
66 #define ALTERA_UART_CONTROL_RRDY_MSK	0x0080	/* ...RX ready */
67 #define ALTERA_UART_CONTROL_E_MSK	0x0100	/* ...exception*/
68 
69 #define ALTERA_UART_CONTROL_TRBK_MSK	0x0200	/* TX break */
70 #define ALTERA_UART_CONTROL_DCTS_MSK	0x0400	/* Interrupt on CTS change */
71 #define ALTERA_UART_CONTROL_RTS_MSK	0x0800	/* RTS signal */
72 #define ALTERA_UART_CONTROL_EOP_MSK	0x1000	/* Interrupt on EOP */
73 
74 /*
75  * Local per-uart structure.
76  */
77 struct altera_uart {
78 	struct uart_port port;
79 	struct timer_list tmr;
80 	unsigned int sigs;	/* Local copy of line sigs */
81 	unsigned short imr;	/* Local IMR mirror */
82 };
83 
84 static u32 altera_uart_readl(struct uart_port *port, int reg)
85 {
86 	return readl(port->membase + (reg << port->regshift));
87 }
88 
89 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
90 {
91 	writel(dat, port->membase + (reg << port->regshift));
92 }
93 
94 static unsigned int altera_uart_tx_empty(struct uart_port *port)
95 {
96 	return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
97 		ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
98 }
99 
100 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
101 {
102 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
103 	unsigned int sigs;
104 
105 	sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
106 	     ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
107 	sigs |= (pp->sigs & TIOCM_RTS);
108 
109 	return sigs;
110 }
111 
112 static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
113 {
114 	unsigned short imr = pp->imr;
115 
116 	/*
117 	 * If the device doesn't have an irq, ensure that the irq bits are
118 	 * masked out to keep the irq line inactive.
119 	 */
120 	if (!pp->port.irq)
121 		imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
122 
123 	altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
124 }
125 
126 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
127 {
128 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
129 
130 	pp->sigs = sigs;
131 	if (sigs & TIOCM_RTS)
132 		pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
133 	else
134 		pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
135 	altera_uart_update_ctrl_reg(pp);
136 }
137 
138 static void altera_uart_start_tx(struct uart_port *port)
139 {
140 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
141 
142 	pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
143 	altera_uart_update_ctrl_reg(pp);
144 }
145 
146 static void altera_uart_stop_tx(struct uart_port *port)
147 {
148 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
149 
150 	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
151 	altera_uart_update_ctrl_reg(pp);
152 }
153 
154 static void altera_uart_stop_rx(struct uart_port *port)
155 {
156 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
157 
158 	pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
159 	altera_uart_update_ctrl_reg(pp);
160 }
161 
162 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
163 {
164 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
165 	unsigned long flags;
166 
167 	spin_lock_irqsave(&port->lock, flags);
168 	if (break_state == -1)
169 		pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
170 	else
171 		pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
172 	altera_uart_update_ctrl_reg(pp);
173 	spin_unlock_irqrestore(&port->lock, flags);
174 }
175 
176 static void altera_uart_set_termios(struct uart_port *port,
177 				    struct ktermios *termios,
178 				    const struct ktermios *old)
179 {
180 	unsigned long flags;
181 	unsigned int baud, baudclk;
182 
183 	baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
184 	baudclk = port->uartclk / baud;
185 
186 	if (old)
187 		tty_termios_copy_hw(termios, old);
188 	tty_termios_encode_baud_rate(termios, baud, baud);
189 
190 	spin_lock_irqsave(&port->lock, flags);
191 	uart_update_timeout(port, termios->c_cflag, baud);
192 	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
193 	spin_unlock_irqrestore(&port->lock, flags);
194 
195 	/*
196 	 * FIXME: port->read_status_mask and port->ignore_status_mask
197 	 * need to be initialized based on termios settings for
198 	 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
199 	 */
200 }
201 
202 static void altera_uart_rx_chars(struct altera_uart *pp)
203 {
204 	struct uart_port *port = &pp->port;
205 	unsigned char ch, flag;
206 	unsigned short status;
207 
208 	while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
209 	       ALTERA_UART_STATUS_RRDY_MSK) {
210 		ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
211 		flag = TTY_NORMAL;
212 		port->icount.rx++;
213 
214 		if (status & ALTERA_UART_STATUS_E_MSK) {
215 			altera_uart_writel(port, status,
216 					   ALTERA_UART_STATUS_REG);
217 
218 			if (status & ALTERA_UART_STATUS_BRK_MSK) {
219 				port->icount.brk++;
220 				if (uart_handle_break(port))
221 					continue;
222 			} else if (status & ALTERA_UART_STATUS_PE_MSK) {
223 				port->icount.parity++;
224 			} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
225 				port->icount.overrun++;
226 			} else if (status & ALTERA_UART_STATUS_FE_MSK) {
227 				port->icount.frame++;
228 			}
229 
230 			status &= port->read_status_mask;
231 
232 			if (status & ALTERA_UART_STATUS_BRK_MSK)
233 				flag = TTY_BREAK;
234 			else if (status & ALTERA_UART_STATUS_PE_MSK)
235 				flag = TTY_PARITY;
236 			else if (status & ALTERA_UART_STATUS_FE_MSK)
237 				flag = TTY_FRAME;
238 		}
239 
240 		if (uart_handle_sysrq_char(port, ch))
241 			continue;
242 		uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
243 				 flag);
244 	}
245 
246 	tty_flip_buffer_push(&port->state->port);
247 }
248 
249 static void altera_uart_tx_chars(struct altera_uart *pp)
250 {
251 	struct uart_port *port = &pp->port;
252 	struct circ_buf *xmit = &port->state->xmit;
253 
254 	if (port->x_char) {
255 		/* Send special char - probably flow control */
256 		altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
257 		port->x_char = 0;
258 		port->icount.tx++;
259 		return;
260 	}
261 
262 	while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
263 	       ALTERA_UART_STATUS_TRDY_MSK) {
264 		if (xmit->head == xmit->tail)
265 			break;
266 		altera_uart_writel(port, xmit->buf[xmit->tail],
267 		       ALTERA_UART_TXDATA_REG);
268 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
269 		port->icount.tx++;
270 	}
271 
272 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
273 		uart_write_wakeup(port);
274 
275 	if (uart_circ_empty(xmit))
276 		altera_uart_stop_tx(port);
277 }
278 
279 static irqreturn_t altera_uart_interrupt(int irq, void *data)
280 {
281 	struct uart_port *port = data;
282 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
283 	unsigned int isr;
284 
285 	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
286 
287 	spin_lock(&port->lock);
288 	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
289 		altera_uart_rx_chars(pp);
290 	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
291 		altera_uart_tx_chars(pp);
292 	spin_unlock(&port->lock);
293 
294 	return IRQ_RETVAL(isr);
295 }
296 
297 static void altera_uart_timer(struct timer_list *t)
298 {
299 	struct altera_uart *pp = from_timer(pp, t, tmr);
300 	struct uart_port *port = &pp->port;
301 
302 	altera_uart_interrupt(0, port);
303 	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
304 }
305 
306 static void altera_uart_config_port(struct uart_port *port, int flags)
307 {
308 	port->type = PORT_ALTERA_UART;
309 
310 	/* Clear mask, so no surprise interrupts. */
311 	altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
312 	/* Clear status register */
313 	altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
314 }
315 
316 static int altera_uart_startup(struct uart_port *port)
317 {
318 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
319 	unsigned long flags;
320 
321 	if (!port->irq) {
322 		timer_setup(&pp->tmr, altera_uart_timer, 0);
323 		mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
324 	} else {
325 		int ret;
326 
327 		ret = request_irq(port->irq, altera_uart_interrupt, 0,
328 				DRV_NAME, port);
329 		if (ret) {
330 			pr_err(DRV_NAME ": unable to attach Altera UART %d "
331 			       "interrupt vector=%d\n", port->line, port->irq);
332 			return ret;
333 		}
334 	}
335 
336 	spin_lock_irqsave(&port->lock, flags);
337 
338 	/* Enable RX interrupts now */
339 	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
340 	altera_uart_update_ctrl_reg(pp);
341 
342 	spin_unlock_irqrestore(&port->lock, flags);
343 
344 	return 0;
345 }
346 
347 static void altera_uart_shutdown(struct uart_port *port)
348 {
349 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
350 	unsigned long flags;
351 
352 	spin_lock_irqsave(&port->lock, flags);
353 
354 	/* Disable all interrupts now */
355 	pp->imr = 0;
356 	altera_uart_update_ctrl_reg(pp);
357 
358 	spin_unlock_irqrestore(&port->lock, flags);
359 
360 	if (port->irq)
361 		free_irq(port->irq, port);
362 	else
363 		del_timer_sync(&pp->tmr);
364 }
365 
366 static const char *altera_uart_type(struct uart_port *port)
367 {
368 	return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
369 }
370 
371 static int altera_uart_request_port(struct uart_port *port)
372 {
373 	/* UARTs always present */
374 	return 0;
375 }
376 
377 static void altera_uart_release_port(struct uart_port *port)
378 {
379 	/* Nothing to release... */
380 }
381 
382 static int altera_uart_verify_port(struct uart_port *port,
383 				   struct serial_struct *ser)
384 {
385 	if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
386 		return -EINVAL;
387 	return 0;
388 }
389 
390 #ifdef CONFIG_CONSOLE_POLL
391 static int altera_uart_poll_get_char(struct uart_port *port)
392 {
393 	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
394 		 ALTERA_UART_STATUS_RRDY_MSK))
395 		cpu_relax();
396 
397 	return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
398 }
399 
400 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
401 {
402 	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
403 		 ALTERA_UART_STATUS_TRDY_MSK))
404 		cpu_relax();
405 
406 	altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
407 }
408 #endif
409 
410 /*
411  *	Define the basic serial functions we support.
412  */
413 static const struct uart_ops altera_uart_ops = {
414 	.tx_empty	= altera_uart_tx_empty,
415 	.get_mctrl	= altera_uart_get_mctrl,
416 	.set_mctrl	= altera_uart_set_mctrl,
417 	.start_tx	= altera_uart_start_tx,
418 	.stop_tx	= altera_uart_stop_tx,
419 	.stop_rx	= altera_uart_stop_rx,
420 	.break_ctl	= altera_uart_break_ctl,
421 	.startup	= altera_uart_startup,
422 	.shutdown	= altera_uart_shutdown,
423 	.set_termios	= altera_uart_set_termios,
424 	.type		= altera_uart_type,
425 	.request_port	= altera_uart_request_port,
426 	.release_port	= altera_uart_release_port,
427 	.config_port	= altera_uart_config_port,
428 	.verify_port	= altera_uart_verify_port,
429 #ifdef CONFIG_CONSOLE_POLL
430 	.poll_get_char	= altera_uart_poll_get_char,
431 	.poll_put_char	= altera_uart_poll_put_char,
432 #endif
433 };
434 
435 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
436 
437 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
438 
439 static void altera_uart_console_putc(struct uart_port *port, unsigned char c)
440 {
441 	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
442 		 ALTERA_UART_STATUS_TRDY_MSK))
443 		cpu_relax();
444 
445 	altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
446 }
447 
448 static void altera_uart_console_write(struct console *co, const char *s,
449 				      unsigned int count)
450 {
451 	struct uart_port *port = &(altera_uart_ports + co->index)->port;
452 
453 	uart_console_write(port, s, count, altera_uart_console_putc);
454 }
455 
456 static int __init altera_uart_console_setup(struct console *co, char *options)
457 {
458 	struct uart_port *port;
459 	int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
460 	int bits = 8;
461 	int parity = 'n';
462 	int flow = 'n';
463 
464 	if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
465 		return -EINVAL;
466 	port = &altera_uart_ports[co->index].port;
467 	if (!port->membase)
468 		return -ENODEV;
469 
470 	if (options)
471 		uart_parse_options(options, &baud, &parity, &bits, &flow);
472 
473 	return uart_set_options(port, co, baud, parity, bits, flow);
474 }
475 
476 static struct uart_driver altera_uart_driver;
477 
478 static struct console altera_uart_console = {
479 	.name	= "ttyAL",
480 	.write	= altera_uart_console_write,
481 	.device	= uart_console_device,
482 	.setup	= altera_uart_console_setup,
483 	.flags	= CON_PRINTBUFFER,
484 	.index	= -1,
485 	.data	= &altera_uart_driver,
486 };
487 
488 static int __init altera_uart_console_init(void)
489 {
490 	register_console(&altera_uart_console);
491 	return 0;
492 }
493 
494 console_initcall(altera_uart_console_init);
495 
496 #define	ALTERA_UART_CONSOLE	(&altera_uart_console)
497 
498 static void altera_uart_earlycon_write(struct console *co, const char *s,
499 				       unsigned int count)
500 {
501 	struct earlycon_device *dev = co->data;
502 
503 	uart_console_write(&dev->port, s, count, altera_uart_console_putc);
504 }
505 
506 static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
507 					     const char *options)
508 {
509 	struct uart_port *port = &dev->port;
510 
511 	if (!port->membase)
512 		return -ENODEV;
513 
514 	/* Enable RX interrupts now */
515 	altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
516 			   ALTERA_UART_CONTROL_REG);
517 
518 	if (dev->baud) {
519 		unsigned int baudclk = port->uartclk / dev->baud;
520 
521 		altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
522 	}
523 
524 	dev->con->write = altera_uart_earlycon_write;
525 	return 0;
526 }
527 
528 OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
529 
530 #else
531 
532 #define	ALTERA_UART_CONSOLE	NULL
533 
534 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
535 
536 /*
537  *	Define the altera_uart UART driver structure.
538  */
539 static struct uart_driver altera_uart_driver = {
540 	.owner		= THIS_MODULE,
541 	.driver_name	= DRV_NAME,
542 	.dev_name	= "ttyAL",
543 	.major		= SERIAL_ALTERA_MAJOR,
544 	.minor		= SERIAL_ALTERA_MINOR,
545 	.nr		= CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
546 	.cons		= ALTERA_UART_CONSOLE,
547 };
548 
549 static int altera_uart_probe(struct platform_device *pdev)
550 {
551 	struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
552 	struct uart_port *port;
553 	struct resource *res_mem;
554 	int i = pdev->id;
555 	int ret;
556 
557 	/* if id is -1 scan for a free id and use that one */
558 	if (i == -1) {
559 		for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
560 			if (altera_uart_ports[i].port.mapbase == 0)
561 				break;
562 	}
563 
564 	if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
565 		return -EINVAL;
566 
567 	port = &altera_uart_ports[i].port;
568 
569 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
570 	if (res_mem)
571 		port->mapbase = res_mem->start;
572 	else if (platp)
573 		port->mapbase = platp->mapbase;
574 	else
575 		return -EINVAL;
576 
577 	ret = platform_get_irq_optional(pdev, 0);
578 	if (ret < 0 && ret != -ENXIO)
579 		return ret;
580 	if (ret > 0)
581 		port->irq = ret;
582 	else if (platp)
583 		port->irq = platp->irq;
584 
585 	/* Check platform data first so we can override device node data */
586 	if (platp)
587 		port->uartclk = platp->uartclk;
588 	else {
589 		ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
590 					   &port->uartclk);
591 		if (ret)
592 			return ret;
593 	}
594 
595 	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
596 	if (!port->membase)
597 		return -ENOMEM;
598 
599 	if (platp)
600 		port->regshift = platp->bus_shift;
601 	else
602 		port->regshift = 0;
603 
604 	port->line = i;
605 	port->type = PORT_ALTERA_UART;
606 	port->iotype = SERIAL_IO_MEM;
607 	port->ops = &altera_uart_ops;
608 	port->flags = UPF_BOOT_AUTOCONF;
609 	port->dev = &pdev->dev;
610 
611 	platform_set_drvdata(pdev, port);
612 
613 	uart_add_one_port(&altera_uart_driver, port);
614 
615 	return 0;
616 }
617 
618 static int altera_uart_remove(struct platform_device *pdev)
619 {
620 	struct uart_port *port = platform_get_drvdata(pdev);
621 
622 	if (port) {
623 		uart_remove_one_port(&altera_uart_driver, port);
624 		port->mapbase = 0;
625 		iounmap(port->membase);
626 	}
627 
628 	return 0;
629 }
630 
631 #ifdef CONFIG_OF
632 static const struct of_device_id altera_uart_match[] = {
633 	{ .compatible = "ALTR,uart-1.0", },
634 	{ .compatible = "altr,uart-1.0", },
635 	{},
636 };
637 MODULE_DEVICE_TABLE(of, altera_uart_match);
638 #endif /* CONFIG_OF */
639 
640 static struct platform_driver altera_uart_platform_driver = {
641 	.probe	= altera_uart_probe,
642 	.remove	= altera_uart_remove,
643 	.driver	= {
644 		.name		= DRV_NAME,
645 		.of_match_table	= of_match_ptr(altera_uart_match),
646 	},
647 };
648 
649 static int __init altera_uart_init(void)
650 {
651 	int rc;
652 
653 	rc = uart_register_driver(&altera_uart_driver);
654 	if (rc)
655 		return rc;
656 	rc = platform_driver_register(&altera_uart_platform_driver);
657 	if (rc)
658 		uart_unregister_driver(&altera_uart_driver);
659 	return rc;
660 }
661 
662 static void __exit altera_uart_exit(void)
663 {
664 	platform_driver_unregister(&altera_uart_platform_driver);
665 	uart_unregister_driver(&altera_uart_driver);
666 }
667 
668 module_init(altera_uart_init);
669 module_exit(altera_uart_exit);
670 
671 MODULE_DESCRIPTION("Altera UART driver");
672 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
673 MODULE_LICENSE("GPL");
674 MODULE_ALIAS("platform:" DRV_NAME);
675 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
676