xref: /openbmc/linux/drivers/tty/serial/altera_uart.c (revision c4a7b9b5) 
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * altera_uart.c -- Altera UART driver
4  *
5  * Based on mcf.c -- Freescale ColdFire UART driver
6  *
7  * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8  * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
9  * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/console.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/serial.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/io.h>
25 #include <linux/altera_uart.h>
26 
27 #define DRV_NAME "altera_uart"
28 #define SERIAL_ALTERA_MAJOR 204
29 #define SERIAL_ALTERA_MINOR 213
30 
31 /*
32  * Altera UART register definitions according to the Nios UART datasheet:
33  * http://www.altera.com/literature/ds/ds_nios_uart.pdf
34  */
35 
36 #define ALTERA_UART_SIZE		32
37 
38 #define ALTERA_UART_RXDATA_REG		0
39 #define ALTERA_UART_TXDATA_REG		4
40 #define ALTERA_UART_STATUS_REG		8
41 #define ALTERA_UART_CONTROL_REG		12
42 #define ALTERA_UART_DIVISOR_REG		16
43 #define ALTERA_UART_EOP_REG		20
44 
45 #define ALTERA_UART_STATUS_PE_MSK	0x0001	/* parity error */
46 #define ALTERA_UART_STATUS_FE_MSK	0x0002	/* framing error */
47 #define ALTERA_UART_STATUS_BRK_MSK	0x0004	/* break */
48 #define ALTERA_UART_STATUS_ROE_MSK	0x0008	/* RX overrun error */
49 #define ALTERA_UART_STATUS_TOE_MSK	0x0010	/* TX overrun error */
50 #define ALTERA_UART_STATUS_TMT_MSK	0x0020	/* TX shift register state */
51 #define ALTERA_UART_STATUS_TRDY_MSK	0x0040	/* TX ready */
52 #define ALTERA_UART_STATUS_RRDY_MSK	0x0080	/* RX ready */
53 #define ALTERA_UART_STATUS_E_MSK	0x0100	/* exception condition */
54 #define ALTERA_UART_STATUS_DCTS_MSK	0x0400	/* CTS logic-level change */
55 #define ALTERA_UART_STATUS_CTS_MSK	0x0800	/* CTS logic state */
56 #define ALTERA_UART_STATUS_EOP_MSK	0x1000	/* EOP written/read */
57 
58 						/* Enable interrupt on... */
59 #define ALTERA_UART_CONTROL_PE_MSK	0x0001	/* ...parity error */
60 #define ALTERA_UART_CONTROL_FE_MSK	0x0002	/* ...framing error */
61 #define ALTERA_UART_CONTROL_BRK_MSK	0x0004	/* ...break */
62 #define ALTERA_UART_CONTROL_ROE_MSK	0x0008	/* ...RX overrun */
63 #define ALTERA_UART_CONTROL_TOE_MSK	0x0010	/* ...TX overrun */
64 #define ALTERA_UART_CONTROL_TMT_MSK	0x0020	/* ...TX shift register empty */
65 #define ALTERA_UART_CONTROL_TRDY_MSK	0x0040	/* ...TX ready */
66 #define ALTERA_UART_CONTROL_RRDY_MSK	0x0080	/* ...RX ready */
67 #define ALTERA_UART_CONTROL_E_MSK	0x0100	/* ...exception*/
68 
69 #define ALTERA_UART_CONTROL_TRBK_MSK	0x0200	/* TX break */
70 #define ALTERA_UART_CONTROL_DCTS_MSK	0x0400	/* Interrupt on CTS change */
71 #define ALTERA_UART_CONTROL_RTS_MSK	0x0800	/* RTS signal */
72 #define ALTERA_UART_CONTROL_EOP_MSK	0x1000	/* Interrupt on EOP */
73 
74 /*
75  * Local per-uart structure.
76  */
77 struct altera_uart {
78 	struct uart_port port;
79 	struct timer_list tmr;
80 	unsigned int sigs;	/* Local copy of line sigs */
81 	unsigned short imr;	/* Local IMR mirror */
82 };
83 
84 static u32 altera_uart_readl(struct uart_port *port, int reg)
85 {
86 	return readl(port->membase + (reg << port->regshift));
87 }
88 
89 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
90 {
91 	writel(dat, port->membase + (reg << port->regshift));
92 }
93 
94 static unsigned int altera_uart_tx_empty(struct uart_port *port)
95 {
96 	return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
97 		ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
98 }
99 
100 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
101 {
102 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
103 	unsigned int sigs;
104 
105 	sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
106 	     ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
107 	sigs |= (pp->sigs & TIOCM_RTS);
108 
109 	return sigs;
110 }
111 
112 static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
113 {
114 	unsigned short imr = pp->imr;
115 
116 	/*
117 	 * If the device doesn't have an irq, ensure that the irq bits are
118 	 * masked out to keep the irq line inactive.
119 	 */
120 	if (!pp->port.irq)
121 		imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
122 
123 	altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
124 }
125 
126 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
127 {
128 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
129 
130 	pp->sigs = sigs;
131 	if (sigs & TIOCM_RTS)
132 		pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
133 	else
134 		pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
135 	altera_uart_update_ctrl_reg(pp);
136 }
137 
138 static void altera_uart_start_tx(struct uart_port *port)
139 {
140 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
141 
142 	pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
143 	altera_uart_update_ctrl_reg(pp);
144 }
145 
146 static void altera_uart_stop_tx(struct uart_port *port)
147 {
148 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
149 
150 	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
151 	altera_uart_update_ctrl_reg(pp);
152 }
153 
154 static void altera_uart_stop_rx(struct uart_port *port)
155 {
156 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
157 
158 	pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
159 	altera_uart_update_ctrl_reg(pp);
160 }
161 
162 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
163 {
164 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
165 	unsigned long flags;
166 
167 	spin_lock_irqsave(&port->lock, flags);
168 	if (break_state == -1)
169 		pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
170 	else
171 		pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
172 	altera_uart_update_ctrl_reg(pp);
173 	spin_unlock_irqrestore(&port->lock, flags);
174 }
175 
176 static void altera_uart_set_termios(struct uart_port *port,
177 				    struct ktermios *termios,
178 				    const struct ktermios *old)
179 {
180 	unsigned long flags;
181 	unsigned int baud, baudclk;
182 
183 	baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
184 	baudclk = port->uartclk / baud;
185 
186 	if (old)
187 		tty_termios_copy_hw(termios, old);
188 	tty_termios_encode_baud_rate(termios, baud, baud);
189 
190 	spin_lock_irqsave(&port->lock, flags);
191 	uart_update_timeout(port, termios->c_cflag, baud);
192 	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
193 	spin_unlock_irqrestore(&port->lock, flags);
194 
195 	/*
196 	 * FIXME: port->read_status_mask and port->ignore_status_mask
197 	 * need to be initialized based on termios settings for
198 	 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
199 	 */
200 }
201 
202 static void altera_uart_rx_chars(struct uart_port *port)
203 {
204 	unsigned char ch, flag;
205 	unsigned short status;
206 
207 	while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
208 	       ALTERA_UART_STATUS_RRDY_MSK) {
209 		ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
210 		flag = TTY_NORMAL;
211 		port->icount.rx++;
212 
213 		if (status & ALTERA_UART_STATUS_E_MSK) {
214 			altera_uart_writel(port, status,
215 					   ALTERA_UART_STATUS_REG);
216 
217 			if (status & ALTERA_UART_STATUS_BRK_MSK) {
218 				port->icount.brk++;
219 				if (uart_handle_break(port))
220 					continue;
221 			} else if (status & ALTERA_UART_STATUS_PE_MSK) {
222 				port->icount.parity++;
223 			} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
224 				port->icount.overrun++;
225 			} else if (status & ALTERA_UART_STATUS_FE_MSK) {
226 				port->icount.frame++;
227 			}
228 
229 			status &= port->read_status_mask;
230 
231 			if (status & ALTERA_UART_STATUS_BRK_MSK)
232 				flag = TTY_BREAK;
233 			else if (status & ALTERA_UART_STATUS_PE_MSK)
234 				flag = TTY_PARITY;
235 			else if (status & ALTERA_UART_STATUS_FE_MSK)
236 				flag = TTY_FRAME;
237 		}
238 
239 		if (uart_handle_sysrq_char(port, ch))
240 			continue;
241 		uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
242 				 flag);
243 	}
244 
245 	tty_flip_buffer_push(&port->state->port);
246 }
247 
248 static void altera_uart_tx_chars(struct uart_port *port)
249 {
250 	struct circ_buf *xmit = &port->state->xmit;
251 
252 	if (port->x_char) {
253 		/* Send special char - probably flow control */
254 		altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
255 		port->x_char = 0;
256 		port->icount.tx++;
257 		return;
258 	}
259 
260 	while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
261 	       ALTERA_UART_STATUS_TRDY_MSK) {
262 		if (xmit->head == xmit->tail)
263 			break;
264 		altera_uart_writel(port, xmit->buf[xmit->tail],
265 		       ALTERA_UART_TXDATA_REG);
266 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
267 		port->icount.tx++;
268 	}
269 
270 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
271 		uart_write_wakeup(port);
272 
273 	if (uart_circ_empty(xmit))
274 		altera_uart_stop_tx(port);
275 }
276 
277 static irqreturn_t altera_uart_interrupt(int irq, void *data)
278 {
279 	struct uart_port *port = data;
280 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
281 	unsigned int isr;
282 
283 	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
284 
285 	spin_lock(&port->lock);
286 	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
287 		altera_uart_rx_chars(port);
288 	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
289 		altera_uart_tx_chars(port);
290 	spin_unlock(&port->lock);
291 
292 	return IRQ_RETVAL(isr);
293 }
294 
295 static void altera_uart_timer(struct timer_list *t)
296 {
297 	struct altera_uart *pp = from_timer(pp, t, tmr);
298 	struct uart_port *port = &pp->port;
299 
300 	altera_uart_interrupt(0, port);
301 	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
302 }
303 
304 static void altera_uart_config_port(struct uart_port *port, int flags)
305 {
306 	port->type = PORT_ALTERA_UART;
307 
308 	/* Clear mask, so no surprise interrupts. */
309 	altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
310 	/* Clear status register */
311 	altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
312 }
313 
314 static int altera_uart_startup(struct uart_port *port)
315 {
316 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
317 	unsigned long flags;
318 
319 	if (!port->irq) {
320 		timer_setup(&pp->tmr, altera_uart_timer, 0);
321 		mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
322 	} else {
323 		int ret;
324 
325 		ret = request_irq(port->irq, altera_uart_interrupt, 0,
326 				DRV_NAME, port);
327 		if (ret) {
328 			pr_err(DRV_NAME ": unable to attach Altera UART %d "
329 			       "interrupt vector=%d\n", port->line, port->irq);
330 			return ret;
331 		}
332 	}
333 
334 	spin_lock_irqsave(&port->lock, flags);
335 
336 	/* Enable RX interrupts now */
337 	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
338 	altera_uart_update_ctrl_reg(pp);
339 
340 	spin_unlock_irqrestore(&port->lock, flags);
341 
342 	return 0;
343 }
344 
345 static void altera_uart_shutdown(struct uart_port *port)
346 {
347 	struct altera_uart *pp = container_of(port, struct altera_uart, port);
348 	unsigned long flags;
349 
350 	spin_lock_irqsave(&port->lock, flags);
351 
352 	/* Disable all interrupts now */
353 	pp->imr = 0;
354 	altera_uart_update_ctrl_reg(pp);
355 
356 	spin_unlock_irqrestore(&port->lock, flags);
357 
358 	if (port->irq)
359 		free_irq(port->irq, port);
360 	else
361 		del_timer_sync(&pp->tmr);
362 }
363 
364 static const char *altera_uart_type(struct uart_port *port)
365 {
366 	return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
367 }
368 
369 static int altera_uart_request_port(struct uart_port *port)
370 {
371 	/* UARTs always present */
372 	return 0;
373 }
374 
375 static void altera_uart_release_port(struct uart_port *port)
376 {
377 	/* Nothing to release... */
378 }
379 
380 static int altera_uart_verify_port(struct uart_port *port,
381 				   struct serial_struct *ser)
382 {
383 	if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
384 		return -EINVAL;
385 	return 0;
386 }
387 
388 #ifdef CONFIG_CONSOLE_POLL
389 static int altera_uart_poll_get_char(struct uart_port *port)
390 {
391 	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
392 		 ALTERA_UART_STATUS_RRDY_MSK))
393 		cpu_relax();
394 
395 	return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
396 }
397 
398 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
399 {
400 	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
401 		 ALTERA_UART_STATUS_TRDY_MSK))
402 		cpu_relax();
403 
404 	altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
405 }
406 #endif
407 
408 /*
409  *	Define the basic serial functions we support.
410  */
411 static const struct uart_ops altera_uart_ops = {
412 	.tx_empty	= altera_uart_tx_empty,
413 	.get_mctrl	= altera_uart_get_mctrl,
414 	.set_mctrl	= altera_uart_set_mctrl,
415 	.start_tx	= altera_uart_start_tx,
416 	.stop_tx	= altera_uart_stop_tx,
417 	.stop_rx	= altera_uart_stop_rx,
418 	.break_ctl	= altera_uart_break_ctl,
419 	.startup	= altera_uart_startup,
420 	.shutdown	= altera_uart_shutdown,
421 	.set_termios	= altera_uart_set_termios,
422 	.type		= altera_uart_type,
423 	.request_port	= altera_uart_request_port,
424 	.release_port	= altera_uart_release_port,
425 	.config_port	= altera_uart_config_port,
426 	.verify_port	= altera_uart_verify_port,
427 #ifdef CONFIG_CONSOLE_POLL
428 	.poll_get_char	= altera_uart_poll_get_char,
429 	.poll_put_char	= altera_uart_poll_put_char,
430 #endif
431 };
432 
433 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
434 
435 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
436 
437 static void altera_uart_console_putc(struct uart_port *port, unsigned char c)
438 {
439 	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
440 		 ALTERA_UART_STATUS_TRDY_MSK))
441 		cpu_relax();
442 
443 	altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
444 }
445 
446 static void altera_uart_console_write(struct console *co, const char *s,
447 				      unsigned int count)
448 {
449 	struct uart_port *port = &(altera_uart_ports + co->index)->port;
450 
451 	uart_console_write(port, s, count, altera_uart_console_putc);
452 }
453 
454 static int __init altera_uart_console_setup(struct console *co, char *options)
455 {
456 	struct uart_port *port;
457 	int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
458 	int bits = 8;
459 	int parity = 'n';
460 	int flow = 'n';
461 
462 	if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
463 		return -EINVAL;
464 	port = &altera_uart_ports[co->index].port;
465 	if (!port->membase)
466 		return -ENODEV;
467 
468 	if (options)
469 		uart_parse_options(options, &baud, &parity, &bits, &flow);
470 
471 	return uart_set_options(port, co, baud, parity, bits, flow);
472 }
473 
474 static struct uart_driver altera_uart_driver;
475 
476 static struct console altera_uart_console = {
477 	.name	= "ttyAL",
478 	.write	= altera_uart_console_write,
479 	.device	= uart_console_device,
480 	.setup	= altera_uart_console_setup,
481 	.flags	= CON_PRINTBUFFER,
482 	.index	= -1,
483 	.data	= &altera_uart_driver,
484 };
485 
486 static int __init altera_uart_console_init(void)
487 {
488 	register_console(&altera_uart_console);
489 	return 0;
490 }
491 
492 console_initcall(altera_uart_console_init);
493 
494 #define	ALTERA_UART_CONSOLE	(&altera_uart_console)
495 
496 static void altera_uart_earlycon_write(struct console *co, const char *s,
497 				       unsigned int count)
498 {
499 	struct earlycon_device *dev = co->data;
500 
501 	uart_console_write(&dev->port, s, count, altera_uart_console_putc);
502 }
503 
504 static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
505 					     const char *options)
506 {
507 	struct uart_port *port = &dev->port;
508 
509 	if (!port->membase)
510 		return -ENODEV;
511 
512 	/* Enable RX interrupts now */
513 	altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
514 			   ALTERA_UART_CONTROL_REG);
515 
516 	if (dev->baud) {
517 		unsigned int baudclk = port->uartclk / dev->baud;
518 
519 		altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
520 	}
521 
522 	dev->con->write = altera_uart_earlycon_write;
523 	return 0;
524 }
525 
526 OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
527 
528 #else
529 
530 #define	ALTERA_UART_CONSOLE	NULL
531 
532 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
533 
534 /*
535  *	Define the altera_uart UART driver structure.
536  */
537 static struct uart_driver altera_uart_driver = {
538 	.owner		= THIS_MODULE,
539 	.driver_name	= DRV_NAME,
540 	.dev_name	= "ttyAL",
541 	.major		= SERIAL_ALTERA_MAJOR,
542 	.minor		= SERIAL_ALTERA_MINOR,
543 	.nr		= CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
544 	.cons		= ALTERA_UART_CONSOLE,
545 };
546 
547 static int altera_uart_probe(struct platform_device *pdev)
548 {
549 	struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
550 	struct uart_port *port;
551 	struct resource *res_mem;
552 	int i = pdev->id;
553 	int ret;
554 
555 	/* if id is -1 scan for a free id and use that one */
556 	if (i == -1) {
557 		for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
558 			if (altera_uart_ports[i].port.mapbase == 0)
559 				break;
560 	}
561 
562 	if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
563 		return -EINVAL;
564 
565 	port = &altera_uart_ports[i].port;
566 
567 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
568 	if (res_mem)
569 		port->mapbase = res_mem->start;
570 	else if (platp)
571 		port->mapbase = platp->mapbase;
572 	else
573 		return -EINVAL;
574 
575 	ret = platform_get_irq_optional(pdev, 0);
576 	if (ret < 0 && ret != -ENXIO)
577 		return ret;
578 	if (ret > 0)
579 		port->irq = ret;
580 	else if (platp)
581 		port->irq = platp->irq;
582 
583 	/* Check platform data first so we can override device node data */
584 	if (platp)
585 		port->uartclk = platp->uartclk;
586 	else {
587 		ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
588 					   &port->uartclk);
589 		if (ret)
590 			return ret;
591 	}
592 
593 	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
594 	if (!port->membase)
595 		return -ENOMEM;
596 
597 	if (platp)
598 		port->regshift = platp->bus_shift;
599 	else
600 		port->regshift = 0;
601 
602 	port->line = i;
603 	port->type = PORT_ALTERA_UART;
604 	port->iotype = SERIAL_IO_MEM;
605 	port->ops = &altera_uart_ops;
606 	port->flags = UPF_BOOT_AUTOCONF;
607 	port->dev = &pdev->dev;
608 
609 	platform_set_drvdata(pdev, port);
610 
611 	uart_add_one_port(&altera_uart_driver, port);
612 
613 	return 0;
614 }
615 
616 static int altera_uart_remove(struct platform_device *pdev)
617 {
618 	struct uart_port *port = platform_get_drvdata(pdev);
619 
620 	if (port) {
621 		uart_remove_one_port(&altera_uart_driver, port);
622 		port->mapbase = 0;
623 		iounmap(port->membase);
624 	}
625 
626 	return 0;
627 }
628 
629 #ifdef CONFIG_OF
630 static const struct of_device_id altera_uart_match[] = {
631 	{ .compatible = "ALTR,uart-1.0", },
632 	{ .compatible = "altr,uart-1.0", },
633 	{},
634 };
635 MODULE_DEVICE_TABLE(of, altera_uart_match);
636 #endif /* CONFIG_OF */
637 
638 static struct platform_driver altera_uart_platform_driver = {
639 	.probe	= altera_uart_probe,
640 	.remove	= altera_uart_remove,
641 	.driver	= {
642 		.name		= DRV_NAME,
643 		.of_match_table	= of_match_ptr(altera_uart_match),
644 	},
645 };
646 
647 static int __init altera_uart_init(void)
648 {
649 	int rc;
650 
651 	rc = uart_register_driver(&altera_uart_driver);
652 	if (rc)
653 		return rc;
654 	rc = platform_driver_register(&altera_uart_platform_driver);
655 	if (rc)
656 		uart_unregister_driver(&altera_uart_driver);
657 	return rc;
658 }
659 
660 static void __exit altera_uart_exit(void)
661 {
662 	platform_driver_unregister(&altera_uart_platform_driver);
663 	uart_unregister_driver(&altera_uart_driver);
664 }
665 
666 module_init(altera_uart_init);
667 module_exit(altera_uart_exit);
668 
669 MODULE_DESCRIPTION("Altera UART driver");
670 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
671 MODULE_LICENSE("GPL");
672 MODULE_ALIAS("platform:" DRV_NAME);
673 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
674