1 /* 2 * altera_uart.c -- Altera UART driver 3 * 4 * Based on mcf.c -- Freescale ColdFire UART driver 5 * 6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com> 7 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw> 8 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/timer.h> 19 #include <linux/interrupt.h> 20 #include <linux/module.h> 21 #include <linux/console.h> 22 #include <linux/tty.h> 23 #include <linux/tty_flip.h> 24 #include <linux/serial.h> 25 #include <linux/serial_core.h> 26 #include <linux/platform_device.h> 27 #include <linux/of.h> 28 #include <linux/io.h> 29 #include <linux/altera_uart.h> 30 31 #define DRV_NAME "altera_uart" 32 #define SERIAL_ALTERA_MAJOR 204 33 #define SERIAL_ALTERA_MINOR 213 34 35 /* 36 * Altera UART register definitions according to the Nios UART datasheet: 37 * http://www.altera.com/literature/ds/ds_nios_uart.pdf 38 */ 39 40 #define ALTERA_UART_SIZE 32 41 42 #define ALTERA_UART_RXDATA_REG 0 43 #define ALTERA_UART_TXDATA_REG 4 44 #define ALTERA_UART_STATUS_REG 8 45 #define ALTERA_UART_CONTROL_REG 12 46 #define ALTERA_UART_DIVISOR_REG 16 47 #define ALTERA_UART_EOP_REG 20 48 49 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */ 50 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */ 51 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */ 52 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */ 53 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */ 54 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */ 55 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */ 56 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */ 57 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */ 58 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */ 59 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */ 60 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */ 61 62 /* Enable interrupt on... */ 63 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */ 64 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */ 65 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */ 66 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */ 67 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */ 68 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */ 69 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */ 70 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */ 71 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/ 72 73 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */ 74 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */ 75 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */ 76 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */ 77 78 /* 79 * Local per-uart structure. 80 */ 81 struct altera_uart { 82 struct uart_port port; 83 struct timer_list tmr; 84 unsigned int sigs; /* Local copy of line sigs */ 85 unsigned short imr; /* Local IMR mirror */ 86 }; 87 88 static u32 altera_uart_readl(struct uart_port *port, int reg) 89 { 90 return readl(port->membase + (reg << port->regshift)); 91 } 92 93 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg) 94 { 95 writel(dat, port->membase + (reg << port->regshift)); 96 } 97 98 static unsigned int altera_uart_tx_empty(struct uart_port *port) 99 { 100 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 101 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0; 102 } 103 104 static unsigned int altera_uart_get_mctrl(struct uart_port *port) 105 { 106 struct altera_uart *pp = container_of(port, struct altera_uart, port); 107 unsigned int sigs; 108 109 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 110 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0; 111 sigs |= (pp->sigs & TIOCM_RTS); 112 113 return sigs; 114 } 115 116 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs) 117 { 118 struct altera_uart *pp = container_of(port, struct altera_uart, port); 119 120 pp->sigs = sigs; 121 if (sigs & TIOCM_RTS) 122 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; 123 else 124 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; 125 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 126 } 127 128 static void altera_uart_start_tx(struct uart_port *port) 129 { 130 struct altera_uart *pp = container_of(port, struct altera_uart, port); 131 132 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; 133 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 134 } 135 136 static void altera_uart_stop_tx(struct uart_port *port) 137 { 138 struct altera_uart *pp = container_of(port, struct altera_uart, port); 139 140 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; 141 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 142 } 143 144 static void altera_uart_stop_rx(struct uart_port *port) 145 { 146 struct altera_uart *pp = container_of(port, struct altera_uart, port); 147 148 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; 149 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 150 } 151 152 static void altera_uart_break_ctl(struct uart_port *port, int break_state) 153 { 154 struct altera_uart *pp = container_of(port, struct altera_uart, port); 155 unsigned long flags; 156 157 spin_lock_irqsave(&port->lock, flags); 158 if (break_state == -1) 159 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK; 160 else 161 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK; 162 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 163 spin_unlock_irqrestore(&port->lock, flags); 164 } 165 166 static void altera_uart_enable_ms(struct uart_port *port) 167 { 168 } 169 170 static void altera_uart_set_termios(struct uart_port *port, 171 struct ktermios *termios, 172 struct ktermios *old) 173 { 174 unsigned long flags; 175 unsigned int baud, baudclk; 176 177 baud = uart_get_baud_rate(port, termios, old, 0, 4000000); 178 baudclk = port->uartclk / baud; 179 180 if (old) 181 tty_termios_copy_hw(termios, old); 182 tty_termios_encode_baud_rate(termios, baud, baud); 183 184 spin_lock_irqsave(&port->lock, flags); 185 uart_update_timeout(port, termios->c_cflag, baud); 186 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); 187 spin_unlock_irqrestore(&port->lock, flags); 188 } 189 190 static void altera_uart_rx_chars(struct altera_uart *pp) 191 { 192 struct uart_port *port = &pp->port; 193 unsigned char ch, flag; 194 unsigned short status; 195 196 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & 197 ALTERA_UART_STATUS_RRDY_MSK) { 198 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG); 199 flag = TTY_NORMAL; 200 port->icount.rx++; 201 202 if (status & ALTERA_UART_STATUS_E_MSK) { 203 altera_uart_writel(port, status, 204 ALTERA_UART_STATUS_REG); 205 206 if (status & ALTERA_UART_STATUS_BRK_MSK) { 207 port->icount.brk++; 208 if (uart_handle_break(port)) 209 continue; 210 } else if (status & ALTERA_UART_STATUS_PE_MSK) { 211 port->icount.parity++; 212 } else if (status & ALTERA_UART_STATUS_ROE_MSK) { 213 port->icount.overrun++; 214 } else if (status & ALTERA_UART_STATUS_FE_MSK) { 215 port->icount.frame++; 216 } 217 218 status &= port->read_status_mask; 219 220 if (status & ALTERA_UART_STATUS_BRK_MSK) 221 flag = TTY_BREAK; 222 else if (status & ALTERA_UART_STATUS_PE_MSK) 223 flag = TTY_PARITY; 224 else if (status & ALTERA_UART_STATUS_FE_MSK) 225 flag = TTY_FRAME; 226 } 227 228 if (uart_handle_sysrq_char(port, ch)) 229 continue; 230 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch, 231 flag); 232 } 233 234 tty_flip_buffer_push(port->state->port.tty); 235 } 236 237 static void altera_uart_tx_chars(struct altera_uart *pp) 238 { 239 struct uart_port *port = &pp->port; 240 struct circ_buf *xmit = &port->state->xmit; 241 242 if (port->x_char) { 243 /* Send special char - probably flow control */ 244 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG); 245 port->x_char = 0; 246 port->icount.tx++; 247 return; 248 } 249 250 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 251 ALTERA_UART_STATUS_TRDY_MSK) { 252 if (xmit->head == xmit->tail) 253 break; 254 altera_uart_writel(port, xmit->buf[xmit->tail], 255 ALTERA_UART_TXDATA_REG); 256 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 257 port->icount.tx++; 258 } 259 260 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 261 uart_write_wakeup(port); 262 263 if (xmit->head == xmit->tail) { 264 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; 265 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 266 } 267 } 268 269 static irqreturn_t altera_uart_interrupt(int irq, void *data) 270 { 271 struct uart_port *port = data; 272 struct altera_uart *pp = container_of(port, struct altera_uart, port); 273 unsigned int isr; 274 275 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr; 276 277 spin_lock(&port->lock); 278 if (isr & ALTERA_UART_STATUS_RRDY_MSK) 279 altera_uart_rx_chars(pp); 280 if (isr & ALTERA_UART_STATUS_TRDY_MSK) 281 altera_uart_tx_chars(pp); 282 spin_unlock(&port->lock); 283 284 return IRQ_RETVAL(isr); 285 } 286 287 static void altera_uart_timer(unsigned long data) 288 { 289 struct uart_port *port = (void *)data; 290 struct altera_uart *pp = container_of(port, struct altera_uart, port); 291 292 altera_uart_interrupt(0, port); 293 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); 294 } 295 296 static void altera_uart_config_port(struct uart_port *port, int flags) 297 { 298 port->type = PORT_ALTERA_UART; 299 300 /* Clear mask, so no surprise interrupts. */ 301 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG); 302 /* Clear status register */ 303 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG); 304 } 305 306 static int altera_uart_startup(struct uart_port *port) 307 { 308 struct altera_uart *pp = container_of(port, struct altera_uart, port); 309 unsigned long flags; 310 int ret; 311 312 if (!port->irq) { 313 setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port); 314 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); 315 return 0; 316 } 317 318 ret = request_irq(port->irq, altera_uart_interrupt, 0, 319 DRV_NAME, port); 320 if (ret) { 321 pr_err(DRV_NAME ": unable to attach Altera UART %d " 322 "interrupt vector=%d\n", port->line, port->irq); 323 return ret; 324 } 325 326 spin_lock_irqsave(&port->lock, flags); 327 328 /* Enable RX interrupts now */ 329 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK; 330 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); 331 332 spin_unlock_irqrestore(&port->lock, flags); 333 334 return 0; 335 } 336 337 static void altera_uart_shutdown(struct uart_port *port) 338 { 339 struct altera_uart *pp = container_of(port, struct altera_uart, port); 340 unsigned long flags; 341 342 spin_lock_irqsave(&port->lock, flags); 343 344 /* Disable all interrupts now */ 345 pp->imr = 0; 346 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); 347 348 spin_unlock_irqrestore(&port->lock, flags); 349 350 if (port->irq) 351 free_irq(port->irq, port); 352 else 353 del_timer_sync(&pp->tmr); 354 } 355 356 static const char *altera_uart_type(struct uart_port *port) 357 { 358 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL; 359 } 360 361 static int altera_uart_request_port(struct uart_port *port) 362 { 363 /* UARTs always present */ 364 return 0; 365 } 366 367 static void altera_uart_release_port(struct uart_port *port) 368 { 369 /* Nothing to release... */ 370 } 371 372 static int altera_uart_verify_port(struct uart_port *port, 373 struct serial_struct *ser) 374 { 375 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART)) 376 return -EINVAL; 377 return 0; 378 } 379 380 #ifdef CONFIG_CONSOLE_POLL 381 static int altera_uart_poll_get_char(struct uart_port *port) 382 { 383 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 384 ALTERA_UART_STATUS_RRDY_MSK)) 385 cpu_relax(); 386 387 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG); 388 } 389 390 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c) 391 { 392 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 393 ALTERA_UART_STATUS_TRDY_MSK)) 394 cpu_relax(); 395 396 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); 397 } 398 #endif 399 400 /* 401 * Define the basic serial functions we support. 402 */ 403 static struct uart_ops altera_uart_ops = { 404 .tx_empty = altera_uart_tx_empty, 405 .get_mctrl = altera_uart_get_mctrl, 406 .set_mctrl = altera_uart_set_mctrl, 407 .start_tx = altera_uart_start_tx, 408 .stop_tx = altera_uart_stop_tx, 409 .stop_rx = altera_uart_stop_rx, 410 .enable_ms = altera_uart_enable_ms, 411 .break_ctl = altera_uart_break_ctl, 412 .startup = altera_uart_startup, 413 .shutdown = altera_uart_shutdown, 414 .set_termios = altera_uart_set_termios, 415 .type = altera_uart_type, 416 .request_port = altera_uart_request_port, 417 .release_port = altera_uart_release_port, 418 .config_port = altera_uart_config_port, 419 .verify_port = altera_uart_verify_port, 420 #ifdef CONFIG_CONSOLE_POLL 421 .poll_get_char = altera_uart_poll_get_char, 422 .poll_put_char = altera_uart_poll_put_char, 423 #endif 424 }; 425 426 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; 427 428 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) 429 430 static void altera_uart_console_putc(struct uart_port *port, const char c) 431 { 432 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 433 ALTERA_UART_STATUS_TRDY_MSK)) 434 cpu_relax(); 435 436 writel(c, port->membase + ALTERA_UART_TXDATA_REG); 437 } 438 439 static void altera_uart_console_write(struct console *co, const char *s, 440 unsigned int count) 441 { 442 struct uart_port *port = &(altera_uart_ports + co->index)->port; 443 444 for (; count; count--, s++) { 445 altera_uart_console_putc(port, *s); 446 if (*s == '\n') 447 altera_uart_console_putc(port, '\r'); 448 } 449 } 450 451 static int __init altera_uart_console_setup(struct console *co, char *options) 452 { 453 struct uart_port *port; 454 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE; 455 int bits = 8; 456 int parity = 'n'; 457 int flow = 'n'; 458 459 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) 460 return -EINVAL; 461 port = &altera_uart_ports[co->index].port; 462 if (!port->membase) 463 return -ENODEV; 464 465 if (options) 466 uart_parse_options(options, &baud, &parity, &bits, &flow); 467 468 return uart_set_options(port, co, baud, parity, bits, flow); 469 } 470 471 static struct uart_driver altera_uart_driver; 472 473 static struct console altera_uart_console = { 474 .name = "ttyAL", 475 .write = altera_uart_console_write, 476 .device = uart_console_device, 477 .setup = altera_uart_console_setup, 478 .flags = CON_PRINTBUFFER, 479 .index = -1, 480 .data = &altera_uart_driver, 481 }; 482 483 static int __init altera_uart_console_init(void) 484 { 485 register_console(&altera_uart_console); 486 return 0; 487 } 488 489 console_initcall(altera_uart_console_init); 490 491 #define ALTERA_UART_CONSOLE (&altera_uart_console) 492 493 #else 494 495 #define ALTERA_UART_CONSOLE NULL 496 497 #endif /* CONFIG_ALTERA_UART_CONSOLE */ 498 499 /* 500 * Define the altera_uart UART driver structure. 501 */ 502 static struct uart_driver altera_uart_driver = { 503 .owner = THIS_MODULE, 504 .driver_name = DRV_NAME, 505 .dev_name = "ttyAL", 506 .major = SERIAL_ALTERA_MAJOR, 507 .minor = SERIAL_ALTERA_MINOR, 508 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS, 509 .cons = ALTERA_UART_CONSOLE, 510 }; 511 512 #ifdef CONFIG_OF 513 static int altera_uart_get_of_uartclk(struct platform_device *pdev, 514 struct uart_port *port) 515 { 516 int len; 517 const __be32 *clk; 518 519 clk = of_get_property(pdev->dev.of_node, "clock-frequency", &len); 520 if (!clk || len < sizeof(__be32)) 521 return -ENODEV; 522 523 port->uartclk = be32_to_cpup(clk); 524 525 return 0; 526 } 527 #else 528 static int altera_uart_get_of_uartclk(struct platform_device *pdev, 529 struct uart_port *port) 530 { 531 return -ENODEV; 532 } 533 #endif /* CONFIG_OF */ 534 535 static int __devinit altera_uart_probe(struct platform_device *pdev) 536 { 537 struct altera_uart_platform_uart *platp = pdev->dev.platform_data; 538 struct uart_port *port; 539 struct resource *res_mem; 540 struct resource *res_irq; 541 int i = pdev->id; 542 int ret; 543 544 /* if id is -1 scan for a free id and use that one */ 545 if (i == -1) { 546 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) 547 if (altera_uart_ports[i].port.mapbase == 0) 548 break; 549 } 550 551 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) 552 return -EINVAL; 553 554 port = &altera_uart_ports[i].port; 555 556 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 557 if (res_mem) 558 port->mapbase = res_mem->start; 559 else if (platp) 560 port->mapbase = platp->mapbase; 561 else 562 return -EINVAL; 563 564 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 565 if (res_irq) 566 port->irq = res_irq->start; 567 else if (platp) 568 port->irq = platp->irq; 569 570 /* Check platform data first so we can override device node data */ 571 if (platp) 572 port->uartclk = platp->uartclk; 573 else { 574 ret = altera_uart_get_of_uartclk(pdev, port); 575 if (ret) 576 return ret; 577 } 578 579 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); 580 if (!port->membase) 581 return -ENOMEM; 582 583 if (platp) 584 port->regshift = platp->bus_shift; 585 else 586 port->regshift = 0; 587 588 port->line = i; 589 port->type = PORT_ALTERA_UART; 590 port->iotype = SERIAL_IO_MEM; 591 port->ops = &altera_uart_ops; 592 port->flags = UPF_BOOT_AUTOCONF; 593 594 dev_set_drvdata(&pdev->dev, port); 595 596 uart_add_one_port(&altera_uart_driver, port); 597 598 return 0; 599 } 600 601 static int __devexit altera_uart_remove(struct platform_device *pdev) 602 { 603 struct uart_port *port = dev_get_drvdata(&pdev->dev); 604 605 if (port) { 606 uart_remove_one_port(&altera_uart_driver, port); 607 dev_set_drvdata(&pdev->dev, NULL); 608 port->mapbase = 0; 609 } 610 611 return 0; 612 } 613 614 #ifdef CONFIG_OF 615 static struct of_device_id altera_uart_match[] = { 616 { .compatible = "ALTR,uart-1.0", }, 617 {}, 618 }; 619 MODULE_DEVICE_TABLE(of, altera_uart_match); 620 #endif /* CONFIG_OF */ 621 622 static struct platform_driver altera_uart_platform_driver = { 623 .probe = altera_uart_probe, 624 .remove = __devexit_p(altera_uart_remove), 625 .driver = { 626 .name = DRV_NAME, 627 .owner = THIS_MODULE, 628 .of_match_table = of_match_ptr(altera_uart_match), 629 }, 630 }; 631 632 static int __init altera_uart_init(void) 633 { 634 int rc; 635 636 rc = uart_register_driver(&altera_uart_driver); 637 if (rc) 638 return rc; 639 rc = platform_driver_register(&altera_uart_platform_driver); 640 if (rc) { 641 uart_unregister_driver(&altera_uart_driver); 642 return rc; 643 } 644 return 0; 645 } 646 647 static void __exit altera_uart_exit(void) 648 { 649 platform_driver_unregister(&altera_uart_platform_driver); 650 uart_unregister_driver(&altera_uart_driver); 651 } 652 653 module_init(altera_uart_init); 654 module_exit(altera_uart_exit); 655 656 MODULE_DESCRIPTION("Altera UART driver"); 657 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); 658 MODULE_LICENSE("GPL"); 659 MODULE_ALIAS("platform:" DRV_NAME); 660 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR); 661