1 /* 2 * altera_uart.c -- Altera UART driver 3 * 4 * Based on mcf.c -- Freescale ColdFire UART driver 5 * 6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com> 7 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw> 8 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/timer.h> 19 #include <linux/interrupt.h> 20 #include <linux/module.h> 21 #include <linux/console.h> 22 #include <linux/tty.h> 23 #include <linux/tty_flip.h> 24 #include <linux/serial.h> 25 #include <linux/serial_core.h> 26 #include <linux/platform_device.h> 27 #include <linux/of.h> 28 #include <linux/io.h> 29 #include <linux/altera_uart.h> 30 31 #define DRV_NAME "altera_uart" 32 #define SERIAL_ALTERA_MAJOR 204 33 #define SERIAL_ALTERA_MINOR 213 34 35 /* 36 * Altera UART register definitions according to the Nios UART datasheet: 37 * http://www.altera.com/literature/ds/ds_nios_uart.pdf 38 */ 39 40 #define ALTERA_UART_SIZE 32 41 42 #define ALTERA_UART_RXDATA_REG 0 43 #define ALTERA_UART_TXDATA_REG 4 44 #define ALTERA_UART_STATUS_REG 8 45 #define ALTERA_UART_CONTROL_REG 12 46 #define ALTERA_UART_DIVISOR_REG 16 47 #define ALTERA_UART_EOP_REG 20 48 49 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */ 50 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */ 51 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */ 52 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */ 53 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */ 54 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */ 55 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */ 56 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */ 57 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */ 58 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */ 59 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */ 60 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */ 61 62 /* Enable interrupt on... */ 63 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */ 64 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */ 65 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */ 66 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */ 67 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */ 68 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */ 69 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */ 70 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */ 71 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/ 72 73 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */ 74 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */ 75 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */ 76 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */ 77 78 /* 79 * Local per-uart structure. 80 */ 81 struct altera_uart { 82 struct uart_port port; 83 struct timer_list tmr; 84 unsigned int sigs; /* Local copy of line sigs */ 85 unsigned short imr; /* Local IMR mirror */ 86 }; 87 88 static u32 altera_uart_readl(struct uart_port *port, int reg) 89 { 90 return readl(port->membase + (reg << port->regshift)); 91 } 92 93 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg) 94 { 95 writel(dat, port->membase + (reg << port->regshift)); 96 } 97 98 static unsigned int altera_uart_tx_empty(struct uart_port *port) 99 { 100 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 101 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0; 102 } 103 104 static unsigned int altera_uart_get_mctrl(struct uart_port *port) 105 { 106 struct altera_uart *pp = container_of(port, struct altera_uart, port); 107 unsigned int sigs; 108 109 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 110 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0; 111 sigs |= (pp->sigs & TIOCM_RTS); 112 113 return sigs; 114 } 115 116 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs) 117 { 118 struct altera_uart *pp = container_of(port, struct altera_uart, port); 119 120 pp->sigs = sigs; 121 if (sigs & TIOCM_RTS) 122 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; 123 else 124 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; 125 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 126 } 127 128 static void altera_uart_start_tx(struct uart_port *port) 129 { 130 struct altera_uart *pp = container_of(port, struct altera_uart, port); 131 132 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; 133 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 134 } 135 136 static void altera_uart_stop_tx(struct uart_port *port) 137 { 138 struct altera_uart *pp = container_of(port, struct altera_uart, port); 139 140 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; 141 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 142 } 143 144 static void altera_uart_stop_rx(struct uart_port *port) 145 { 146 struct altera_uart *pp = container_of(port, struct altera_uart, port); 147 148 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; 149 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 150 } 151 152 static void altera_uart_break_ctl(struct uart_port *port, int break_state) 153 { 154 struct altera_uart *pp = container_of(port, struct altera_uart, port); 155 unsigned long flags; 156 157 spin_lock_irqsave(&port->lock, flags); 158 if (break_state == -1) 159 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK; 160 else 161 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK; 162 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 163 spin_unlock_irqrestore(&port->lock, flags); 164 } 165 166 static void altera_uart_set_termios(struct uart_port *port, 167 struct ktermios *termios, 168 struct ktermios *old) 169 { 170 unsigned long flags; 171 unsigned int baud, baudclk; 172 173 baud = uart_get_baud_rate(port, termios, old, 0, 4000000); 174 baudclk = port->uartclk / baud; 175 176 if (old) 177 tty_termios_copy_hw(termios, old); 178 tty_termios_encode_baud_rate(termios, baud, baud); 179 180 spin_lock_irqsave(&port->lock, flags); 181 uart_update_timeout(port, termios->c_cflag, baud); 182 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); 183 spin_unlock_irqrestore(&port->lock, flags); 184 185 /* 186 * FIXME: port->read_status_mask and port->ignore_status_mask 187 * need to be initialized based on termios settings for 188 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT 189 */ 190 } 191 192 static void altera_uart_rx_chars(struct altera_uart *pp) 193 { 194 struct uart_port *port = &pp->port; 195 unsigned char ch, flag; 196 unsigned short status; 197 198 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & 199 ALTERA_UART_STATUS_RRDY_MSK) { 200 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG); 201 flag = TTY_NORMAL; 202 port->icount.rx++; 203 204 if (status & ALTERA_UART_STATUS_E_MSK) { 205 altera_uart_writel(port, status, 206 ALTERA_UART_STATUS_REG); 207 208 if (status & ALTERA_UART_STATUS_BRK_MSK) { 209 port->icount.brk++; 210 if (uart_handle_break(port)) 211 continue; 212 } else if (status & ALTERA_UART_STATUS_PE_MSK) { 213 port->icount.parity++; 214 } else if (status & ALTERA_UART_STATUS_ROE_MSK) { 215 port->icount.overrun++; 216 } else if (status & ALTERA_UART_STATUS_FE_MSK) { 217 port->icount.frame++; 218 } 219 220 status &= port->read_status_mask; 221 222 if (status & ALTERA_UART_STATUS_BRK_MSK) 223 flag = TTY_BREAK; 224 else if (status & ALTERA_UART_STATUS_PE_MSK) 225 flag = TTY_PARITY; 226 else if (status & ALTERA_UART_STATUS_FE_MSK) 227 flag = TTY_FRAME; 228 } 229 230 if (uart_handle_sysrq_char(port, ch)) 231 continue; 232 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch, 233 flag); 234 } 235 236 spin_unlock(&port->lock); 237 tty_flip_buffer_push(&port->state->port); 238 spin_lock(&port->lock); 239 } 240 241 static void altera_uart_tx_chars(struct altera_uart *pp) 242 { 243 struct uart_port *port = &pp->port; 244 struct circ_buf *xmit = &port->state->xmit; 245 246 if (port->x_char) { 247 /* Send special char - probably flow control */ 248 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG); 249 port->x_char = 0; 250 port->icount.tx++; 251 return; 252 } 253 254 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 255 ALTERA_UART_STATUS_TRDY_MSK) { 256 if (xmit->head == xmit->tail) 257 break; 258 altera_uart_writel(port, xmit->buf[xmit->tail], 259 ALTERA_UART_TXDATA_REG); 260 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 261 port->icount.tx++; 262 } 263 264 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 265 uart_write_wakeup(port); 266 267 if (xmit->head == xmit->tail) { 268 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; 269 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 270 } 271 } 272 273 static irqreturn_t altera_uart_interrupt(int irq, void *data) 274 { 275 struct uart_port *port = data; 276 struct altera_uart *pp = container_of(port, struct altera_uart, port); 277 unsigned int isr; 278 279 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr; 280 281 spin_lock(&port->lock); 282 if (isr & ALTERA_UART_STATUS_RRDY_MSK) 283 altera_uart_rx_chars(pp); 284 if (isr & ALTERA_UART_STATUS_TRDY_MSK) 285 altera_uart_tx_chars(pp); 286 spin_unlock(&port->lock); 287 288 return IRQ_RETVAL(isr); 289 } 290 291 static void altera_uart_timer(unsigned long data) 292 { 293 struct uart_port *port = (void *)data; 294 struct altera_uart *pp = container_of(port, struct altera_uart, port); 295 296 altera_uart_interrupt(0, port); 297 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); 298 } 299 300 static void altera_uart_config_port(struct uart_port *port, int flags) 301 { 302 port->type = PORT_ALTERA_UART; 303 304 /* Clear mask, so no surprise interrupts. */ 305 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG); 306 /* Clear status register */ 307 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG); 308 } 309 310 static int altera_uart_startup(struct uart_port *port) 311 { 312 struct altera_uart *pp = container_of(port, struct altera_uart, port); 313 unsigned long flags; 314 int ret; 315 316 if (!port->irq) { 317 setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port); 318 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); 319 return 0; 320 } 321 322 ret = request_irq(port->irq, altera_uart_interrupt, 0, 323 DRV_NAME, port); 324 if (ret) { 325 pr_err(DRV_NAME ": unable to attach Altera UART %d " 326 "interrupt vector=%d\n", port->line, port->irq); 327 return ret; 328 } 329 330 spin_lock_irqsave(&port->lock, flags); 331 332 /* Enable RX interrupts now */ 333 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK; 334 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); 335 336 spin_unlock_irqrestore(&port->lock, flags); 337 338 return 0; 339 } 340 341 static void altera_uart_shutdown(struct uart_port *port) 342 { 343 struct altera_uart *pp = container_of(port, struct altera_uart, port); 344 unsigned long flags; 345 346 spin_lock_irqsave(&port->lock, flags); 347 348 /* Disable all interrupts now */ 349 pp->imr = 0; 350 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); 351 352 spin_unlock_irqrestore(&port->lock, flags); 353 354 if (port->irq) 355 free_irq(port->irq, port); 356 else 357 del_timer_sync(&pp->tmr); 358 } 359 360 static const char *altera_uart_type(struct uart_port *port) 361 { 362 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL; 363 } 364 365 static int altera_uart_request_port(struct uart_port *port) 366 { 367 /* UARTs always present */ 368 return 0; 369 } 370 371 static void altera_uart_release_port(struct uart_port *port) 372 { 373 /* Nothing to release... */ 374 } 375 376 static int altera_uart_verify_port(struct uart_port *port, 377 struct serial_struct *ser) 378 { 379 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART)) 380 return -EINVAL; 381 return 0; 382 } 383 384 #ifdef CONFIG_CONSOLE_POLL 385 static int altera_uart_poll_get_char(struct uart_port *port) 386 { 387 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 388 ALTERA_UART_STATUS_RRDY_MSK)) 389 cpu_relax(); 390 391 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG); 392 } 393 394 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c) 395 { 396 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 397 ALTERA_UART_STATUS_TRDY_MSK)) 398 cpu_relax(); 399 400 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); 401 } 402 #endif 403 404 /* 405 * Define the basic serial functions we support. 406 */ 407 static const struct uart_ops altera_uart_ops = { 408 .tx_empty = altera_uart_tx_empty, 409 .get_mctrl = altera_uart_get_mctrl, 410 .set_mctrl = altera_uart_set_mctrl, 411 .start_tx = altera_uart_start_tx, 412 .stop_tx = altera_uart_stop_tx, 413 .stop_rx = altera_uart_stop_rx, 414 .break_ctl = altera_uart_break_ctl, 415 .startup = altera_uart_startup, 416 .shutdown = altera_uart_shutdown, 417 .set_termios = altera_uart_set_termios, 418 .type = altera_uart_type, 419 .request_port = altera_uart_request_port, 420 .release_port = altera_uart_release_port, 421 .config_port = altera_uart_config_port, 422 .verify_port = altera_uart_verify_port, 423 #ifdef CONFIG_CONSOLE_POLL 424 .poll_get_char = altera_uart_poll_get_char, 425 .poll_put_char = altera_uart_poll_put_char, 426 #endif 427 }; 428 429 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; 430 431 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) 432 433 static void altera_uart_console_putc(struct uart_port *port, int c) 434 { 435 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 436 ALTERA_UART_STATUS_TRDY_MSK)) 437 cpu_relax(); 438 439 writel(c, port->membase + ALTERA_UART_TXDATA_REG); 440 } 441 442 static void altera_uart_console_write(struct console *co, const char *s, 443 unsigned int count) 444 { 445 struct uart_port *port = &(altera_uart_ports + co->index)->port; 446 447 uart_console_write(port, s, count, altera_uart_console_putc); 448 } 449 450 static int __init altera_uart_console_setup(struct console *co, char *options) 451 { 452 struct uart_port *port; 453 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE; 454 int bits = 8; 455 int parity = 'n'; 456 int flow = 'n'; 457 458 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) 459 return -EINVAL; 460 port = &altera_uart_ports[co->index].port; 461 if (!port->membase) 462 return -ENODEV; 463 464 if (options) 465 uart_parse_options(options, &baud, &parity, &bits, &flow); 466 467 return uart_set_options(port, co, baud, parity, bits, flow); 468 } 469 470 static struct uart_driver altera_uart_driver; 471 472 static struct console altera_uart_console = { 473 .name = "ttyAL", 474 .write = altera_uart_console_write, 475 .device = uart_console_device, 476 .setup = altera_uart_console_setup, 477 .flags = CON_PRINTBUFFER, 478 .index = -1, 479 .data = &altera_uart_driver, 480 }; 481 482 static int __init altera_uart_console_init(void) 483 { 484 register_console(&altera_uart_console); 485 return 0; 486 } 487 488 console_initcall(altera_uart_console_init); 489 490 #define ALTERA_UART_CONSOLE (&altera_uart_console) 491 492 #else 493 494 #define ALTERA_UART_CONSOLE NULL 495 496 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */ 497 498 /* 499 * Define the altera_uart UART driver structure. 500 */ 501 static struct uart_driver altera_uart_driver = { 502 .owner = THIS_MODULE, 503 .driver_name = DRV_NAME, 504 .dev_name = "ttyAL", 505 .major = SERIAL_ALTERA_MAJOR, 506 .minor = SERIAL_ALTERA_MINOR, 507 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS, 508 .cons = ALTERA_UART_CONSOLE, 509 }; 510 511 static int altera_uart_probe(struct platform_device *pdev) 512 { 513 struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev); 514 struct uart_port *port; 515 struct resource *res_mem; 516 struct resource *res_irq; 517 int i = pdev->id; 518 int ret; 519 520 /* if id is -1 scan for a free id and use that one */ 521 if (i == -1) { 522 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) 523 if (altera_uart_ports[i].port.mapbase == 0) 524 break; 525 } 526 527 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) 528 return -EINVAL; 529 530 port = &altera_uart_ports[i].port; 531 532 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 533 if (res_mem) 534 port->mapbase = res_mem->start; 535 else if (platp) 536 port->mapbase = platp->mapbase; 537 else 538 return -EINVAL; 539 540 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 541 if (res_irq) 542 port->irq = res_irq->start; 543 else if (platp) 544 port->irq = platp->irq; 545 546 /* Check platform data first so we can override device node data */ 547 if (platp) 548 port->uartclk = platp->uartclk; 549 else { 550 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", 551 &port->uartclk); 552 if (ret) 553 return ret; 554 } 555 556 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); 557 if (!port->membase) 558 return -ENOMEM; 559 560 if (platp) 561 port->regshift = platp->bus_shift; 562 else 563 port->regshift = 0; 564 565 port->line = i; 566 port->type = PORT_ALTERA_UART; 567 port->iotype = SERIAL_IO_MEM; 568 port->ops = &altera_uart_ops; 569 port->flags = UPF_BOOT_AUTOCONF; 570 port->dev = &pdev->dev; 571 572 platform_set_drvdata(pdev, port); 573 574 uart_add_one_port(&altera_uart_driver, port); 575 576 return 0; 577 } 578 579 static int altera_uart_remove(struct platform_device *pdev) 580 { 581 struct uart_port *port = platform_get_drvdata(pdev); 582 583 if (port) { 584 uart_remove_one_port(&altera_uart_driver, port); 585 port->mapbase = 0; 586 } 587 588 return 0; 589 } 590 591 #ifdef CONFIG_OF 592 static const struct of_device_id altera_uart_match[] = { 593 { .compatible = "ALTR,uart-1.0", }, 594 { .compatible = "altr,uart-1.0", }, 595 {}, 596 }; 597 MODULE_DEVICE_TABLE(of, altera_uart_match); 598 #endif /* CONFIG_OF */ 599 600 static struct platform_driver altera_uart_platform_driver = { 601 .probe = altera_uart_probe, 602 .remove = altera_uart_remove, 603 .driver = { 604 .name = DRV_NAME, 605 .of_match_table = of_match_ptr(altera_uart_match), 606 }, 607 }; 608 609 static int __init altera_uart_init(void) 610 { 611 int rc; 612 613 rc = uart_register_driver(&altera_uart_driver); 614 if (rc) 615 return rc; 616 rc = platform_driver_register(&altera_uart_platform_driver); 617 if (rc) 618 uart_unregister_driver(&altera_uart_driver); 619 return rc; 620 } 621 622 static void __exit altera_uart_exit(void) 623 { 624 platform_driver_unregister(&altera_uart_platform_driver); 625 uart_unregister_driver(&altera_uart_driver); 626 } 627 628 module_init(altera_uart_init); 629 module_exit(altera_uart_exit); 630 631 MODULE_DESCRIPTION("Altera UART driver"); 632 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); 633 MODULE_LICENSE("GPL"); 634 MODULE_ALIAS("platform:" DRV_NAME); 635 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR); 636