1c6825c63SJeff Brasen // SPDX-License-Identifier: GPL-2.0+ 2c6825c63SJeff Brasen /* 3c6825c63SJeff Brasen * Serial Port driver for Tegra devices 4c6825c63SJeff Brasen * 5c6825c63SJeff Brasen * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. 6c6825c63SJeff Brasen */ 7c6825c63SJeff Brasen 8c6825c63SJeff Brasen #include <linux/acpi.h> 9c6825c63SJeff Brasen #include <linux/clk.h> 10c6825c63SJeff Brasen #include <linux/console.h> 11c6825c63SJeff Brasen #include <linux/delay.h> 12c6825c63SJeff Brasen #include <linux/io.h> 13c6825c63SJeff Brasen #include <linux/module.h> 14c6825c63SJeff Brasen #include <linux/reset.h> 15c6825c63SJeff Brasen #include <linux/slab.h> 16c6825c63SJeff Brasen 17c6825c63SJeff Brasen #include "8250.h" 18c6825c63SJeff Brasen 19c6825c63SJeff Brasen struct tegra_uart { 20c6825c63SJeff Brasen struct clk *clk; 21c6825c63SJeff Brasen struct reset_control *rst; 22c6825c63SJeff Brasen int line; 23c6825c63SJeff Brasen }; 24c6825c63SJeff Brasen 25c6825c63SJeff Brasen static void tegra_uart_handle_break(struct uart_port *p) 26c6825c63SJeff Brasen { 27c6825c63SJeff Brasen unsigned int status, tmout = 10000; 28c6825c63SJeff Brasen 29c6825c63SJeff Brasen do { 30c6825c63SJeff Brasen status = p->serial_in(p, UART_LSR); 31c6825c63SJeff Brasen if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) 32c6825c63SJeff Brasen status = p->serial_in(p, UART_RX); 33c6825c63SJeff Brasen else 34c6825c63SJeff Brasen break; 35c6825c63SJeff Brasen if (--tmout == 0) 36c6825c63SJeff Brasen break; 37c6825c63SJeff Brasen udelay(1); 38c6825c63SJeff Brasen } while (1); 39c6825c63SJeff Brasen } 40c6825c63SJeff Brasen 41c6825c63SJeff Brasen static int tegra_uart_probe(struct platform_device *pdev) 42c6825c63SJeff Brasen { 43c6825c63SJeff Brasen struct uart_8250_port port8250; 44c6825c63SJeff Brasen struct tegra_uart *uart; 45c6825c63SJeff Brasen struct uart_port *port; 46c6825c63SJeff Brasen struct resource *res; 47c6825c63SJeff Brasen int ret; 48c6825c63SJeff Brasen 49c6825c63SJeff Brasen uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL); 50c6825c63SJeff Brasen if (!uart) 51c6825c63SJeff Brasen return -ENOMEM; 52c6825c63SJeff Brasen 53c6825c63SJeff Brasen memset(&port8250, 0, sizeof(port8250)); 54c6825c63SJeff Brasen 55c6825c63SJeff Brasen port = &port8250.port; 56c6825c63SJeff Brasen spin_lock_init(&port->lock); 57c6825c63SJeff Brasen 58c6825c63SJeff Brasen port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | 59c6825c63SJeff Brasen UPF_FIXED_TYPE; 60c6825c63SJeff Brasen port->iotype = UPIO_MEM32; 61c6825c63SJeff Brasen port->regshift = 2; 62c6825c63SJeff Brasen port->type = PORT_TEGRA; 63c6825c63SJeff Brasen port->irqflags |= IRQF_SHARED; 64c6825c63SJeff Brasen port->dev = &pdev->dev; 65c6825c63SJeff Brasen port->handle_break = tegra_uart_handle_break; 66c6825c63SJeff Brasen 67c6825c63SJeff Brasen ret = of_alias_get_id(pdev->dev.of_node, "serial"); 68c6825c63SJeff Brasen if (ret >= 0) 69c6825c63SJeff Brasen port->line = ret; 70c6825c63SJeff Brasen 71c6825c63SJeff Brasen ret = platform_get_irq(pdev, 0); 72c6825c63SJeff Brasen if (ret < 0) 73c6825c63SJeff Brasen return ret; 74c6825c63SJeff Brasen 75c6825c63SJeff Brasen port->irq = ret; 76c6825c63SJeff Brasen 77c6825c63SJeff Brasen res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 78c6825c63SJeff Brasen if (!res) 79c6825c63SJeff Brasen return -ENODEV; 80c6825c63SJeff Brasen 81c6825c63SJeff Brasen port->membase = devm_ioremap(&pdev->dev, res->start, 82c6825c63SJeff Brasen resource_size(res)); 83c6825c63SJeff Brasen if (!port->membase) 84c6825c63SJeff Brasen return -ENOMEM; 85c6825c63SJeff Brasen 86c6825c63SJeff Brasen port->mapbase = res->start; 87c6825c63SJeff Brasen port->mapsize = resource_size(res); 88c6825c63SJeff Brasen 89c6825c63SJeff Brasen uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); 90c6825c63SJeff Brasen if (IS_ERR(uart->rst)) 91c6825c63SJeff Brasen return PTR_ERR(uart->rst); 92c6825c63SJeff Brasen 93c6825c63SJeff Brasen if (device_property_read_u32(&pdev->dev, "clock-frequency", 94c6825c63SJeff Brasen &port->uartclk)) { 95c6825c63SJeff Brasen uart->clk = devm_clk_get(&pdev->dev, NULL); 96c6825c63SJeff Brasen if (IS_ERR(uart->clk)) { 97c6825c63SJeff Brasen dev_err(&pdev->dev, "failed to get clock!\n"); 98c6825c63SJeff Brasen return -ENODEV; 99c6825c63SJeff Brasen } 100c6825c63SJeff Brasen 101c6825c63SJeff Brasen ret = clk_prepare_enable(uart->clk); 102c6825c63SJeff Brasen if (ret < 0) 103c6825c63SJeff Brasen return ret; 104c6825c63SJeff Brasen 105c6825c63SJeff Brasen port->uartclk = clk_get_rate(uart->clk); 106c6825c63SJeff Brasen } 107c6825c63SJeff Brasen 108c6825c63SJeff Brasen ret = reset_control_deassert(uart->rst); 109c6825c63SJeff Brasen if (ret) 110c6825c63SJeff Brasen goto err_clkdisable; 111c6825c63SJeff Brasen 112c6825c63SJeff Brasen ret = serial8250_register_8250_port(&port8250); 113c6825c63SJeff Brasen if (ret < 0) 114c6825c63SJeff Brasen goto err_clkdisable; 115c6825c63SJeff Brasen 116c6825c63SJeff Brasen platform_set_drvdata(pdev, uart); 117c6825c63SJeff Brasen uart->line = ret; 118c6825c63SJeff Brasen 119c6825c63SJeff Brasen return 0; 120c6825c63SJeff Brasen 121c6825c63SJeff Brasen err_clkdisable: 122c6825c63SJeff Brasen clk_disable_unprepare(uart->clk); 123c6825c63SJeff Brasen 124c6825c63SJeff Brasen return ret; 125c6825c63SJeff Brasen } 126c6825c63SJeff Brasen 127c6825c63SJeff Brasen static int tegra_uart_remove(struct platform_device *pdev) 128c6825c63SJeff Brasen { 129c6825c63SJeff Brasen struct tegra_uart *uart = platform_get_drvdata(pdev); 130c6825c63SJeff Brasen 131c6825c63SJeff Brasen serial8250_unregister_port(uart->line); 132c6825c63SJeff Brasen reset_control_assert(uart->rst); 133c6825c63SJeff Brasen clk_disable_unprepare(uart->clk); 134c6825c63SJeff Brasen 135c6825c63SJeff Brasen return 0; 136c6825c63SJeff Brasen } 137c6825c63SJeff Brasen 138c6825c63SJeff Brasen #ifdef CONFIG_PM_SLEEP 139c6825c63SJeff Brasen static int tegra_uart_suspend(struct device *dev) 140c6825c63SJeff Brasen { 141c6825c63SJeff Brasen struct tegra_uart *uart = dev_get_drvdata(dev); 142c6825c63SJeff Brasen struct uart_8250_port *port8250 = serial8250_get_port(uart->line); 143c6825c63SJeff Brasen struct uart_port *port = &port8250->port; 144c6825c63SJeff Brasen 145c6825c63SJeff Brasen serial8250_suspend_port(uart->line); 146c6825c63SJeff Brasen 147c6825c63SJeff Brasen if (!uart_console(port) || console_suspend_enabled) 148c6825c63SJeff Brasen clk_disable_unprepare(uart->clk); 149c6825c63SJeff Brasen 150c6825c63SJeff Brasen return 0; 151c6825c63SJeff Brasen } 152c6825c63SJeff Brasen 153c6825c63SJeff Brasen static int tegra_uart_resume(struct device *dev) 154c6825c63SJeff Brasen { 155c6825c63SJeff Brasen struct tegra_uart *uart = dev_get_drvdata(dev); 156c6825c63SJeff Brasen struct uart_8250_port *port8250 = serial8250_get_port(uart->line); 157c6825c63SJeff Brasen struct uart_port *port = &port8250->port; 158c6825c63SJeff Brasen 159c6825c63SJeff Brasen if (!uart_console(port) || console_suspend_enabled) 160c6825c63SJeff Brasen clk_prepare_enable(uart->clk); 161c6825c63SJeff Brasen 162c6825c63SJeff Brasen serial8250_resume_port(uart->line); 163c6825c63SJeff Brasen 164c6825c63SJeff Brasen return 0; 165c6825c63SJeff Brasen } 166c6825c63SJeff Brasen #endif 167c6825c63SJeff Brasen 168c6825c63SJeff Brasen static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend, 169c6825c63SJeff Brasen tegra_uart_resume); 170c6825c63SJeff Brasen 171c6825c63SJeff Brasen static const struct of_device_id tegra_uart_of_match[] = { 172c6825c63SJeff Brasen { .compatible = "nvidia,tegra20-uart", }, 173c6825c63SJeff Brasen { }, 174c6825c63SJeff Brasen }; 175c6825c63SJeff Brasen MODULE_DEVICE_TABLE(of, tegra_uart_of_match); 176c6825c63SJeff Brasen 177c6825c63SJeff Brasen static const struct acpi_device_id tegra_uart_acpi_match[] = { 178c6825c63SJeff Brasen { "NVDA0100", 0 }, 179c6825c63SJeff Brasen { }, 180c6825c63SJeff Brasen }; 181c6825c63SJeff Brasen MODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match); 182c6825c63SJeff Brasen 183c6825c63SJeff Brasen static struct platform_driver tegra_uart_driver = { 184c6825c63SJeff Brasen .driver = { 185c6825c63SJeff Brasen .name = "tegra-uart", 186c6825c63SJeff Brasen .pm = &tegra_uart_pm_ops, 187c6825c63SJeff Brasen .of_match_table = tegra_uart_of_match, 188c6825c63SJeff Brasen .acpi_match_table = ACPI_PTR(tegra_uart_acpi_match), 189c6825c63SJeff Brasen }, 190c6825c63SJeff Brasen .probe = tegra_uart_probe, 191c6825c63SJeff Brasen .remove = tegra_uart_remove, 192c6825c63SJeff Brasen }; 193c6825c63SJeff Brasen 194c6825c63SJeff Brasen module_platform_driver(tegra_uart_driver); 195c6825c63SJeff Brasen 196c6825c63SJeff Brasen MODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>"); 197c6825c63SJeff Brasen MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver"); 198c6825c63SJeff Brasen MODULE_LICENSE("GPL v2"); 199