1c6825c63SJeff Brasen // SPDX-License-Identifier: GPL-2.0+
2c6825c63SJeff Brasen /*
3c6825c63SJeff Brasen  *  Serial Port driver for Tegra devices
4c6825c63SJeff Brasen  *
5c6825c63SJeff Brasen  *  Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
6c6825c63SJeff Brasen  */
7c6825c63SJeff Brasen 
8c6825c63SJeff Brasen #include <linux/acpi.h>
9c6825c63SJeff Brasen #include <linux/clk.h>
10c6825c63SJeff Brasen #include <linux/console.h>
11c6825c63SJeff Brasen #include <linux/delay.h>
12c6825c63SJeff Brasen #include <linux/io.h>
13c6825c63SJeff Brasen #include <linux/module.h>
14933c9f19SRob Herring #include <linux/of.h>
15c6825c63SJeff Brasen #include <linux/reset.h>
16c6825c63SJeff Brasen #include <linux/slab.h>
17c6825c63SJeff Brasen 
18c6825c63SJeff Brasen #include "8250.h"
19c6825c63SJeff Brasen 
20c6825c63SJeff Brasen struct tegra_uart {
21c6825c63SJeff Brasen 	struct clk *clk;
22c6825c63SJeff Brasen 	struct reset_control *rst;
23c6825c63SJeff Brasen 	int line;
24c6825c63SJeff Brasen };
25c6825c63SJeff Brasen 
tegra_uart_handle_break(struct uart_port * p)26c6825c63SJeff Brasen static void tegra_uart_handle_break(struct uart_port *p)
27c6825c63SJeff Brasen {
28c6825c63SJeff Brasen 	unsigned int status, tmout = 10000;
29c6825c63SJeff Brasen 
307d7dec45SJiri Slaby 	while (1) {
31c6825c63SJeff Brasen 		status = p->serial_in(p, UART_LSR);
327d7dec45SJiri Slaby 		if (!(status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)))
33c6825c63SJeff Brasen 			break;
347d7dec45SJiri Slaby 
357d7dec45SJiri Slaby 		p->serial_in(p, UART_RX);
367d7dec45SJiri Slaby 
37c6825c63SJeff Brasen 		if (--tmout == 0)
38c6825c63SJeff Brasen 			break;
39c6825c63SJeff Brasen 		udelay(1);
407d7dec45SJiri Slaby 	}
41c6825c63SJeff Brasen }
42c6825c63SJeff Brasen 
tegra_uart_probe(struct platform_device * pdev)43c6825c63SJeff Brasen static int tegra_uart_probe(struct platform_device *pdev)
44c6825c63SJeff Brasen {
45c6825c63SJeff Brasen 	struct uart_8250_port port8250;
46c6825c63SJeff Brasen 	struct tegra_uart *uart;
47c6825c63SJeff Brasen 	struct uart_port *port;
48c6825c63SJeff Brasen 	struct resource *res;
49c6825c63SJeff Brasen 	int ret;
50c6825c63SJeff Brasen 
51c6825c63SJeff Brasen 	uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
52c6825c63SJeff Brasen 	if (!uart)
53c6825c63SJeff Brasen 		return -ENOMEM;
54c6825c63SJeff Brasen 
55c6825c63SJeff Brasen 	memset(&port8250, 0, sizeof(port8250));
56c6825c63SJeff Brasen 
57c6825c63SJeff Brasen 	port = &port8250.port;
58c6825c63SJeff Brasen 	spin_lock_init(&port->lock);
59c6825c63SJeff Brasen 
60c6825c63SJeff Brasen 	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
61c6825c63SJeff Brasen 		      UPF_FIXED_TYPE;
62c6825c63SJeff Brasen 	port->iotype = UPIO_MEM32;
63c6825c63SJeff Brasen 	port->regshift = 2;
64c6825c63SJeff Brasen 	port->type = PORT_TEGRA;
65c6825c63SJeff Brasen 	port->irqflags |= IRQF_SHARED;
66c6825c63SJeff Brasen 	port->dev = &pdev->dev;
67c6825c63SJeff Brasen 	port->handle_break = tegra_uart_handle_break;
68c6825c63SJeff Brasen 
69c6825c63SJeff Brasen 	ret = of_alias_get_id(pdev->dev.of_node, "serial");
70c6825c63SJeff Brasen 	if (ret >= 0)
71c6825c63SJeff Brasen 		port->line = ret;
72c6825c63SJeff Brasen 
73c6825c63SJeff Brasen 	ret = platform_get_irq(pdev, 0);
74c6825c63SJeff Brasen 	if (ret < 0)
75c6825c63SJeff Brasen 		return ret;
76c6825c63SJeff Brasen 
77c6825c63SJeff Brasen 	port->irq = ret;
78c6825c63SJeff Brasen 
79c6825c63SJeff Brasen 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
80c6825c63SJeff Brasen 	if (!res)
81c6825c63SJeff Brasen 		return -ENODEV;
82c6825c63SJeff Brasen 
83c6825c63SJeff Brasen 	port->membase = devm_ioremap(&pdev->dev, res->start,
84c6825c63SJeff Brasen 				     resource_size(res));
85c6825c63SJeff Brasen 	if (!port->membase)
86c6825c63SJeff Brasen 		return -ENOMEM;
87c6825c63SJeff Brasen 
88c6825c63SJeff Brasen 	port->mapbase = res->start;
89c6825c63SJeff Brasen 	port->mapsize = resource_size(res);
90c6825c63SJeff Brasen 
91c6825c63SJeff Brasen 	uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
92c6825c63SJeff Brasen 	if (IS_ERR(uart->rst))
93c6825c63SJeff Brasen 		return PTR_ERR(uart->rst);
94c6825c63SJeff Brasen 
95c6825c63SJeff Brasen 	if (device_property_read_u32(&pdev->dev, "clock-frequency",
96c6825c63SJeff Brasen 				     &port->uartclk)) {
97c6825c63SJeff Brasen 		uart->clk = devm_clk_get(&pdev->dev, NULL);
98c6825c63SJeff Brasen 		if (IS_ERR(uart->clk)) {
99c6825c63SJeff Brasen 			dev_err(&pdev->dev, "failed to get clock!\n");
100c6825c63SJeff Brasen 			return -ENODEV;
101c6825c63SJeff Brasen 		}
102c6825c63SJeff Brasen 
103c6825c63SJeff Brasen 		ret = clk_prepare_enable(uart->clk);
104c6825c63SJeff Brasen 		if (ret < 0)
105c6825c63SJeff Brasen 			return ret;
106c6825c63SJeff Brasen 
107c6825c63SJeff Brasen 		port->uartclk = clk_get_rate(uart->clk);
108c6825c63SJeff Brasen 	}
109c6825c63SJeff Brasen 
110c6825c63SJeff Brasen 	ret = reset_control_deassert(uart->rst);
111c6825c63SJeff Brasen 	if (ret)
112c6825c63SJeff Brasen 		goto err_clkdisable;
113c6825c63SJeff Brasen 
114c6825c63SJeff Brasen 	ret = serial8250_register_8250_port(&port8250);
115c6825c63SJeff Brasen 	if (ret < 0)
116*134f49deSChristophe JAILLET 		goto err_ctrl_assert;
117c6825c63SJeff Brasen 
118c6825c63SJeff Brasen 	platform_set_drvdata(pdev, uart);
119c6825c63SJeff Brasen 	uart->line = ret;
120c6825c63SJeff Brasen 
121c6825c63SJeff Brasen 	return 0;
122c6825c63SJeff Brasen 
123*134f49deSChristophe JAILLET err_ctrl_assert:
124*134f49deSChristophe JAILLET 	reset_control_assert(uart->rst);
125c6825c63SJeff Brasen err_clkdisable:
126c6825c63SJeff Brasen 	clk_disable_unprepare(uart->clk);
127c6825c63SJeff Brasen 
128c6825c63SJeff Brasen 	return ret;
129c6825c63SJeff Brasen }
130c6825c63SJeff Brasen 
tegra_uart_remove(struct platform_device * pdev)131c6825c63SJeff Brasen static int tegra_uart_remove(struct platform_device *pdev)
132c6825c63SJeff Brasen {
133c6825c63SJeff Brasen 	struct tegra_uart *uart = platform_get_drvdata(pdev);
134c6825c63SJeff Brasen 
135c6825c63SJeff Brasen 	serial8250_unregister_port(uart->line);
136c6825c63SJeff Brasen 	reset_control_assert(uart->rst);
137c6825c63SJeff Brasen 	clk_disable_unprepare(uart->clk);
138c6825c63SJeff Brasen 
139c6825c63SJeff Brasen 	return 0;
140c6825c63SJeff Brasen }
141c6825c63SJeff Brasen 
142c6825c63SJeff Brasen #ifdef CONFIG_PM_SLEEP
tegra_uart_suspend(struct device * dev)143c6825c63SJeff Brasen static int tegra_uart_suspend(struct device *dev)
144c6825c63SJeff Brasen {
145c6825c63SJeff Brasen 	struct tegra_uart *uart = dev_get_drvdata(dev);
146c6825c63SJeff Brasen 	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
147c6825c63SJeff Brasen 	struct uart_port *port = &port8250->port;
148c6825c63SJeff Brasen 
149c6825c63SJeff Brasen 	serial8250_suspend_port(uart->line);
150c6825c63SJeff Brasen 
151c6825c63SJeff Brasen 	if (!uart_console(port) || console_suspend_enabled)
152c6825c63SJeff Brasen 		clk_disable_unprepare(uart->clk);
153c6825c63SJeff Brasen 
154c6825c63SJeff Brasen 	return 0;
155c6825c63SJeff Brasen }
156c6825c63SJeff Brasen 
tegra_uart_resume(struct device * dev)157c6825c63SJeff Brasen static int tegra_uart_resume(struct device *dev)
158c6825c63SJeff Brasen {
159c6825c63SJeff Brasen 	struct tegra_uart *uart = dev_get_drvdata(dev);
160c6825c63SJeff Brasen 	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
161c6825c63SJeff Brasen 	struct uart_port *port = &port8250->port;
162c6825c63SJeff Brasen 
163c6825c63SJeff Brasen 	if (!uart_console(port) || console_suspend_enabled)
164c6825c63SJeff Brasen 		clk_prepare_enable(uart->clk);
165c6825c63SJeff Brasen 
166c6825c63SJeff Brasen 	serial8250_resume_port(uart->line);
167c6825c63SJeff Brasen 
168c6825c63SJeff Brasen 	return 0;
169c6825c63SJeff Brasen }
170c6825c63SJeff Brasen #endif
171c6825c63SJeff Brasen 
172c6825c63SJeff Brasen static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend,
173c6825c63SJeff Brasen 			 tegra_uart_resume);
174c6825c63SJeff Brasen 
175c6825c63SJeff Brasen static const struct of_device_id tegra_uart_of_match[] = {
176c6825c63SJeff Brasen 	{ .compatible = "nvidia,tegra20-uart", },
177c6825c63SJeff Brasen 	{ },
178c6825c63SJeff Brasen };
179c6825c63SJeff Brasen MODULE_DEVICE_TABLE(of, tegra_uart_of_match);
180c6825c63SJeff Brasen 
181dffa58b6SKrzysztof Kozlowski static const struct acpi_device_id tegra_uart_acpi_match[] __maybe_unused = {
182c6825c63SJeff Brasen 	{ "NVDA0100", 0 },
183c6825c63SJeff Brasen 	{ },
184c6825c63SJeff Brasen };
185c6825c63SJeff Brasen MODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match);
186c6825c63SJeff Brasen 
187c6825c63SJeff Brasen static struct platform_driver tegra_uart_driver = {
188c6825c63SJeff Brasen 	.driver = {
189c6825c63SJeff Brasen 		.name = "tegra-uart",
190c6825c63SJeff Brasen 		.pm = &tegra_uart_pm_ops,
191c6825c63SJeff Brasen 		.of_match_table = tegra_uart_of_match,
192c6825c63SJeff Brasen 		.acpi_match_table = ACPI_PTR(tegra_uart_acpi_match),
193c6825c63SJeff Brasen 	},
194c6825c63SJeff Brasen 	.probe = tegra_uart_probe,
195c6825c63SJeff Brasen 	.remove = tegra_uart_remove,
196c6825c63SJeff Brasen };
197c6825c63SJeff Brasen 
198c6825c63SJeff Brasen module_platform_driver(tegra_uart_driver);
199c6825c63SJeff Brasen 
200c6825c63SJeff Brasen MODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>");
201c6825c63SJeff Brasen MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver");
202c6825c63SJeff Brasen MODULE_LICENSE("GPL v2");
203