xref: /openbmc/linux/drivers/tty/serial/8250/8250_of.c (revision 8e774e02)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Serial Port driver for Open Firmware platform devices
4  *
5  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
6  */
7 #include <linux/console.h>
8 #include <linux/module.h>
9 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/serial_core.h>
12 #include <linux/serial_reg.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/of_platform.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/clk.h>
18 #include <linux/reset.h>
19 
20 #include "8250.h"
21 
22 struct of_serial_info {
23 	struct clk *clk;
24 	struct reset_control *rst;
25 	int type;
26 	int line;
27 };
28 
29 #ifdef CONFIG_ARCH_TEGRA
30 static void tegra_serial_handle_break(struct uart_port *p)
31 {
32 	unsigned int status, tmout = 10000;
33 
34 	do {
35 		status = p->serial_in(p, UART_LSR);
36 		if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
37 			status = p->serial_in(p, UART_RX);
38 		else
39 			break;
40 		if (--tmout == 0)
41 			break;
42 		udelay(1);
43 	} while (1);
44 }
45 #else
46 static inline void tegra_serial_handle_break(struct uart_port *port)
47 {
48 }
49 #endif
50 
51 /*
52  * Fill a struct uart_port for a given device node
53  */
54 static int of_platform_serial_setup(struct platform_device *ofdev,
55 			int type, struct uart_port *port,
56 			struct of_serial_info *info)
57 {
58 	struct resource resource;
59 	struct device_node *np = ofdev->dev.of_node;
60 	u32 clk, spd, prop;
61 	int ret, irq;
62 
63 	memset(port, 0, sizeof *port);
64 
65 	pm_runtime_enable(&ofdev->dev);
66 	pm_runtime_get_sync(&ofdev->dev);
67 
68 	if (of_property_read_u32(np, "clock-frequency", &clk)) {
69 
70 		/* Get clk rate through clk driver if present */
71 		info->clk = devm_clk_get(&ofdev->dev, NULL);
72 		if (IS_ERR(info->clk)) {
73 			ret = PTR_ERR(info->clk);
74 			if (ret != -EPROBE_DEFER)
75 				dev_warn(&ofdev->dev,
76 					 "failed to get clock: %d\n", ret);
77 			goto err_pmruntime;
78 		}
79 
80 		ret = clk_prepare_enable(info->clk);
81 		if (ret < 0)
82 			goto err_pmruntime;
83 
84 		clk = clk_get_rate(info->clk);
85 	}
86 	/* If current-speed was set, then try not to change it. */
87 	if (of_property_read_u32(np, "current-speed", &spd) == 0)
88 		port->custom_divisor = clk / (16 * spd);
89 
90 	ret = of_address_to_resource(np, 0, &resource);
91 	if (ret) {
92 		dev_warn(&ofdev->dev, "invalid address\n");
93 		goto err_unprepare;
94 	}
95 
96 	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
97 				  UPF_FIXED_TYPE;
98 	spin_lock_init(&port->lock);
99 
100 	if (resource_type(&resource) == IORESOURCE_IO) {
101 		port->iotype = UPIO_PORT;
102 		port->iobase = resource.start;
103 	} else {
104 		port->mapbase = resource.start;
105 		port->mapsize = resource_size(&resource);
106 
107 		/* Check for shifted address mapping */
108 		if (of_property_read_u32(np, "reg-offset", &prop) == 0)
109 			port->mapbase += prop;
110 
111 		port->iotype = UPIO_MEM;
112 		if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
113 			switch (prop) {
114 			case 1:
115 				port->iotype = UPIO_MEM;
116 				break;
117 			case 2:
118 				port->iotype = UPIO_MEM16;
119 				break;
120 			case 4:
121 				port->iotype = of_device_is_big_endian(np) ?
122 					       UPIO_MEM32BE : UPIO_MEM32;
123 				break;
124 			default:
125 				dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
126 					 prop);
127 				ret = -EINVAL;
128 				goto err_unprepare;
129 			}
130 		}
131 		port->flags |= UPF_IOREMAP;
132 	}
133 
134 	/* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
135 	if (of_device_is_compatible(np, "mrvl,mmp-uart"))
136 		port->regshift = 2;
137 
138 	/* Check for registers offset within the devices address range */
139 	if (of_property_read_u32(np, "reg-shift", &prop) == 0)
140 		port->regshift = prop;
141 
142 	/* Check for fifo size */
143 	if (of_property_read_u32(np, "fifo-size", &prop) == 0)
144 		port->fifosize = prop;
145 
146 	/* Check for a fixed line number */
147 	ret = of_alias_get_id(np, "serial");
148 	if (ret >= 0)
149 		port->line = ret;
150 
151 	irq = of_irq_get(np, 0);
152 	if (irq < 0) {
153 		if (irq == -EPROBE_DEFER) {
154 			ret = -EPROBE_DEFER;
155 			goto err_unprepare;
156 		}
157 		/* IRQ support not mandatory */
158 		irq = 0;
159 	}
160 
161 	port->irq = irq;
162 
163 	info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
164 	if (IS_ERR(info->rst)) {
165 		ret = PTR_ERR(info->rst);
166 		goto err_unprepare;
167 	}
168 
169 	ret = reset_control_deassert(info->rst);
170 	if (ret)
171 		goto err_unprepare;
172 
173 	port->type = type;
174 	port->uartclk = clk;
175 	port->irqflags |= IRQF_SHARED;
176 
177 	if (of_property_read_bool(np, "no-loopback-test"))
178 		port->flags |= UPF_SKIP_TEST;
179 
180 	port->dev = &ofdev->dev;
181 
182 	switch (type) {
183 	case PORT_TEGRA:
184 		port->handle_break = tegra_serial_handle_break;
185 		break;
186 
187 	case PORT_RT2880:
188 		port->iotype = UPIO_AU;
189 		break;
190 	}
191 
192 	if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
193 	    (of_device_is_compatible(np, "fsl,ns16550") ||
194 	     of_device_is_compatible(np, "fsl,16550-FIFO64")))
195 		port->handle_irq = fsl8250_handle_irq;
196 
197 	return 0;
198 err_unprepare:
199 	clk_disable_unprepare(info->clk);
200 err_pmruntime:
201 	pm_runtime_put_sync(&ofdev->dev);
202 	pm_runtime_disable(&ofdev->dev);
203 	return ret;
204 }
205 
206 /*
207  * Try to register a serial port
208  */
209 static int of_platform_serial_probe(struct platform_device *ofdev)
210 {
211 	struct of_serial_info *info;
212 	struct uart_8250_port port8250;
213 	unsigned int port_type;
214 	u32 tx_threshold;
215 	int ret;
216 
217 	port_type = (unsigned long)of_device_get_match_data(&ofdev->dev);
218 	if (port_type == PORT_UNKNOWN)
219 		return -EINVAL;
220 
221 	if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
222 		return -EBUSY;
223 
224 	info = kzalloc(sizeof(*info), GFP_KERNEL);
225 	if (info == NULL)
226 		return -ENOMEM;
227 
228 	memset(&port8250, 0, sizeof(port8250));
229 	ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
230 	if (ret)
231 		goto err_free;
232 
233 	if (port8250.port.fifosize)
234 		port8250.capabilities = UART_CAP_FIFO;
235 
236 	/* Check for TX FIFO threshold & set tx_loadsz */
237 	if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
238 				  &tx_threshold) == 0) &&
239 	    (tx_threshold < port8250.port.fifosize))
240 		port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
241 
242 	if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
243 		port8250.capabilities |= UART_CAP_AFE;
244 
245 	if (of_property_read_u32(ofdev->dev.of_node,
246 			"overrun-throttle-ms",
247 			&port8250.overrun_backoff_time_ms) != 0)
248 		port8250.overrun_backoff_time_ms = 0;
249 
250 	ret = serial8250_register_8250_port(&port8250);
251 	if (ret < 0)
252 		goto err_dispose;
253 
254 	info->type = port_type;
255 	info->line = ret;
256 	platform_set_drvdata(ofdev, info);
257 	return 0;
258 err_dispose:
259 	irq_dispose_mapping(port8250.port.irq);
260 	pm_runtime_put_sync(&ofdev->dev);
261 	pm_runtime_disable(&ofdev->dev);
262 	clk_disable_unprepare(info->clk);
263 err_free:
264 	kfree(info);
265 	return ret;
266 }
267 
268 /*
269  * Release a line
270  */
271 static int of_platform_serial_remove(struct platform_device *ofdev)
272 {
273 	struct of_serial_info *info = platform_get_drvdata(ofdev);
274 
275 	serial8250_unregister_port(info->line);
276 
277 	reset_control_assert(info->rst);
278 	pm_runtime_put_sync(&ofdev->dev);
279 	pm_runtime_disable(&ofdev->dev);
280 	clk_disable_unprepare(info->clk);
281 	kfree(info);
282 	return 0;
283 }
284 
285 #ifdef CONFIG_PM_SLEEP
286 static int of_serial_suspend(struct device *dev)
287 {
288 	struct of_serial_info *info = dev_get_drvdata(dev);
289 	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
290 	struct uart_port *port = &port8250->port;
291 
292 	serial8250_suspend_port(info->line);
293 
294 	if (!uart_console(port) || console_suspend_enabled) {
295 		pm_runtime_put_sync(dev);
296 		clk_disable_unprepare(info->clk);
297 	}
298 	return 0;
299 }
300 
301 static int of_serial_resume(struct device *dev)
302 {
303 	struct of_serial_info *info = dev_get_drvdata(dev);
304 	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
305 	struct uart_port *port = &port8250->port;
306 
307 	if (!uart_console(port) || console_suspend_enabled) {
308 		pm_runtime_get_sync(dev);
309 		clk_prepare_enable(info->clk);
310 	}
311 
312 	serial8250_resume_port(info->line);
313 
314 	return 0;
315 }
316 #endif
317 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
318 
319 /*
320  * A few common types, add more as needed.
321  */
322 static const struct of_device_id of_platform_serial_table[] = {
323 	{ .compatible = "ns8250",   .data = (void *)PORT_8250, },
324 	{ .compatible = "ns16450",  .data = (void *)PORT_16450, },
325 	{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
326 	{ .compatible = "ns16550",  .data = (void *)PORT_16550, },
327 	{ .compatible = "ns16750",  .data = (void *)PORT_16750, },
328 	{ .compatible = "ns16850",  .data = (void *)PORT_16850, },
329 	{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
330 	{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
331 	{ .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
332 	{ .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, },
333 	{ .compatible = "altr,16550-FIFO32",
334 		.data = (void *)PORT_ALTR_16550_F32, },
335 	{ .compatible = "altr,16550-FIFO64",
336 		.data = (void *)PORT_ALTR_16550_F64, },
337 	{ .compatible = "altr,16550-FIFO128",
338 		.data = (void *)PORT_ALTR_16550_F128, },
339 	{ .compatible = "mediatek,mtk-btif",
340 		.data = (void *)PORT_MTK_BTIF, },
341 	{ .compatible = "mrvl,mmp-uart",
342 		.data = (void *)PORT_XSCALE, },
343 	{ .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
344 	{ .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
345 	{ /* end of list */ },
346 };
347 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
348 
349 static struct platform_driver of_platform_serial_driver = {
350 	.driver = {
351 		.name = "of_serial",
352 		.of_match_table = of_platform_serial_table,
353 		.pm = &of_serial_pm_ops,
354 	},
355 	.probe = of_platform_serial_probe,
356 	.remove = of_platform_serial_remove,
357 };
358 
359 module_platform_driver(of_platform_serial_driver);
360 
361 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
362 MODULE_LICENSE("GPL");
363 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
364