1 /* 2 * Mediatek 8250 driver. 3 * 4 * Copyright (c) 2014 MundoReader S.L. 5 * Author: Matthias Brugger <matthias.bgg@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 #include <linux/clk.h> 18 #include <linux/io.h> 19 #include <linux/module.h> 20 #include <linux/of_irq.h> 21 #include <linux/of_platform.h> 22 #include <linux/platform_device.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/serial_8250.h> 25 #include <linux/serial_reg.h> 26 27 #include "8250.h" 28 29 #define UART_MTK_HIGHS 0x09 /* Highspeed register */ 30 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */ 31 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */ 32 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ 33 34 struct mtk8250_data { 35 int line; 36 struct clk *uart_clk; 37 struct clk *bus_clk; 38 }; 39 40 static void 41 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, 42 struct ktermios *old) 43 { 44 unsigned long flags; 45 unsigned int baud, quot; 46 47 struct uart_8250_port *up = 48 container_of(port, struct uart_8250_port, port); 49 50 serial8250_do_set_termios(port, termios, old); 51 52 /* 53 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS) 54 * 55 * We need to recalcualte the quot register, as the claculation depends 56 * on the vaule in the highspeed register. 57 * 58 * Some baudrates are not supported by the chip, so we use the next 59 * lower rate supported and update termios c_flag. 60 * 61 * If highspeed register is set to 3, we need to specify sample count 62 * and sample point to increase accuracy. If not, we reset the 63 * registers to their default values. 64 */ 65 baud = uart_get_baud_rate(port, termios, old, 66 port->uartclk / 16 / 0xffff, 67 port->uartclk / 16); 68 69 if (baud <= 115200) { 70 serial_port_out(port, UART_MTK_HIGHS, 0x0); 71 quot = uart_get_divisor(port, baud); 72 } else if (baud <= 576000) { 73 serial_port_out(port, UART_MTK_HIGHS, 0x2); 74 75 /* Set to next lower baudrate supported */ 76 if ((baud == 500000) || (baud == 576000)) 77 baud = 460800; 78 quot = DIV_ROUND_UP(port->uartclk, 4 * baud); 79 } else { 80 serial_port_out(port, UART_MTK_HIGHS, 0x3); 81 82 /* Set to highest baudrate supported */ 83 if (baud >= 1152000) 84 baud = 921600; 85 quot = DIV_ROUND_UP(port->uartclk, 256 * baud); 86 } 87 88 /* 89 * Ok, we're now changing the port state. Do it with 90 * interrupts disabled. 91 */ 92 spin_lock_irqsave(&port->lock, flags); 93 94 /* set DLAB we have cval saved in up->lcr from the call to the core */ 95 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); 96 serial_dl_write(up, quot); 97 98 /* reset DLAB */ 99 serial_port_out(port, UART_LCR, up->lcr); 100 101 if (baud > 460800) { 102 unsigned int tmp; 103 104 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud); 105 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1); 106 serial_port_out(port, UART_MTK_SAMPLE_POINT, 107 (tmp - 2) >> 1); 108 } else { 109 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00); 110 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff); 111 } 112 113 spin_unlock_irqrestore(&port->lock, flags); 114 /* Don't rewrite B0 */ 115 if (tty_termios_baud_rate(termios)) 116 tty_termios_encode_baud_rate(termios, baud, baud); 117 } 118 119 static int mtk8250_runtime_suspend(struct device *dev) 120 { 121 struct mtk8250_data *data = dev_get_drvdata(dev); 122 123 clk_disable_unprepare(data->uart_clk); 124 clk_disable_unprepare(data->bus_clk); 125 126 return 0; 127 } 128 129 static int mtk8250_runtime_resume(struct device *dev) 130 { 131 struct mtk8250_data *data = dev_get_drvdata(dev); 132 int err; 133 134 err = clk_prepare_enable(data->uart_clk); 135 if (err) { 136 dev_warn(dev, "Can't enable clock\n"); 137 return err; 138 } 139 140 err = clk_prepare_enable(data->bus_clk); 141 if (err) { 142 dev_warn(dev, "Can't enable bus clock\n"); 143 return err; 144 } 145 146 return 0; 147 } 148 149 static void 150 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) 151 { 152 if (!state) 153 pm_runtime_get_sync(port->dev); 154 155 serial8250_do_pm(port, state, old); 156 157 if (state) 158 pm_runtime_put_sync_suspend(port->dev); 159 } 160 161 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p, 162 struct mtk8250_data *data) 163 { 164 data->uart_clk = devm_clk_get(&pdev->dev, "baud"); 165 if (IS_ERR(data->uart_clk)) { 166 /* 167 * For compatibility with older device trees try unnamed 168 * clk when no baud clk can be found. 169 */ 170 data->uart_clk = devm_clk_get(&pdev->dev, NULL); 171 if (IS_ERR(data->uart_clk)) { 172 dev_warn(&pdev->dev, "Can't get uart clock\n"); 173 return PTR_ERR(data->uart_clk); 174 } 175 176 return 0; 177 } 178 179 data->bus_clk = devm_clk_get(&pdev->dev, "bus"); 180 if (IS_ERR(data->bus_clk)) 181 return PTR_ERR(data->bus_clk); 182 183 return 0; 184 } 185 186 static int mtk8250_probe(struct platform_device *pdev) 187 { 188 struct uart_8250_port uart = {}; 189 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 190 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 191 struct mtk8250_data *data; 192 int err; 193 194 if (!regs || !irq) { 195 dev_err(&pdev->dev, "no registers/irq defined\n"); 196 return -EINVAL; 197 } 198 199 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, 200 resource_size(regs)); 201 if (!uart.port.membase) 202 return -ENOMEM; 203 204 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 205 if (!data) 206 return -ENOMEM; 207 208 if (pdev->dev.of_node) { 209 err = mtk8250_probe_of(pdev, &uart.port, data); 210 if (err) 211 return err; 212 } else 213 return -ENODEV; 214 215 spin_lock_init(&uart.port.lock); 216 uart.port.mapbase = regs->start; 217 uart.port.irq = irq->start; 218 uart.port.pm = mtk8250_do_pm; 219 uart.port.type = PORT_16550; 220 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 221 uart.port.dev = &pdev->dev; 222 uart.port.iotype = UPIO_MEM32; 223 uart.port.regshift = 2; 224 uart.port.private_data = data; 225 uart.port.set_termios = mtk8250_set_termios; 226 uart.port.uartclk = clk_get_rate(data->uart_clk); 227 228 /* Disable Rate Fix function */ 229 writel(0x0, uart.port.membase + 230 (MTK_UART_RATE_FIX << uart.port.regshift)); 231 232 platform_set_drvdata(pdev, data); 233 234 pm_runtime_enable(&pdev->dev); 235 if (!pm_runtime_enabled(&pdev->dev)) { 236 err = mtk8250_runtime_resume(&pdev->dev); 237 if (err) 238 return err; 239 } 240 241 data->line = serial8250_register_8250_port(&uart); 242 if (data->line < 0) 243 return data->line; 244 245 return 0; 246 } 247 248 static int mtk8250_remove(struct platform_device *pdev) 249 { 250 struct mtk8250_data *data = platform_get_drvdata(pdev); 251 252 pm_runtime_get_sync(&pdev->dev); 253 254 serial8250_unregister_port(data->line); 255 256 pm_runtime_disable(&pdev->dev); 257 pm_runtime_put_noidle(&pdev->dev); 258 259 if (!pm_runtime_status_suspended(&pdev->dev)) 260 mtk8250_runtime_suspend(&pdev->dev); 261 262 return 0; 263 } 264 265 #ifdef CONFIG_PM_SLEEP 266 static int mtk8250_suspend(struct device *dev) 267 { 268 struct mtk8250_data *data = dev_get_drvdata(dev); 269 270 serial8250_suspend_port(data->line); 271 272 return 0; 273 } 274 275 static int mtk8250_resume(struct device *dev) 276 { 277 struct mtk8250_data *data = dev_get_drvdata(dev); 278 279 serial8250_resume_port(data->line); 280 281 return 0; 282 } 283 #endif /* CONFIG_PM_SLEEP */ 284 285 static const struct dev_pm_ops mtk8250_pm_ops = { 286 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume) 287 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume, 288 NULL) 289 }; 290 291 static const struct of_device_id mtk8250_of_match[] = { 292 { .compatible = "mediatek,mt6577-uart" }, 293 { /* Sentinel */ } 294 }; 295 MODULE_DEVICE_TABLE(of, mtk8250_of_match); 296 297 static struct platform_driver mtk8250_platform_driver = { 298 .driver = { 299 .name = "mt6577-uart", 300 .pm = &mtk8250_pm_ops, 301 .of_match_table = mtk8250_of_match, 302 }, 303 .probe = mtk8250_probe, 304 .remove = mtk8250_remove, 305 }; 306 module_platform_driver(mtk8250_platform_driver); 307 308 #ifdef CONFIG_SERIAL_8250_CONSOLE 309 static int __init early_mtk8250_setup(struct earlycon_device *device, 310 const char *options) 311 { 312 if (!device->port.membase) 313 return -ENODEV; 314 315 device->port.iotype = UPIO_MEM32; 316 317 return early_serial8250_setup(device, NULL); 318 } 319 320 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup); 321 #endif 322 323 MODULE_AUTHOR("Matthias Brugger"); 324 MODULE_LICENSE("GPL"); 325 MODULE_DESCRIPTION("Mediatek 8250 serial port driver"); 326