1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Mediatek 8250 driver. 4 * 5 * Copyright (c) 2014 MundoReader S.L. 6 * Author: Matthias Brugger <matthias.bgg@gmail.com> 7 */ 8 #include <linux/clk.h> 9 #include <linux/io.h> 10 #include <linux/module.h> 11 #include <linux/of_irq.h> 12 #include <linux/of_platform.h> 13 #include <linux/pinctrl/consumer.h> 14 #include <linux/platform_device.h> 15 #include <linux/pm_runtime.h> 16 #include <linux/serial_8250.h> 17 #include <linux/serial_reg.h> 18 #include <linux/console.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/tty.h> 21 #include <linux/tty_flip.h> 22 23 #include "8250.h" 24 25 #define MTK_UART_HIGHS 0x09 /* Highspeed register */ 26 #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */ 27 #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */ 28 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ 29 #define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */ 30 #define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */ 31 #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */ 32 #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */ 33 #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */ 34 #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */ 35 #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */ 36 #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */ 37 #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */ 38 39 #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */ 40 #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */ 41 #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */ 42 #define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */ 43 #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */ 44 #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */ 45 #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */ 46 #define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS) 47 #define MTK_UART_DMA_EN_TX 0x2 48 #define MTK_UART_DMA_EN_RX 0x5 49 50 #define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */ 51 #define MTK_UART_RX_SIZE 0x8000 52 #define MTK_UART_TX_TRIGGER 1 53 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE 54 55 #ifdef CONFIG_SERIAL_8250_DMA 56 enum dma_rx_status { 57 DMA_RX_START = 0, 58 DMA_RX_RUNNING = 1, 59 DMA_RX_SHUTDOWN = 2, 60 }; 61 #endif 62 63 struct mtk8250_data { 64 int line; 65 unsigned int rx_pos; 66 unsigned int clk_count; 67 struct clk *uart_clk; 68 struct clk *bus_clk; 69 struct uart_8250_dma *dma; 70 #ifdef CONFIG_SERIAL_8250_DMA 71 enum dma_rx_status rx_status; 72 #endif 73 int rx_wakeup_irq; 74 }; 75 76 /* flow control mode */ 77 enum { 78 MTK_UART_FC_NONE, 79 MTK_UART_FC_SW, 80 MTK_UART_FC_HW, 81 }; 82 83 #ifdef CONFIG_SERIAL_8250_DMA 84 static void mtk8250_rx_dma(struct uart_8250_port *up); 85 86 static void mtk8250_dma_rx_complete(void *param) 87 { 88 struct uart_8250_port *up = param; 89 struct uart_8250_dma *dma = up->dma; 90 struct mtk8250_data *data = up->port.private_data; 91 struct tty_port *tty_port = &up->port.state->port; 92 struct dma_tx_state state; 93 int copied, total, cnt; 94 unsigned char *ptr; 95 96 if (data->rx_status == DMA_RX_SHUTDOWN) 97 return; 98 99 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 100 total = dma->rx_size - state.residue; 101 cnt = total; 102 103 if ((data->rx_pos + cnt) > dma->rx_size) 104 cnt = dma->rx_size - data->rx_pos; 105 106 ptr = (unsigned char *)(data->rx_pos + dma->rx_buf); 107 copied = tty_insert_flip_string(tty_port, ptr, cnt); 108 data->rx_pos += cnt; 109 110 if (total > cnt) { 111 ptr = (unsigned char *)(dma->rx_buf); 112 cnt = total - cnt; 113 copied += tty_insert_flip_string(tty_port, ptr, cnt); 114 data->rx_pos = cnt; 115 } 116 117 up->port.icount.rx += copied; 118 119 tty_flip_buffer_push(tty_port); 120 121 mtk8250_rx_dma(up); 122 } 123 124 static void mtk8250_rx_dma(struct uart_8250_port *up) 125 { 126 struct uart_8250_dma *dma = up->dma; 127 struct dma_async_tx_descriptor *desc; 128 129 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 130 dma->rx_size, DMA_DEV_TO_MEM, 131 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 132 if (!desc) { 133 pr_err("failed to prepare rx slave single\n"); 134 return; 135 } 136 137 desc->callback = mtk8250_dma_rx_complete; 138 desc->callback_param = up; 139 140 dma->rx_cookie = dmaengine_submit(desc); 141 142 dma_async_issue_pending(dma->rxchan); 143 } 144 145 static void mtk8250_dma_enable(struct uart_8250_port *up) 146 { 147 struct uart_8250_dma *dma = up->dma; 148 struct mtk8250_data *data = up->port.private_data; 149 int lcr = serial_in(up, UART_LCR); 150 151 if (data->rx_status != DMA_RX_START) 152 return; 153 154 dma->rxconf.src_port_window_size = dma->rx_size; 155 dma->rxconf.src_addr = dma->rx_addr; 156 157 dma->txconf.dst_port_window_size = UART_XMIT_SIZE; 158 dma->txconf.dst_addr = dma->tx_addr; 159 160 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | 161 UART_FCR_CLEAR_XMIT); 162 serial_out(up, MTK_UART_DMA_EN, 163 MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX); 164 165 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 166 serial_out(up, UART_EFR, UART_EFR_ECB); 167 serial_out(up, UART_LCR, lcr); 168 169 if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0) 170 pr_err("failed to configure rx dma channel\n"); 171 if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0) 172 pr_err("failed to configure tx dma channel\n"); 173 174 data->rx_status = DMA_RX_RUNNING; 175 data->rx_pos = 0; 176 mtk8250_rx_dma(up); 177 } 178 #endif 179 180 static int mtk8250_startup(struct uart_port *port) 181 { 182 #ifdef CONFIG_SERIAL_8250_DMA 183 struct uart_8250_port *up = up_to_u8250p(port); 184 struct mtk8250_data *data = port->private_data; 185 186 /* disable DMA for console */ 187 if (uart_console(port)) 188 up->dma = NULL; 189 190 if (up->dma) { 191 data->rx_status = DMA_RX_START; 192 uart_circ_clear(&port->state->xmit); 193 } 194 #endif 195 memset(&port->icount, 0, sizeof(port->icount)); 196 197 return serial8250_do_startup(port); 198 } 199 200 static void mtk8250_shutdown(struct uart_port *port) 201 { 202 #ifdef CONFIG_SERIAL_8250_DMA 203 struct uart_8250_port *up = up_to_u8250p(port); 204 struct mtk8250_data *data = port->private_data; 205 206 if (up->dma) 207 data->rx_status = DMA_RX_SHUTDOWN; 208 #endif 209 210 return serial8250_do_shutdown(port); 211 } 212 213 static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask) 214 { 215 serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask)); 216 } 217 218 static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask) 219 { 220 serial_out(up, UART_IER, serial_in(up, UART_IER) | mask); 221 } 222 223 static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) 224 { 225 struct uart_port *port = &up->port; 226 int lcr = serial_in(up, UART_LCR); 227 228 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 229 serial_out(up, UART_EFR, UART_EFR_ECB); 230 serial_out(up, UART_LCR, lcr); 231 lcr = serial_in(up, UART_LCR); 232 233 switch (mode) { 234 case MTK_UART_FC_NONE: 235 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); 236 serial_out(up, MTK_UART_ESCAPE_EN, 0x00); 237 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 238 serial_out(up, UART_EFR, serial_in(up, UART_EFR) & 239 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))); 240 serial_out(up, UART_LCR, lcr); 241 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI | 242 MTK_UART_IER_RTSI | MTK_UART_IER_CTSI); 243 break; 244 245 case MTK_UART_FC_HW: 246 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); 247 serial_out(up, MTK_UART_ESCAPE_EN, 0x00); 248 serial_out(up, UART_MCR, UART_MCR_RTS); 249 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 250 251 /*enable hw flow control*/ 252 serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC | 253 (serial_in(up, UART_EFR) & 254 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)))); 255 256 serial_out(up, UART_LCR, lcr); 257 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI); 258 mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI); 259 break; 260 261 case MTK_UART_FC_SW: /*MTK software flow control */ 262 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); 263 serial_out(up, MTK_UART_ESCAPE_EN, 0x01); 264 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 265 266 /*enable sw flow control */ 267 serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 | 268 (serial_in(up, UART_EFR) & 269 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)))); 270 271 serial_out(up, UART_XON1, START_CHAR(port->state->port.tty)); 272 serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty)); 273 serial_out(up, UART_LCR, lcr); 274 mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI); 275 mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI); 276 break; 277 default: 278 break; 279 } 280 } 281 282 static void 283 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, 284 struct ktermios *old) 285 { 286 unsigned short fraction_L_mapping[] = { 287 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF 288 }; 289 unsigned short fraction_M_mapping[] = { 290 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3 291 }; 292 struct uart_8250_port *up = up_to_u8250p(port); 293 unsigned int baud, quot, fraction; 294 unsigned long flags; 295 int mode; 296 297 #ifdef CONFIG_SERIAL_8250_DMA 298 if (up->dma) { 299 if (uart_console(port)) { 300 devm_kfree(up->port.dev, up->dma); 301 up->dma = NULL; 302 } else { 303 mtk8250_dma_enable(up); 304 } 305 } 306 #endif 307 308 serial8250_do_set_termios(port, termios, old); 309 310 /* 311 * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS) 312 * 313 * We need to recalcualte the quot register, as the claculation depends 314 * on the vaule in the highspeed register. 315 * 316 * Some baudrates are not supported by the chip, so we use the next 317 * lower rate supported and update termios c_flag. 318 * 319 * If highspeed register is set to 3, we need to specify sample count 320 * and sample point to increase accuracy. If not, we reset the 321 * registers to their default values. 322 */ 323 baud = uart_get_baud_rate(port, termios, old, 324 port->uartclk / 16 / UART_DIV_MAX, 325 port->uartclk); 326 327 if (baud < 115200) { 328 serial_port_out(port, MTK_UART_HIGHS, 0x0); 329 quot = uart_get_divisor(port, baud); 330 } else { 331 serial_port_out(port, MTK_UART_HIGHS, 0x3); 332 quot = DIV_ROUND_UP(port->uartclk, 256 * baud); 333 } 334 335 /* 336 * Ok, we're now changing the port state. Do it with 337 * interrupts disabled. 338 */ 339 spin_lock_irqsave(&port->lock, flags); 340 341 /* set DLAB we have cval saved in up->lcr from the call to the core */ 342 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); 343 serial_dl_write(up, quot); 344 345 /* reset DLAB */ 346 serial_port_out(port, UART_LCR, up->lcr); 347 348 if (baud >= 115200) { 349 unsigned int tmp; 350 351 tmp = (port->uartclk / (baud * quot)) - 1; 352 serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp); 353 serial_port_out(port, MTK_UART_SAMPLE_POINT, 354 (tmp >> 1) - 1); 355 356 /*count fraction to set fractoin register */ 357 fraction = ((port->uartclk * 100) / baud / quot) % 100; 358 fraction = DIV_ROUND_CLOSEST(fraction, 10); 359 serial_port_out(port, MTK_UART_FRACDIV_L, 360 fraction_L_mapping[fraction]); 361 serial_port_out(port, MTK_UART_FRACDIV_M, 362 fraction_M_mapping[fraction]); 363 } else { 364 serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00); 365 serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff); 366 serial_port_out(port, MTK_UART_FRACDIV_L, 0x00); 367 serial_port_out(port, MTK_UART_FRACDIV_M, 0x00); 368 } 369 370 if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS))) 371 mode = MTK_UART_FC_HW; 372 else if (termios->c_iflag & CRTSCTS) 373 mode = MTK_UART_FC_SW; 374 else 375 mode = MTK_UART_FC_NONE; 376 377 mtk8250_set_flow_ctrl(up, mode); 378 379 if (uart_console(port)) 380 up->port.cons->cflag = termios->c_cflag; 381 382 spin_unlock_irqrestore(&port->lock, flags); 383 /* Don't rewrite B0 */ 384 if (tty_termios_baud_rate(termios)) 385 tty_termios_encode_baud_rate(termios, baud, baud); 386 } 387 388 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev) 389 { 390 struct mtk8250_data *data = dev_get_drvdata(dev); 391 392 clk_disable_unprepare(data->uart_clk); 393 clk_disable_unprepare(data->bus_clk); 394 395 return 0; 396 } 397 398 static int __maybe_unused mtk8250_runtime_resume(struct device *dev) 399 { 400 struct mtk8250_data *data = dev_get_drvdata(dev); 401 int err; 402 403 err = clk_prepare_enable(data->uart_clk); 404 if (err) { 405 dev_warn(dev, "Can't enable clock\n"); 406 return err; 407 } 408 409 err = clk_prepare_enable(data->bus_clk); 410 if (err) { 411 dev_warn(dev, "Can't enable bus clock\n"); 412 return err; 413 } 414 415 return 0; 416 } 417 418 static void 419 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) 420 { 421 if (!state) 422 pm_runtime_get_sync(port->dev); 423 424 serial8250_do_pm(port, state, old); 425 426 if (state) 427 pm_runtime_put_sync_suspend(port->dev); 428 } 429 430 #ifdef CONFIG_SERIAL_8250_DMA 431 static bool mtk8250_dma_filter(struct dma_chan *chan, void *param) 432 { 433 return false; 434 } 435 #endif 436 437 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p, 438 struct mtk8250_data *data) 439 { 440 #ifdef CONFIG_SERIAL_8250_DMA 441 int dmacnt; 442 #endif 443 444 data->uart_clk = devm_clk_get(&pdev->dev, "baud"); 445 if (IS_ERR(data->uart_clk)) { 446 /* 447 * For compatibility with older device trees try unnamed 448 * clk when no baud clk can be found. 449 */ 450 data->uart_clk = devm_clk_get(&pdev->dev, NULL); 451 if (IS_ERR(data->uart_clk)) { 452 dev_warn(&pdev->dev, "Can't get uart clock\n"); 453 return PTR_ERR(data->uart_clk); 454 } 455 456 return 0; 457 } 458 459 data->bus_clk = devm_clk_get(&pdev->dev, "bus"); 460 if (IS_ERR(data->bus_clk)) 461 return PTR_ERR(data->bus_clk); 462 463 data->dma = NULL; 464 #ifdef CONFIG_SERIAL_8250_DMA 465 dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names"); 466 if (dmacnt == 2) { 467 data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma), 468 GFP_KERNEL); 469 if (!data->dma) 470 return -ENOMEM; 471 472 data->dma->fn = mtk8250_dma_filter; 473 data->dma->rx_size = MTK_UART_RX_SIZE; 474 data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER; 475 data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER; 476 } 477 #endif 478 479 return 0; 480 } 481 482 static int mtk8250_probe(struct platform_device *pdev) 483 { 484 struct uart_8250_port uart = {}; 485 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 486 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 487 struct mtk8250_data *data; 488 int err; 489 490 if (!regs || !irq) { 491 dev_err(&pdev->dev, "no registers/irq defined\n"); 492 return -EINVAL; 493 } 494 495 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, 496 resource_size(regs)); 497 if (!uart.port.membase) 498 return -ENOMEM; 499 500 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 501 if (!data) 502 return -ENOMEM; 503 504 if (pdev->dev.of_node) { 505 err = mtk8250_probe_of(pdev, &uart.port, data); 506 if (err) 507 return err; 508 } else 509 return -ENODEV; 510 511 spin_lock_init(&uart.port.lock); 512 uart.port.mapbase = regs->start; 513 uart.port.irq = irq->start; 514 uart.port.pm = mtk8250_do_pm; 515 uart.port.type = PORT_16550; 516 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 517 uart.port.dev = &pdev->dev; 518 uart.port.iotype = UPIO_MEM32; 519 uart.port.regshift = 2; 520 uart.port.private_data = data; 521 uart.port.shutdown = mtk8250_shutdown; 522 uart.port.startup = mtk8250_startup; 523 uart.port.set_termios = mtk8250_set_termios; 524 uart.port.uartclk = clk_get_rate(data->uart_clk); 525 #ifdef CONFIG_SERIAL_8250_DMA 526 if (data->dma) 527 uart.dma = data->dma; 528 #endif 529 530 /* Disable Rate Fix function */ 531 writel(0x0, uart.port.membase + 532 (MTK_UART_RATE_FIX << uart.port.regshift)); 533 534 platform_set_drvdata(pdev, data); 535 536 err = mtk8250_runtime_resume(&pdev->dev); 537 if (err) 538 return err; 539 540 data->line = serial8250_register_8250_port(&uart); 541 if (data->line < 0) 542 return data->line; 543 544 pm_runtime_set_active(&pdev->dev); 545 pm_runtime_enable(&pdev->dev); 546 547 data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1); 548 549 return 0; 550 } 551 552 static int mtk8250_remove(struct platform_device *pdev) 553 { 554 struct mtk8250_data *data = platform_get_drvdata(pdev); 555 556 pm_runtime_get_sync(&pdev->dev); 557 558 serial8250_unregister_port(data->line); 559 mtk8250_runtime_suspend(&pdev->dev); 560 561 pm_runtime_disable(&pdev->dev); 562 pm_runtime_put_noidle(&pdev->dev); 563 564 return 0; 565 } 566 567 static int __maybe_unused mtk8250_suspend(struct device *dev) 568 { 569 struct mtk8250_data *data = dev_get_drvdata(dev); 570 int irq = data->rx_wakeup_irq; 571 int err; 572 573 serial8250_suspend_port(data->line); 574 575 pinctrl_pm_select_sleep_state(dev); 576 if (irq >= 0) { 577 err = enable_irq_wake(irq); 578 if (err) { 579 dev_err(dev, 580 "failed to enable irq wake on IRQ %d: %d\n", 581 irq, err); 582 pinctrl_pm_select_default_state(dev); 583 serial8250_resume_port(data->line); 584 return err; 585 } 586 } 587 588 return 0; 589 } 590 591 static int __maybe_unused mtk8250_resume(struct device *dev) 592 { 593 struct mtk8250_data *data = dev_get_drvdata(dev); 594 int irq = data->rx_wakeup_irq; 595 596 if (irq >= 0) 597 disable_irq_wake(irq); 598 pinctrl_pm_select_default_state(dev); 599 600 serial8250_resume_port(data->line); 601 602 return 0; 603 } 604 605 static const struct dev_pm_ops mtk8250_pm_ops = { 606 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume) 607 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume, 608 NULL) 609 }; 610 611 static const struct of_device_id mtk8250_of_match[] = { 612 { .compatible = "mediatek,mt6577-uart" }, 613 { /* Sentinel */ } 614 }; 615 MODULE_DEVICE_TABLE(of, mtk8250_of_match); 616 617 static struct platform_driver mtk8250_platform_driver = { 618 .driver = { 619 .name = "mt6577-uart", 620 .pm = &mtk8250_pm_ops, 621 .of_match_table = mtk8250_of_match, 622 }, 623 .probe = mtk8250_probe, 624 .remove = mtk8250_remove, 625 }; 626 module_platform_driver(mtk8250_platform_driver); 627 628 #ifdef CONFIG_SERIAL_8250_CONSOLE 629 static int __init early_mtk8250_setup(struct earlycon_device *device, 630 const char *options) 631 { 632 if (!device->port.membase) 633 return -ENODEV; 634 635 device->port.iotype = UPIO_MEM32; 636 637 return early_serial8250_setup(device, NULL); 638 } 639 640 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup); 641 #endif 642 643 MODULE_AUTHOR("Matthias Brugger"); 644 MODULE_LICENSE("GPL"); 645 MODULE_DESCRIPTION("Mediatek 8250 serial port driver"); 646