1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Mediatek 8250 driver. 4 * 5 * Copyright (c) 2014 MundoReader S.L. 6 * Author: Matthias Brugger <matthias.bgg@gmail.com> 7 */ 8 #include <linux/clk.h> 9 #include <linux/io.h> 10 #include <linux/module.h> 11 #include <linux/of_irq.h> 12 #include <linux/of_platform.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/serial_8250.h> 16 #include <linux/serial_reg.h> 17 18 #include "8250.h" 19 20 #define UART_MTK_HIGHS 0x09 /* Highspeed register */ 21 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */ 22 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */ 23 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ 24 25 struct mtk8250_data { 26 int line; 27 struct clk *uart_clk; 28 struct clk *bus_clk; 29 }; 30 31 static void 32 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, 33 struct ktermios *old) 34 { 35 struct uart_8250_port *up = up_to_u8250p(port); 36 unsigned long flags; 37 unsigned int baud, quot; 38 39 serial8250_do_set_termios(port, termios, old); 40 41 /* 42 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS) 43 * 44 * We need to recalcualte the quot register, as the claculation depends 45 * on the vaule in the highspeed register. 46 * 47 * Some baudrates are not supported by the chip, so we use the next 48 * lower rate supported and update termios c_flag. 49 * 50 * If highspeed register is set to 3, we need to specify sample count 51 * and sample point to increase accuracy. If not, we reset the 52 * registers to their default values. 53 */ 54 baud = uart_get_baud_rate(port, termios, old, 55 port->uartclk / 16 / UART_DIV_MAX, 56 port->uartclk); 57 58 if (baud <= 115200) { 59 serial_port_out(port, UART_MTK_HIGHS, 0x0); 60 quot = uart_get_divisor(port, baud); 61 } else if (baud <= 576000) { 62 serial_port_out(port, UART_MTK_HIGHS, 0x2); 63 64 /* Set to next lower baudrate supported */ 65 if ((baud == 500000) || (baud == 576000)) 66 baud = 460800; 67 quot = DIV_ROUND_UP(port->uartclk, 4 * baud); 68 } else { 69 serial_port_out(port, UART_MTK_HIGHS, 0x3); 70 quot = DIV_ROUND_UP(port->uartclk, 256 * baud); 71 } 72 73 /* 74 * Ok, we're now changing the port state. Do it with 75 * interrupts disabled. 76 */ 77 spin_lock_irqsave(&port->lock, flags); 78 79 /* set DLAB we have cval saved in up->lcr from the call to the core */ 80 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); 81 serial_dl_write(up, quot); 82 83 /* reset DLAB */ 84 serial_port_out(port, UART_LCR, up->lcr); 85 86 if (baud > 460800) { 87 unsigned int tmp; 88 89 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud); 90 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1); 91 serial_port_out(port, UART_MTK_SAMPLE_POINT, 92 (tmp - 2) >> 1); 93 } else { 94 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00); 95 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff); 96 } 97 98 spin_unlock_irqrestore(&port->lock, flags); 99 /* Don't rewrite B0 */ 100 if (tty_termios_baud_rate(termios)) 101 tty_termios_encode_baud_rate(termios, baud, baud); 102 } 103 104 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev) 105 { 106 struct mtk8250_data *data = dev_get_drvdata(dev); 107 108 clk_disable_unprepare(data->uart_clk); 109 clk_disable_unprepare(data->bus_clk); 110 111 return 0; 112 } 113 114 static int __maybe_unused mtk8250_runtime_resume(struct device *dev) 115 { 116 struct mtk8250_data *data = dev_get_drvdata(dev); 117 int err; 118 119 err = clk_prepare_enable(data->uart_clk); 120 if (err) { 121 dev_warn(dev, "Can't enable clock\n"); 122 return err; 123 } 124 125 err = clk_prepare_enable(data->bus_clk); 126 if (err) { 127 dev_warn(dev, "Can't enable bus clock\n"); 128 return err; 129 } 130 131 return 0; 132 } 133 134 static void 135 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) 136 { 137 if (!state) 138 pm_runtime_get_sync(port->dev); 139 140 serial8250_do_pm(port, state, old); 141 142 if (state) 143 pm_runtime_put_sync_suspend(port->dev); 144 } 145 146 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p, 147 struct mtk8250_data *data) 148 { 149 data->uart_clk = devm_clk_get(&pdev->dev, "baud"); 150 if (IS_ERR(data->uart_clk)) { 151 /* 152 * For compatibility with older device trees try unnamed 153 * clk when no baud clk can be found. 154 */ 155 data->uart_clk = devm_clk_get(&pdev->dev, NULL); 156 if (IS_ERR(data->uart_clk)) { 157 dev_warn(&pdev->dev, "Can't get uart clock\n"); 158 return PTR_ERR(data->uart_clk); 159 } 160 161 return 0; 162 } 163 164 data->bus_clk = devm_clk_get(&pdev->dev, "bus"); 165 return PTR_ERR_OR_ZERO(data->bus_clk); 166 } 167 168 static int mtk8250_probe(struct platform_device *pdev) 169 { 170 struct uart_8250_port uart = {}; 171 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 172 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 173 struct mtk8250_data *data; 174 int err; 175 176 if (!regs || !irq) { 177 dev_err(&pdev->dev, "no registers/irq defined\n"); 178 return -EINVAL; 179 } 180 181 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, 182 resource_size(regs)); 183 if (!uart.port.membase) 184 return -ENOMEM; 185 186 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 187 if (!data) 188 return -ENOMEM; 189 190 if (pdev->dev.of_node) { 191 err = mtk8250_probe_of(pdev, &uart.port, data); 192 if (err) 193 return err; 194 } else 195 return -ENODEV; 196 197 spin_lock_init(&uart.port.lock); 198 uart.port.mapbase = regs->start; 199 uart.port.irq = irq->start; 200 uart.port.pm = mtk8250_do_pm; 201 uart.port.type = PORT_16550; 202 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 203 uart.port.dev = &pdev->dev; 204 uart.port.iotype = UPIO_MEM32; 205 uart.port.regshift = 2; 206 uart.port.private_data = data; 207 uart.port.set_termios = mtk8250_set_termios; 208 uart.port.uartclk = clk_get_rate(data->uart_clk); 209 210 /* Disable Rate Fix function */ 211 writel(0x0, uart.port.membase + 212 (MTK_UART_RATE_FIX << uart.port.regshift)); 213 214 platform_set_drvdata(pdev, data); 215 216 err = mtk8250_runtime_resume(&pdev->dev); 217 if (err) 218 return err; 219 220 data->line = serial8250_register_8250_port(&uart); 221 if (data->line < 0) 222 return data->line; 223 224 pm_runtime_set_active(&pdev->dev); 225 pm_runtime_enable(&pdev->dev); 226 227 return 0; 228 } 229 230 static int mtk8250_remove(struct platform_device *pdev) 231 { 232 struct mtk8250_data *data = platform_get_drvdata(pdev); 233 234 pm_runtime_get_sync(&pdev->dev); 235 236 serial8250_unregister_port(data->line); 237 mtk8250_runtime_suspend(&pdev->dev); 238 239 pm_runtime_disable(&pdev->dev); 240 pm_runtime_put_noidle(&pdev->dev); 241 242 return 0; 243 } 244 245 static int __maybe_unused mtk8250_suspend(struct device *dev) 246 { 247 struct mtk8250_data *data = dev_get_drvdata(dev); 248 249 serial8250_suspend_port(data->line); 250 251 return 0; 252 } 253 254 static int __maybe_unused mtk8250_resume(struct device *dev) 255 { 256 struct mtk8250_data *data = dev_get_drvdata(dev); 257 258 serial8250_resume_port(data->line); 259 260 return 0; 261 } 262 263 static const struct dev_pm_ops mtk8250_pm_ops = { 264 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume) 265 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume, 266 NULL) 267 }; 268 269 static const struct of_device_id mtk8250_of_match[] = { 270 { .compatible = "mediatek,mt6577-uart" }, 271 { /* Sentinel */ } 272 }; 273 MODULE_DEVICE_TABLE(of, mtk8250_of_match); 274 275 static struct platform_driver mtk8250_platform_driver = { 276 .driver = { 277 .name = "mt6577-uart", 278 .pm = &mtk8250_pm_ops, 279 .of_match_table = mtk8250_of_match, 280 }, 281 .probe = mtk8250_probe, 282 .remove = mtk8250_remove, 283 }; 284 module_platform_driver(mtk8250_platform_driver); 285 286 #ifdef CONFIG_SERIAL_8250_CONSOLE 287 static int __init early_mtk8250_setup(struct earlycon_device *device, 288 const char *options) 289 { 290 if (!device->port.membase) 291 return -ENODEV; 292 293 device->port.iotype = UPIO_MEM32; 294 295 return early_serial8250_setup(device, NULL); 296 } 297 298 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup); 299 #endif 300 301 MODULE_AUTHOR("Matthias Brugger"); 302 MODULE_LICENSE("GPL"); 303 MODULE_DESCRIPTION("Mediatek 8250 serial port driver"); 304