1 /* 2 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs 3 * 4 * Copyright (C) 2015 Intel Corporation 5 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/bitops.h> 13 #include <linux/module.h> 14 #include <linux/pci.h> 15 #include <linux/rational.h> 16 17 #include <linux/dma/hsu.h> 18 #include <linux/8250_pci.h> 19 20 #include "8250.h" 21 22 #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b 23 #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c 24 #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d 25 #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191 26 #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8 27 28 /* Intel MID Specific registers */ 29 #define INTEL_MID_UART_DNV_FISR 0x08 30 #define INTEL_MID_UART_PS 0x30 31 #define INTEL_MID_UART_MUL 0x34 32 #define INTEL_MID_UART_DIV 0x38 33 34 struct mid8250; 35 36 struct mid8250_board { 37 unsigned int flags; 38 unsigned long freq; 39 unsigned int base_baud; 40 int (*setup)(struct mid8250 *, struct uart_port *p); 41 void (*exit)(struct mid8250 *); 42 }; 43 44 struct mid8250 { 45 int line; 46 int dma_index; 47 struct pci_dev *dma_dev; 48 struct uart_8250_dma dma; 49 struct mid8250_board *board; 50 struct hsu_dma_chip dma_chip; 51 }; 52 53 /*****************************************************************************/ 54 55 static int pnw_setup(struct mid8250 *mid, struct uart_port *p) 56 { 57 struct pci_dev *pdev = to_pci_dev(p->dev); 58 59 switch (pdev->device) { 60 case PCI_DEVICE_ID_INTEL_PNW_UART1: 61 mid->dma_index = 0; 62 break; 63 case PCI_DEVICE_ID_INTEL_PNW_UART2: 64 mid->dma_index = 1; 65 break; 66 case PCI_DEVICE_ID_INTEL_PNW_UART3: 67 mid->dma_index = 2; 68 break; 69 default: 70 return -EINVAL; 71 } 72 73 mid->dma_dev = pci_get_slot(pdev->bus, 74 PCI_DEVFN(PCI_SLOT(pdev->devfn), 3)); 75 return 0; 76 } 77 78 static int tng_handle_irq(struct uart_port *p) 79 { 80 struct mid8250 *mid = p->private_data; 81 struct uart_8250_port *up = up_to_u8250p(p); 82 struct hsu_dma_chip *chip; 83 u32 status; 84 int ret = 0; 85 int err; 86 87 chip = pci_get_drvdata(mid->dma_dev); 88 89 /* Rx DMA */ 90 err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status); 91 if (err > 0) { 92 serial8250_rx_dma_flush(up); 93 ret |= 1; 94 } else if (err == 0) 95 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status); 96 97 /* Tx DMA */ 98 err = hsu_dma_get_status(chip, mid->dma_index * 2, &status); 99 if (err > 0) 100 ret |= 1; 101 else if (err == 0) 102 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status); 103 104 /* UART */ 105 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR)); 106 return IRQ_RETVAL(ret); 107 } 108 109 static int tng_setup(struct mid8250 *mid, struct uart_port *p) 110 { 111 struct pci_dev *pdev = to_pci_dev(p->dev); 112 int index = PCI_FUNC(pdev->devfn); 113 114 /* 115 * Device 0000:00:04.0 is not a real HSU port. It provides a global 116 * register set for all HSU ports, although it has the same PCI ID. 117 * Skip it here. 118 */ 119 if (index-- == 0) 120 return -ENODEV; 121 122 mid->dma_index = index; 123 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0)); 124 125 p->handle_irq = tng_handle_irq; 126 return 0; 127 } 128 129 static int dnv_handle_irq(struct uart_port *p) 130 { 131 struct mid8250 *mid = p->private_data; 132 struct uart_8250_port *up = up_to_u8250p(p); 133 unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR); 134 u32 status; 135 int ret = 0; 136 int err; 137 138 if (fisr & BIT(2)) { 139 err = hsu_dma_get_status(&mid->dma_chip, 1, &status); 140 if (err > 0) { 141 serial8250_rx_dma_flush(up); 142 ret |= 1; 143 } else if (err == 0) 144 ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status); 145 } 146 if (fisr & BIT(1)) { 147 err = hsu_dma_get_status(&mid->dma_chip, 0, &status); 148 if (err > 0) 149 ret |= 1; 150 else if (err == 0) 151 ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status); 152 } 153 if (fisr & BIT(0)) 154 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR)); 155 return IRQ_RETVAL(ret); 156 } 157 158 #define DNV_DMA_CHAN_OFFSET 0x80 159 160 static int dnv_setup(struct mid8250 *mid, struct uart_port *p) 161 { 162 struct hsu_dma_chip *chip = &mid->dma_chip; 163 struct pci_dev *pdev = to_pci_dev(p->dev); 164 unsigned int bar = FL_GET_BASE(mid->board->flags); 165 int ret; 166 167 pci_set_master(pdev); 168 169 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 170 if (ret < 0) 171 return ret; 172 173 p->irq = pci_irq_vector(pdev, 0); 174 175 chip->dev = &pdev->dev; 176 chip->irq = pci_irq_vector(pdev, 0); 177 chip->regs = p->membase; 178 chip->length = pci_resource_len(pdev, bar); 179 chip->offset = DNV_DMA_CHAN_OFFSET; 180 181 /* Falling back to PIO mode if DMA probing fails */ 182 ret = hsu_dma_probe(chip); 183 if (ret) 184 return 0; 185 186 mid->dma_dev = pdev; 187 188 p->handle_irq = dnv_handle_irq; 189 return 0; 190 } 191 192 static void dnv_exit(struct mid8250 *mid) 193 { 194 if (!mid->dma_dev) 195 return; 196 hsu_dma_remove(&mid->dma_chip); 197 } 198 199 /*****************************************************************************/ 200 201 static void mid8250_set_termios(struct uart_port *p, 202 struct ktermios *termios, 203 struct ktermios *old) 204 { 205 unsigned int baud = tty_termios_baud_rate(termios); 206 struct mid8250 *mid = p->private_data; 207 unsigned short ps = 16; 208 unsigned long fuart = baud * ps; 209 unsigned long w = BIT(24) - 1; 210 unsigned long mul, div; 211 212 /* Gracefully handle the B0 case: fall back to B9600 */ 213 fuart = fuart ? fuart : 9600 * 16; 214 215 if (mid->board->freq < fuart) { 216 /* Find prescaler value that satisfies Fuart < Fref */ 217 if (mid->board->freq > baud) 218 ps = mid->board->freq / baud; /* baud rate too high */ 219 else 220 ps = 1; /* PLL case */ 221 fuart = baud * ps; 222 } else { 223 /* Get Fuart closer to Fref */ 224 fuart *= rounddown_pow_of_two(mid->board->freq / fuart); 225 } 226 227 rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div); 228 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */ 229 230 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */ 231 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */ 232 writel(div, p->membase + INTEL_MID_UART_DIV); 233 234 serial8250_do_set_termios(p, termios, old); 235 } 236 237 static bool mid8250_dma_filter(struct dma_chan *chan, void *param) 238 { 239 struct hsu_dma_slave *s = param; 240 241 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id) 242 return false; 243 244 chan->private = s; 245 return true; 246 } 247 248 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port) 249 { 250 struct uart_8250_dma *dma = &mid->dma; 251 struct device *dev = port->port.dev; 252 struct hsu_dma_slave *rx_param; 253 struct hsu_dma_slave *tx_param; 254 255 if (!mid->dma_dev) 256 return 0; 257 258 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); 259 if (!rx_param) 260 return -ENOMEM; 261 262 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); 263 if (!tx_param) 264 return -ENOMEM; 265 266 rx_param->chan_id = mid->dma_index * 2 + 1; 267 tx_param->chan_id = mid->dma_index * 2; 268 269 dma->rxconf.src_maxburst = 64; 270 dma->txconf.dst_maxburst = 64; 271 272 rx_param->dma_dev = &mid->dma_dev->dev; 273 tx_param->dma_dev = &mid->dma_dev->dev; 274 275 dma->fn = mid8250_dma_filter; 276 dma->rx_param = rx_param; 277 dma->tx_param = tx_param; 278 279 port->dma = dma; 280 return 0; 281 } 282 283 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) 284 { 285 struct uart_8250_port uart; 286 struct mid8250 *mid; 287 unsigned int bar; 288 int ret; 289 290 ret = pcim_enable_device(pdev); 291 if (ret) 292 return ret; 293 294 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL); 295 if (!mid) 296 return -ENOMEM; 297 298 mid->board = (struct mid8250_board *)id->driver_data; 299 bar = FL_GET_BASE(mid->board->flags); 300 301 memset(&uart, 0, sizeof(struct uart_8250_port)); 302 303 uart.port.dev = &pdev->dev; 304 uart.port.irq = pdev->irq; 305 uart.port.private_data = mid; 306 uart.port.type = PORT_16750; 307 uart.port.iotype = UPIO_MEM; 308 uart.port.uartclk = mid->board->base_baud * 16; 309 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; 310 uart.port.set_termios = mid8250_set_termios; 311 312 uart.port.mapbase = pci_resource_start(pdev, bar); 313 uart.port.membase = pcim_iomap(pdev, bar, 0); 314 if (!uart.port.membase) 315 return -ENOMEM; 316 317 if (mid->board->setup) { 318 ret = mid->board->setup(mid, &uart.port); 319 if (ret) 320 return ret; 321 } 322 323 ret = mid8250_dma_setup(mid, &uart); 324 if (ret) 325 goto err; 326 327 ret = serial8250_register_8250_port(&uart); 328 if (ret < 0) 329 goto err; 330 331 mid->line = ret; 332 333 pci_set_drvdata(pdev, mid); 334 return 0; 335 err: 336 if (mid->board->exit) 337 mid->board->exit(mid); 338 return ret; 339 } 340 341 static void mid8250_remove(struct pci_dev *pdev) 342 { 343 struct mid8250 *mid = pci_get_drvdata(pdev); 344 345 serial8250_unregister_port(mid->line); 346 347 if (mid->board->exit) 348 mid->board->exit(mid); 349 } 350 351 static const struct mid8250_board pnw_board = { 352 .flags = FL_BASE0, 353 .freq = 50000000, 354 .base_baud = 115200, 355 .setup = pnw_setup, 356 }; 357 358 static const struct mid8250_board tng_board = { 359 .flags = FL_BASE0, 360 .freq = 38400000, 361 .base_baud = 1843200, 362 .setup = tng_setup, 363 }; 364 365 static const struct mid8250_board dnv_board = { 366 .flags = FL_BASE1, 367 .freq = 133333333, 368 .base_baud = 115200, 369 .setup = dnv_setup, 370 .exit = dnv_exit, 371 }; 372 373 #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board } 374 375 static const struct pci_device_id pci_ids[] = { 376 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board), 377 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board), 378 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board), 379 MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board), 380 MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board), 381 { }, 382 }; 383 MODULE_DEVICE_TABLE(pci, pci_ids); 384 385 static struct pci_driver mid8250_pci_driver = { 386 .name = "8250_mid", 387 .id_table = pci_ids, 388 .probe = mid8250_probe, 389 .remove = mid8250_remove, 390 }; 391 392 module_pci_driver(mid8250_pci_driver); 393 394 MODULE_AUTHOR("Intel Corporation"); 395 MODULE_LICENSE("GPL v2"); 396 MODULE_DESCRIPTION("Intel MID UART driver"); 397