1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
4  *
5  * Copyright (C) 2016 Intel Corporation
6  * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7  */
8 
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
13 
14 #include <linux/dmaengine.h>
15 #include <linux/dma/dw.h>
16 
17 #include "8250_dwlib.h"
18 
19 #define PCI_DEVICE_ID_INTEL_QRK_UARTx	0x0936
20 
21 #define PCI_DEVICE_ID_INTEL_BYT_UART1	0x0f0a
22 #define PCI_DEVICE_ID_INTEL_BYT_UART2	0x0f0c
23 
24 #define PCI_DEVICE_ID_INTEL_BSW_UART1	0x228a
25 #define PCI_DEVICE_ID_INTEL_BSW_UART2	0x228c
26 
27 #define PCI_DEVICE_ID_INTEL_EHL_UART0	0x4b96
28 #define PCI_DEVICE_ID_INTEL_EHL_UART1	0x4b97
29 #define PCI_DEVICE_ID_INTEL_EHL_UART2	0x4b98
30 #define PCI_DEVICE_ID_INTEL_EHL_UART3	0x4b99
31 #define PCI_DEVICE_ID_INTEL_EHL_UART4	0x4b9a
32 #define PCI_DEVICE_ID_INTEL_EHL_UART5	0x4b9b
33 
34 #define PCI_DEVICE_ID_INTEL_BDW_UART1	0x9ce3
35 #define PCI_DEVICE_ID_INTEL_BDW_UART2	0x9ce4
36 
37 /* Intel LPSS specific registers */
38 
39 #define BYT_PRV_CLK			0x800
40 #define BYT_PRV_CLK_EN			BIT(0)
41 #define BYT_PRV_CLK_M_VAL_SHIFT		1
42 #define BYT_PRV_CLK_N_VAL_SHIFT		16
43 #define BYT_PRV_CLK_UPDATE		BIT(31)
44 
45 #define BYT_TX_OVF_INT			0x820
46 #define BYT_TX_OVF_INT_MASK		BIT(1)
47 
48 struct lpss8250;
49 
50 struct lpss8250_board {
51 	unsigned long freq;
52 	unsigned int base_baud;
53 	int (*setup)(struct lpss8250 *, struct uart_port *p);
54 	void (*exit)(struct lpss8250 *);
55 };
56 
57 struct lpss8250 {
58 	struct dw8250_port_data data;
59 	struct lpss8250_board *board;
60 
61 	/* DMA parameters */
62 	struct dw_dma_chip dma_chip;
63 	struct dw_dma_slave dma_param;
64 	u8 dma_maxburst;
65 };
66 
67 static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data)
68 {
69 	return container_of(data, struct lpss8250, data);
70 }
71 
72 static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
73 			    struct ktermios *old)
74 {
75 	unsigned int baud = tty_termios_baud_rate(termios);
76 	struct lpss8250 *lpss = to_lpss8250(p->private_data);
77 	unsigned long fref = lpss->board->freq, fuart = baud * 16;
78 	unsigned long w = BIT(15) - 1;
79 	unsigned long m, n;
80 	u32 reg;
81 
82 	/* Gracefully handle the B0 case: fall back to B9600 */
83 	fuart = fuart ? fuart : 9600 * 16;
84 
85 	/* Get Fuart closer to Fref */
86 	fuart *= rounddown_pow_of_two(fref / fuart);
87 
88 	/*
89 	 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
90 	 * dividers must be adjusted.
91 	 *
92 	 * uartclk = (m / n) * 100 MHz, where m <= n
93 	 */
94 	rational_best_approximation(fuart, fref, w, w, &m, &n);
95 	p->uartclk = fuart;
96 
97 	/* Reset the clock */
98 	reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
99 	writel(reg, p->membase + BYT_PRV_CLK);
100 	reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
101 	writel(reg, p->membase + BYT_PRV_CLK);
102 
103 	p->status &= ~UPSTAT_AUTOCTS;
104 	if (termios->c_cflag & CRTSCTS)
105 		p->status |= UPSTAT_AUTOCTS;
106 
107 	serial8250_do_set_termios(p, termios, old);
108 }
109 
110 static unsigned int byt_get_mctrl(struct uart_port *port)
111 {
112 	unsigned int ret = serial8250_do_get_mctrl(port);
113 
114 	/* Force DCD and DSR signals to permanently be reported as active */
115 	ret |= TIOCM_CAR | TIOCM_DSR;
116 
117 	return ret;
118 }
119 
120 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
121 {
122 	struct dw_dma_slave *param = &lpss->dma_param;
123 	struct pci_dev *pdev = to_pci_dev(port->dev);
124 	unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
125 	struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn);
126 
127 	switch (pdev->device) {
128 	case PCI_DEVICE_ID_INTEL_BYT_UART1:
129 	case PCI_DEVICE_ID_INTEL_BSW_UART1:
130 	case PCI_DEVICE_ID_INTEL_BDW_UART1:
131 		param->src_id = 3;
132 		param->dst_id = 2;
133 		break;
134 	case PCI_DEVICE_ID_INTEL_BYT_UART2:
135 	case PCI_DEVICE_ID_INTEL_BSW_UART2:
136 	case PCI_DEVICE_ID_INTEL_BDW_UART2:
137 		param->src_id = 5;
138 		param->dst_id = 4;
139 		break;
140 	default:
141 		return -EINVAL;
142 	}
143 
144 	param->dma_dev = &dma_dev->dev;
145 	param->m_master = 0;
146 	param->p_master = 1;
147 
148 	lpss->dma_maxburst = 16;
149 
150 	port->set_termios = byt_set_termios;
151 	port->get_mctrl = byt_get_mctrl;
152 
153 	/* Disable TX counter interrupts */
154 	writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
155 
156 	return 0;
157 }
158 
159 #ifdef CONFIG_SERIAL_8250_DMA
160 static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
161 	.nr_channels = 2,
162 	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
163 	.chan_priority = CHAN_PRIORITY_ASCENDING,
164 	.block_size = 4095,
165 	.nr_masters = 1,
166 	.data_width = {4},
167 	.multi_block = {0},
168 };
169 
170 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
171 {
172 	struct uart_8250_dma *dma = &lpss->data.dma;
173 	struct dw_dma_chip *chip = &lpss->dma_chip;
174 	struct dw_dma_slave *param = &lpss->dma_param;
175 	struct pci_dev *pdev = to_pci_dev(port->dev);
176 	int ret;
177 
178 	chip->pdata = &qrk_serial_dma_pdata;
179 	chip->dev = &pdev->dev;
180 	chip->id = pdev->devfn;
181 	chip->irq = pci_irq_vector(pdev, 0);
182 	chip->regs = pci_ioremap_bar(pdev, 1);
183 	if (!chip->regs)
184 		return;
185 
186 	/* Falling back to PIO mode if DMA probing fails */
187 	ret = dw_dma_probe(chip);
188 	if (ret)
189 		return;
190 
191 	pci_try_set_mwi(pdev);
192 
193 	/* Special DMA address for UART */
194 	dma->rx_dma_addr = 0xfffff000;
195 	dma->tx_dma_addr = 0xfffff000;
196 
197 	param->dma_dev = &pdev->dev;
198 	param->src_id = 0;
199 	param->dst_id = 1;
200 	param->hs_polarity = true;
201 
202 	lpss->dma_maxburst = 8;
203 }
204 
205 static void qrk_serial_exit_dma(struct lpss8250 *lpss)
206 {
207 	struct dw_dma_chip *chip = &lpss->dma_chip;
208 	struct dw_dma_slave *param = &lpss->dma_param;
209 
210 	if (!param->dma_dev)
211 		return;
212 
213 	dw_dma_remove(chip);
214 
215 	pci_iounmap(to_pci_dev(chip->dev), chip->regs);
216 }
217 #else	/* CONFIG_SERIAL_8250_DMA */
218 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
219 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
220 #endif	/* !CONFIG_SERIAL_8250_DMA */
221 
222 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
223 {
224 	struct pci_dev *pdev = to_pci_dev(port->dev);
225 	int ret;
226 
227 	pci_set_master(pdev);
228 
229 	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
230 	if (ret < 0)
231 		return ret;
232 
233 	port->irq = pci_irq_vector(pdev, 0);
234 
235 	qrk_serial_setup_dma(lpss, port);
236 	return 0;
237 }
238 
239 static void qrk_serial_exit(struct lpss8250 *lpss)
240 {
241 	qrk_serial_exit_dma(lpss);
242 }
243 
244 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
245 {
246 	struct dw_dma_slave *dws = param;
247 
248 	if (dws->dma_dev != chan->device->dev)
249 		return false;
250 
251 	chan->private = dws;
252 	return true;
253 }
254 
255 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
256 {
257 	struct uart_8250_dma *dma = &lpss->data.dma;
258 	struct dw_dma_slave *rx_param, *tx_param;
259 	struct device *dev = port->port.dev;
260 
261 	if (!lpss->dma_param.dma_dev)
262 		return 0;
263 
264 	rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
265 	if (!rx_param)
266 		return -ENOMEM;
267 
268 	tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
269 	if (!tx_param)
270 		return -ENOMEM;
271 
272 	*rx_param = lpss->dma_param;
273 	dma->rxconf.src_maxburst = lpss->dma_maxburst;
274 
275 	*tx_param = lpss->dma_param;
276 	dma->txconf.dst_maxburst = lpss->dma_maxburst;
277 
278 	dma->fn = lpss8250_dma_filter;
279 	dma->rx_param = rx_param;
280 	dma->tx_param = tx_param;
281 
282 	port->dma = dma;
283 	return 0;
284 }
285 
286 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
287 {
288 	struct uart_8250_port uart;
289 	struct lpss8250 *lpss;
290 	int ret;
291 
292 	ret = pcim_enable_device(pdev);
293 	if (ret)
294 		return ret;
295 
296 	lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
297 	if (!lpss)
298 		return -ENOMEM;
299 
300 	lpss->board = (struct lpss8250_board *)id->driver_data;
301 
302 	memset(&uart, 0, sizeof(struct uart_8250_port));
303 
304 	uart.port.dev = &pdev->dev;
305 	uart.port.irq = pdev->irq;
306 	uart.port.private_data = &lpss->data;
307 	uart.port.type = PORT_16550A;
308 	uart.port.iotype = UPIO_MEM;
309 	uart.port.regshift = 2;
310 	uart.port.uartclk = lpss->board->base_baud * 16;
311 	uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
312 	uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
313 	uart.port.mapbase = pci_resource_start(pdev, 0);
314 	uart.port.membase = pcim_iomap(pdev, 0, 0);
315 	if (!uart.port.membase)
316 		return -ENOMEM;
317 
318 	ret = lpss->board->setup(lpss, &uart.port);
319 	if (ret)
320 		return ret;
321 
322 	dw8250_setup_port(&uart.port);
323 
324 	ret = lpss8250_dma_setup(lpss, &uart);
325 	if (ret)
326 		goto err_exit;
327 
328 	ret = serial8250_register_8250_port(&uart);
329 	if (ret < 0)
330 		goto err_exit;
331 
332 	lpss->data.line = ret;
333 
334 	pci_set_drvdata(pdev, lpss);
335 	return 0;
336 
337 err_exit:
338 	if (lpss->board->exit)
339 		lpss->board->exit(lpss);
340 	return ret;
341 }
342 
343 static void lpss8250_remove(struct pci_dev *pdev)
344 {
345 	struct lpss8250 *lpss = pci_get_drvdata(pdev);
346 
347 	serial8250_unregister_port(lpss->data.line);
348 
349 	if (lpss->board->exit)
350 		lpss->board->exit(lpss);
351 }
352 
353 static const struct lpss8250_board byt_board = {
354 	.freq = 100000000,
355 	.base_baud = 2764800,
356 	.setup = byt_serial_setup,
357 };
358 
359 static const struct lpss8250_board ehl_board = {
360 	.freq = 200000000,
361 	.base_baud = 12500000,
362 };
363 
364 static const struct lpss8250_board qrk_board = {
365 	.freq = 44236800,
366 	.base_baud = 2764800,
367 	.setup = qrk_serial_setup,
368 	.exit = qrk_serial_exit,
369 };
370 
371 static const struct pci_device_id pci_ids[] = {
372 	{ PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) },
373 	{ PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) },
374 	{ PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) },
375 	{ PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) },
376 	{ PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) },
377 	{ PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) },
378 	{ PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) },
379 	{ PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) },
380 	{ PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) },
381 	{ PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) },
382 	{ PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) },
383 	{ PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) },
384 	{ PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) },
385 	{ }
386 };
387 MODULE_DEVICE_TABLE(pci, pci_ids);
388 
389 static struct pci_driver lpss8250_pci_driver = {
390 	.name           = "8250_lpss",
391 	.id_table       = pci_ids,
392 	.probe          = lpss8250_probe,
393 	.remove         = lpss8250_remove,
394 };
395 
396 module_pci_driver(lpss8250_pci_driver);
397 
398 MODULE_AUTHOR("Intel Corporation");
399 MODULE_LICENSE("GPL v2");
400 MODULE_DESCRIPTION("Intel LPSS UART driver");
401