1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs 4 * 5 * Copyright (C) 2016 Intel Corporation 6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/module.h> 11 #include <linux/pci.h> 12 #include <linux/rational.h> 13 14 #include <linux/dmaengine.h> 15 #include <linux/dma/dw.h> 16 17 #include "8250_dwlib.h" 18 19 #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936 20 21 #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a 22 #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c 23 24 #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a 25 #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c 26 27 #define PCI_DEVICE_ID_INTEL_EHL_UART0 0x4b96 28 #define PCI_DEVICE_ID_INTEL_EHL_UART1 0x4b97 29 #define PCI_DEVICE_ID_INTEL_EHL_UART2 0x4b98 30 #define PCI_DEVICE_ID_INTEL_EHL_UART3 0x4b99 31 #define PCI_DEVICE_ID_INTEL_EHL_UART4 0x4b9a 32 #define PCI_DEVICE_ID_INTEL_EHL_UART5 0x4b9b 33 34 #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3 35 #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4 36 37 /* Intel LPSS specific registers */ 38 39 #define BYT_PRV_CLK 0x800 40 #define BYT_PRV_CLK_EN BIT(0) 41 #define BYT_PRV_CLK_M_VAL_SHIFT 1 42 #define BYT_PRV_CLK_N_VAL_SHIFT 16 43 #define BYT_PRV_CLK_UPDATE BIT(31) 44 45 #define BYT_TX_OVF_INT 0x820 46 #define BYT_TX_OVF_INT_MASK BIT(1) 47 48 struct lpss8250; 49 50 struct lpss8250_board { 51 unsigned long freq; 52 unsigned int base_baud; 53 int (*setup)(struct lpss8250 *, struct uart_port *p); 54 void (*exit)(struct lpss8250 *); 55 }; 56 57 struct lpss8250 { 58 struct dw8250_port_data data; 59 struct lpss8250_board *board; 60 61 /* DMA parameters */ 62 struct dw_dma_chip dma_chip; 63 struct dw_dma_slave dma_param; 64 u8 dma_maxburst; 65 }; 66 67 static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data) 68 { 69 return container_of(data, struct lpss8250, data); 70 } 71 72 static void byt_set_termios(struct uart_port *p, struct ktermios *termios, 73 struct ktermios *old) 74 { 75 unsigned int baud = tty_termios_baud_rate(termios); 76 struct lpss8250 *lpss = to_lpss8250(p->private_data); 77 unsigned long fref = lpss->board->freq, fuart = baud * 16; 78 unsigned long w = BIT(15) - 1; 79 unsigned long m, n; 80 u32 reg; 81 82 /* Gracefully handle the B0 case: fall back to B9600 */ 83 fuart = fuart ? fuart : 9600 * 16; 84 85 /* Get Fuart closer to Fref */ 86 fuart *= rounddown_pow_of_two(fref / fuart); 87 88 /* 89 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the 90 * dividers must be adjusted. 91 * 92 * uartclk = (m / n) * 100 MHz, where m <= n 93 */ 94 rational_best_approximation(fuart, fref, w, w, &m, &n); 95 p->uartclk = fuart; 96 97 /* Reset the clock */ 98 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT); 99 writel(reg, p->membase + BYT_PRV_CLK); 100 reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE; 101 writel(reg, p->membase + BYT_PRV_CLK); 102 103 p->status &= ~UPSTAT_AUTOCTS; 104 if (termios->c_cflag & CRTSCTS) 105 p->status |= UPSTAT_AUTOCTS; 106 107 serial8250_do_set_termios(p, termios, old); 108 } 109 110 static unsigned int byt_get_mctrl(struct uart_port *port) 111 { 112 unsigned int ret = serial8250_do_get_mctrl(port); 113 114 /* Force DCD and DSR signals to permanently be reported as active */ 115 ret |= TIOCM_CAR | TIOCM_DSR; 116 117 return ret; 118 } 119 120 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port) 121 { 122 struct dw_dma_slave *param = &lpss->dma_param; 123 struct pci_dev *pdev = to_pci_dev(port->dev); 124 unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); 125 struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn); 126 127 switch (pdev->device) { 128 case PCI_DEVICE_ID_INTEL_BYT_UART1: 129 case PCI_DEVICE_ID_INTEL_BSW_UART1: 130 case PCI_DEVICE_ID_INTEL_BDW_UART1: 131 param->src_id = 3; 132 param->dst_id = 2; 133 break; 134 case PCI_DEVICE_ID_INTEL_BYT_UART2: 135 case PCI_DEVICE_ID_INTEL_BSW_UART2: 136 case PCI_DEVICE_ID_INTEL_BDW_UART2: 137 param->src_id = 5; 138 param->dst_id = 4; 139 break; 140 default: 141 return -EINVAL; 142 } 143 144 param->dma_dev = &dma_dev->dev; 145 param->m_master = 0; 146 param->p_master = 1; 147 148 lpss->dma_maxburst = 16; 149 150 port->set_termios = byt_set_termios; 151 port->get_mctrl = byt_get_mctrl; 152 153 /* Disable TX counter interrupts */ 154 writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT); 155 156 return 0; 157 } 158 159 static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port) 160 { 161 struct uart_8250_dma *dma = &lpss->data.dma; 162 struct uart_8250_port *up = up_to_u8250p(port); 163 164 /* 165 * This simply makes the checks in the 8250_port to try the DMA 166 * channel request which in turn uses the magic of ACPI tables 167 * parsing (see drivers/dma/acpi-dma.c for the details) and 168 * matching with the registered General Purpose DMA controllers. 169 */ 170 up->dma = dma; 171 return 0; 172 } 173 174 #ifdef CONFIG_SERIAL_8250_DMA 175 static const struct dw_dma_platform_data qrk_serial_dma_pdata = { 176 .nr_channels = 2, 177 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 178 .chan_priority = CHAN_PRIORITY_ASCENDING, 179 .block_size = 4095, 180 .nr_masters = 1, 181 .data_width = {4}, 182 .multi_block = {0}, 183 }; 184 185 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) 186 { 187 struct uart_8250_dma *dma = &lpss->data.dma; 188 struct dw_dma_chip *chip = &lpss->dma_chip; 189 struct dw_dma_slave *param = &lpss->dma_param; 190 struct pci_dev *pdev = to_pci_dev(port->dev); 191 int ret; 192 193 chip->pdata = &qrk_serial_dma_pdata; 194 chip->dev = &pdev->dev; 195 chip->id = pdev->devfn; 196 chip->irq = pci_irq_vector(pdev, 0); 197 chip->regs = pci_ioremap_bar(pdev, 1); 198 if (!chip->regs) 199 return; 200 201 /* Falling back to PIO mode if DMA probing fails */ 202 ret = dw_dma_probe(chip); 203 if (ret) 204 return; 205 206 pci_try_set_mwi(pdev); 207 208 /* Special DMA address for UART */ 209 dma->rx_dma_addr = 0xfffff000; 210 dma->tx_dma_addr = 0xfffff000; 211 212 param->dma_dev = &pdev->dev; 213 param->src_id = 0; 214 param->dst_id = 1; 215 param->hs_polarity = true; 216 217 lpss->dma_maxburst = 8; 218 } 219 220 static void qrk_serial_exit_dma(struct lpss8250 *lpss) 221 { 222 struct dw_dma_chip *chip = &lpss->dma_chip; 223 struct dw_dma_slave *param = &lpss->dma_param; 224 225 if (!param->dma_dev) 226 return; 227 228 dw_dma_remove(chip); 229 230 pci_iounmap(to_pci_dev(chip->dev), chip->regs); 231 } 232 #else /* CONFIG_SERIAL_8250_DMA */ 233 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {} 234 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {} 235 #endif /* !CONFIG_SERIAL_8250_DMA */ 236 237 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port) 238 { 239 qrk_serial_setup_dma(lpss, port); 240 return 0; 241 } 242 243 static void qrk_serial_exit(struct lpss8250 *lpss) 244 { 245 qrk_serial_exit_dma(lpss); 246 } 247 248 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param) 249 { 250 struct dw_dma_slave *dws = param; 251 252 if (dws->dma_dev != chan->device->dev) 253 return false; 254 255 chan->private = dws; 256 return true; 257 } 258 259 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port) 260 { 261 struct uart_8250_dma *dma = &lpss->data.dma; 262 struct dw_dma_slave *rx_param, *tx_param; 263 struct device *dev = port->port.dev; 264 265 if (!lpss->dma_param.dma_dev) 266 return 0; 267 268 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); 269 if (!rx_param) 270 return -ENOMEM; 271 272 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); 273 if (!tx_param) 274 return -ENOMEM; 275 276 *rx_param = lpss->dma_param; 277 dma->rxconf.src_maxburst = lpss->dma_maxburst; 278 279 *tx_param = lpss->dma_param; 280 dma->txconf.dst_maxburst = lpss->dma_maxburst; 281 282 dma->fn = lpss8250_dma_filter; 283 dma->rx_param = rx_param; 284 dma->tx_param = tx_param; 285 286 port->dma = dma; 287 return 0; 288 } 289 290 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) 291 { 292 struct uart_8250_port uart; 293 struct lpss8250 *lpss; 294 int ret; 295 296 ret = pcim_enable_device(pdev); 297 if (ret) 298 return ret; 299 300 pci_set_master(pdev); 301 302 lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL); 303 if (!lpss) 304 return -ENOMEM; 305 306 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 307 if (ret < 0) 308 return ret; 309 310 lpss->board = (struct lpss8250_board *)id->driver_data; 311 312 memset(&uart, 0, sizeof(struct uart_8250_port)); 313 314 uart.port.dev = &pdev->dev; 315 uart.port.irq = pci_irq_vector(pdev, 0); 316 uart.port.private_data = &lpss->data; 317 uart.port.type = PORT_16550A; 318 uart.port.iotype = UPIO_MEM; 319 uart.port.regshift = 2; 320 uart.port.uartclk = lpss->board->base_baud * 16; 321 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; 322 uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE; 323 uart.port.mapbase = pci_resource_start(pdev, 0); 324 uart.port.membase = pcim_iomap(pdev, 0, 0); 325 if (!uart.port.membase) 326 return -ENOMEM; 327 328 ret = lpss->board->setup(lpss, &uart.port); 329 if (ret) 330 return ret; 331 332 dw8250_setup_port(&uart.port); 333 334 ret = lpss8250_dma_setup(lpss, &uart); 335 if (ret) 336 goto err_exit; 337 338 ret = serial8250_register_8250_port(&uart); 339 if (ret < 0) 340 goto err_exit; 341 342 lpss->data.line = ret; 343 344 pci_set_drvdata(pdev, lpss); 345 return 0; 346 347 err_exit: 348 if (lpss->board->exit) 349 lpss->board->exit(lpss); 350 pci_free_irq_vectors(pdev); 351 return ret; 352 } 353 354 static void lpss8250_remove(struct pci_dev *pdev) 355 { 356 struct lpss8250 *lpss = pci_get_drvdata(pdev); 357 358 serial8250_unregister_port(lpss->data.line); 359 360 if (lpss->board->exit) 361 lpss->board->exit(lpss); 362 pci_free_irq_vectors(pdev); 363 } 364 365 static const struct lpss8250_board byt_board = { 366 .freq = 100000000, 367 .base_baud = 2764800, 368 .setup = byt_serial_setup, 369 }; 370 371 static const struct lpss8250_board ehl_board = { 372 .freq = 200000000, 373 .base_baud = 12500000, 374 .setup = ehl_serial_setup, 375 }; 376 377 static const struct lpss8250_board qrk_board = { 378 .freq = 44236800, 379 .base_baud = 2764800, 380 .setup = qrk_serial_setup, 381 .exit = qrk_serial_exit, 382 }; 383 384 static const struct pci_device_id pci_ids[] = { 385 { PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) }, 386 { PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) }, 387 { PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) }, 388 { PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) }, 389 { PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) }, 390 { PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) }, 391 { PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) }, 392 { PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) }, 393 { PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) }, 394 { PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) }, 395 { PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) }, 396 { PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) }, 397 { PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) }, 398 { } 399 }; 400 MODULE_DEVICE_TABLE(pci, pci_ids); 401 402 static struct pci_driver lpss8250_pci_driver = { 403 .name = "8250_lpss", 404 .id_table = pci_ids, 405 .probe = lpss8250_probe, 406 .remove = lpss8250_remove, 407 }; 408 409 module_pci_driver(lpss8250_pci_driver); 410 411 MODULE_AUTHOR("Intel Corporation"); 412 MODULE_LICENSE("GPL v2"); 413 MODULE_DESCRIPTION("Intel LPSS UART driver"); 414