1 /* 2 * Probe module for 8250/16550-type Exar chips PCI serial ports. 3 * 4 * Based on drivers/tty/serial/8250/8250_pci.c, 5 * 6 * Copyright (C) 2017 Sudip Mukherjee, All Rights Reserved. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License. 11 */ 12 #include <linux/io.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/pci.h> 16 #include <linux/serial_core.h> 17 #include <linux/serial_reg.h> 18 #include <linux/slab.h> 19 #include <linux/string.h> 20 #include <linux/tty.h> 21 #include <linux/8250_pci.h> 22 23 #include <asm/byteorder.h> 24 25 #include "8250.h" 26 27 #define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002 28 #define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004 29 #define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a 30 #define PCI_DEVICE_ID_COMMTECH_2328PCI335 0x000b 31 #define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020 32 #define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021 33 #define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022 34 #define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358 35 #define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358 36 37 #define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */ 38 39 #define UART_EXAR_FCTR 0x08 /* Feature Control Register */ 40 #define UART_FCTR_EXAR_IRDA 0x10 /* IrDa data encode select */ 41 #define UART_FCTR_EXAR_485 0x20 /* Auto 485 half duplex dir ctl */ 42 #define UART_FCTR_EXAR_TRGA 0x00 /* FIFO trigger table A */ 43 #define UART_FCTR_EXAR_TRGB 0x60 /* FIFO trigger table B */ 44 #define UART_FCTR_EXAR_TRGC 0x80 /* FIFO trigger table C */ 45 #define UART_FCTR_EXAR_TRGD 0xc0 /* FIFO trigger table D programmable */ 46 47 #define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */ 48 #define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */ 49 50 #define UART_EXAR_MPIOINT_7_0 0x8f /* MPIOINT[7:0] */ 51 #define UART_EXAR_MPIOLVL_7_0 0x90 /* MPIOLVL[7:0] */ 52 #define UART_EXAR_MPIO3T_7_0 0x91 /* MPIO3T[7:0] */ 53 #define UART_EXAR_MPIOINV_7_0 0x92 /* MPIOINV[7:0] */ 54 #define UART_EXAR_MPIOSEL_7_0 0x93 /* MPIOSEL[7:0] */ 55 #define UART_EXAR_MPIOOD_7_0 0x94 /* MPIOOD[7:0] */ 56 #define UART_EXAR_MPIOINT_15_8 0x95 /* MPIOINT[15:8] */ 57 #define UART_EXAR_MPIOLVL_15_8 0x96 /* MPIOLVL[15:8] */ 58 #define UART_EXAR_MPIO3T_15_8 0x97 /* MPIO3T[15:8] */ 59 #define UART_EXAR_MPIOINV_15_8 0x98 /* MPIOINV[15:8] */ 60 #define UART_EXAR_MPIOSEL_15_8 0x99 /* MPIOSEL[15:8] */ 61 #define UART_EXAR_MPIOOD_15_8 0x9a /* MPIOOD[15:8] */ 62 63 struct exar8250; 64 65 /** 66 * struct exar8250_board - board information 67 * @num_ports: number of serial ports 68 * @reg_shift: describes UART register mapping in PCI memory 69 */ 70 struct exar8250_board { 71 unsigned int num_ports; 72 unsigned int reg_shift; 73 bool has_slave; 74 int (*setup)(struct exar8250 *, struct pci_dev *, 75 struct uart_8250_port *, int); 76 void (*exit)(struct pci_dev *pcidev); 77 }; 78 79 struct exar8250 { 80 unsigned int nr; 81 struct exar8250_board *board; 82 int line[0]; 83 }; 84 85 static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev, 86 int idx, unsigned int offset, 87 struct uart_8250_port *port) 88 { 89 const struct exar8250_board *board = priv->board; 90 unsigned int bar = 0; 91 92 if (!pcim_iomap_table(pcidev)[bar] && !pcim_iomap(pcidev, bar, 0)) 93 return -ENOMEM; 94 95 port->port.iotype = UPIO_MEM; 96 port->port.mapbase = pci_resource_start(pcidev, bar) + offset; 97 port->port.membase = pcim_iomap_table(pcidev)[bar] + offset; 98 port->port.regshift = board->reg_shift; 99 100 return 0; 101 } 102 103 static int 104 pci_fastcom335_setup(struct exar8250 *priv, struct pci_dev *pcidev, 105 struct uart_8250_port *port, int idx) 106 { 107 unsigned int offset = idx * 0x200; 108 unsigned int baud = 1843200; 109 u8 __iomem *p; 110 int err; 111 112 port->port.flags |= UPF_EXAR_EFR; 113 port->port.uartclk = baud * 16; 114 115 err = default_setup(priv, pcidev, idx, offset, port); 116 if (err) 117 return err; 118 119 p = port->port.membase; 120 121 writeb(0x00, p + UART_EXAR_8XMODE); 122 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); 123 writeb(32, p + UART_EXAR_TXTRG); 124 writeb(32, p + UART_EXAR_RXTRG); 125 126 /* 127 * Setup Multipurpose Input/Output pins. 128 */ 129 if (idx == 0) { 130 switch (pcidev->device) { 131 case PCI_DEVICE_ID_COMMTECH_4222PCI335: 132 case PCI_DEVICE_ID_COMMTECH_4224PCI335: 133 writeb(0x78, p + UART_EXAR_MPIOLVL_7_0); 134 writeb(0x00, p + UART_EXAR_MPIOINV_7_0); 135 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0); 136 break; 137 case PCI_DEVICE_ID_COMMTECH_2324PCI335: 138 case PCI_DEVICE_ID_COMMTECH_2328PCI335: 139 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0); 140 writeb(0xc0, p + UART_EXAR_MPIOINV_7_0); 141 writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0); 142 break; 143 } 144 writeb(0x00, p + UART_EXAR_MPIOINT_7_0); 145 writeb(0x00, p + UART_EXAR_MPIO3T_7_0); 146 writeb(0x00, p + UART_EXAR_MPIOOD_7_0); 147 } 148 149 return 0; 150 } 151 152 static int 153 pci_connect_tech_setup(struct exar8250 *priv, struct pci_dev *pcidev, 154 struct uart_8250_port *port, int idx) 155 { 156 unsigned int offset = idx * 0x200; 157 unsigned int baud = 1843200; 158 159 port->port.uartclk = baud * 16; 160 return default_setup(priv, pcidev, idx, offset, port); 161 } 162 163 static int 164 pci_xr17c154_setup(struct exar8250 *priv, struct pci_dev *pcidev, 165 struct uart_8250_port *port, int idx) 166 { 167 unsigned int offset = idx * 0x200; 168 unsigned int baud = 921600; 169 170 port->port.uartclk = baud * 16; 171 return default_setup(priv, pcidev, idx, offset, port); 172 } 173 174 static void setup_gpio(u8 __iomem *p) 175 { 176 writeb(0x00, p + UART_EXAR_MPIOINT_7_0); 177 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0); 178 writeb(0x00, p + UART_EXAR_MPIO3T_7_0); 179 writeb(0x00, p + UART_EXAR_MPIOINV_7_0); 180 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0); 181 writeb(0x00, p + UART_EXAR_MPIOOD_7_0); 182 writeb(0x00, p + UART_EXAR_MPIOINT_15_8); 183 writeb(0x00, p + UART_EXAR_MPIOLVL_15_8); 184 writeb(0x00, p + UART_EXAR_MPIO3T_15_8); 185 writeb(0x00, p + UART_EXAR_MPIOINV_15_8); 186 writeb(0x00, p + UART_EXAR_MPIOSEL_15_8); 187 writeb(0x00, p + UART_EXAR_MPIOOD_15_8); 188 } 189 190 static void * 191 xr17v35x_register_gpio(struct pci_dev *pcidev) 192 { 193 struct platform_device *pdev; 194 195 pdev = platform_device_alloc("gpio_exar", PLATFORM_DEVID_AUTO); 196 if (!pdev) 197 return NULL; 198 199 platform_set_drvdata(pdev, pcidev); 200 if (platform_device_add(pdev) < 0) { 201 platform_device_put(pdev); 202 return NULL; 203 } 204 205 return pdev; 206 } 207 208 static int 209 pci_xr17v35x_setup(struct exar8250 *priv, struct pci_dev *pcidev, 210 struct uart_8250_port *port, int idx) 211 { 212 const struct exar8250_board *board = priv->board; 213 unsigned int offset = idx * 0x400; 214 unsigned int baud = 7812500; 215 u8 __iomem *p; 216 int ret; 217 218 port->port.uartclk = baud * 16; 219 /* 220 * Setup the uart clock for the devices on expansion slot to 221 * half the clock speed of the main chip (which is 125MHz) 222 */ 223 if (board->has_slave && idx >= 8) 224 port->port.uartclk /= 2; 225 226 ret = default_setup(priv, pcidev, idx, offset, port); 227 if (ret) 228 return ret; 229 230 p = port->port.membase; 231 232 writeb(0x00, p + UART_EXAR_8XMODE); 233 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); 234 writeb(128, p + UART_EXAR_TXTRG); 235 writeb(128, p + UART_EXAR_RXTRG); 236 237 if (idx == 0) { 238 /* Setup Multipurpose Input/Output pins. */ 239 setup_gpio(p); 240 241 port->port.private_data = xr17v35x_register_gpio(pcidev); 242 } 243 244 return 0; 245 } 246 247 static void pci_xr17v35x_exit(struct pci_dev *pcidev) 248 { 249 struct exar8250 *priv = pci_get_drvdata(pcidev); 250 struct uart_8250_port *port = serial8250_get_port(priv->line[0]); 251 struct platform_device *pdev = port->port.private_data; 252 253 platform_device_unregister(pdev); 254 port->port.private_data = NULL; 255 } 256 257 static int 258 exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent) 259 { 260 unsigned int nr_ports, i, bar = 0, maxnr; 261 struct exar8250_board *board; 262 struct uart_8250_port uart; 263 struct exar8250 *priv; 264 int rc; 265 266 board = (struct exar8250_board *)ent->driver_data; 267 if (!board) 268 return -EINVAL; 269 270 rc = pcim_enable_device(pcidev); 271 if (rc) 272 return rc; 273 274 maxnr = pci_resource_len(pcidev, bar) >> (board->reg_shift + 3); 275 276 nr_ports = board->num_ports ? board->num_ports : pcidev->device & 0x0f; 277 278 priv = devm_kzalloc(&pcidev->dev, sizeof(*priv) + 279 sizeof(unsigned int) * nr_ports, 280 GFP_KERNEL); 281 if (!priv) 282 return -ENOMEM; 283 284 priv->board = board; 285 286 pci_set_master(pcidev); 287 288 rc = pci_alloc_irq_vectors(pcidev, 1, 1, PCI_IRQ_ALL_TYPES); 289 if (rc < 0) 290 return rc; 291 292 memset(&uart, 0, sizeof(uart)); 293 uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ 294 | UPF_EXAR_EFR; 295 uart.port.irq = pci_irq_vector(pcidev, 0); 296 uart.port.dev = &pcidev->dev; 297 298 for (i = 0; i < nr_ports && i < maxnr; i++) { 299 rc = board->setup(priv, pcidev, &uart, i); 300 if (rc) { 301 dev_err(&pcidev->dev, "Failed to setup port %u\n", i); 302 break; 303 } 304 305 dev_dbg(&pcidev->dev, "Setup PCI port: port %lx, irq %d, type %d\n", 306 uart.port.iobase, uart.port.irq, uart.port.iotype); 307 308 priv->line[i] = serial8250_register_8250_port(&uart); 309 if (priv->line[i] < 0) { 310 dev_err(&pcidev->dev, 311 "Couldn't register serial port %lx, irq %d, type %d, error %d\n", 312 uart.port.iobase, uart.port.irq, 313 uart.port.iotype, priv->line[i]); 314 break; 315 } 316 } 317 priv->nr = i; 318 pci_set_drvdata(pcidev, priv); 319 return 0; 320 } 321 322 static void exar_pci_remove(struct pci_dev *pcidev) 323 { 324 struct exar8250 *priv = pci_get_drvdata(pcidev); 325 unsigned int i; 326 327 for (i = 0; i < priv->nr; i++) 328 serial8250_unregister_port(priv->line[i]); 329 330 if (priv->board->exit) 331 priv->board->exit(pcidev); 332 } 333 334 static int __maybe_unused exar_suspend(struct device *dev) 335 { 336 struct pci_dev *pcidev = to_pci_dev(dev); 337 struct exar8250 *priv = pci_get_drvdata(pcidev); 338 unsigned int i; 339 340 for (i = 0; i < priv->nr; i++) 341 if (priv->line[i] >= 0) 342 serial8250_suspend_port(priv->line[i]); 343 344 /* Ensure that every init quirk is properly torn down */ 345 if (priv->board->exit) 346 priv->board->exit(pcidev); 347 348 return 0; 349 } 350 351 static int __maybe_unused exar_resume(struct device *dev) 352 { 353 struct pci_dev *pcidev = to_pci_dev(dev); 354 struct exar8250 *priv = pci_get_drvdata(pcidev); 355 unsigned int i; 356 357 for (i = 0; i < priv->nr; i++) 358 if (priv->line[i] >= 0) 359 serial8250_resume_port(priv->line[i]); 360 361 return 0; 362 } 363 364 static SIMPLE_DEV_PM_OPS(exar_pci_pm, exar_suspend, exar_resume); 365 366 static const struct exar8250_board pbn_fastcom335_2 = { 367 .num_ports = 2, 368 .setup = pci_fastcom335_setup, 369 }; 370 371 static const struct exar8250_board pbn_fastcom335_4 = { 372 .num_ports = 4, 373 .setup = pci_fastcom335_setup, 374 }; 375 376 static const struct exar8250_board pbn_fastcom335_8 = { 377 .num_ports = 8, 378 .setup = pci_fastcom335_setup, 379 }; 380 381 static const struct exar8250_board pbn_connect = { 382 .setup = pci_connect_tech_setup, 383 }; 384 385 static const struct exar8250_board pbn_exar_ibm_saturn = { 386 .num_ports = 1, 387 .setup = pci_xr17c154_setup, 388 }; 389 390 static const struct exar8250_board pbn_exar_XR17C15x = { 391 .setup = pci_xr17c154_setup, 392 }; 393 394 static const struct exar8250_board pbn_exar_XR17V35x = { 395 .setup = pci_xr17v35x_setup, 396 .exit = pci_xr17v35x_exit, 397 }; 398 399 static const struct exar8250_board pbn_exar_XR17V4358 = { 400 .num_ports = 12, 401 .has_slave = true, 402 .setup = pci_xr17v35x_setup, 403 .exit = pci_xr17v35x_exit, 404 }; 405 406 static const struct exar8250_board pbn_exar_XR17V8358 = { 407 .num_ports = 16, 408 .has_slave = true, 409 .setup = pci_xr17v35x_setup, 410 .exit = pci_xr17v35x_exit, 411 }; 412 413 #define CONNECT_DEVICE(devid, sdevid, bd) { \ 414 PCI_DEVICE_SUB( \ 415 PCI_VENDOR_ID_EXAR, \ 416 PCI_DEVICE_ID_EXAR_##devid, \ 417 PCI_SUBVENDOR_ID_CONNECT_TECH, \ 418 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_##sdevid), 0, 0, \ 419 (kernel_ulong_t)&bd \ 420 } 421 422 #define EXAR_DEVICE(vend, devid, bd) { \ 423 PCI_VDEVICE(vend, PCI_DEVICE_ID_##devid), (kernel_ulong_t)&bd \ 424 } 425 426 #define IBM_DEVICE(devid, sdevid, bd) { \ 427 PCI_DEVICE_SUB( \ 428 PCI_VENDOR_ID_EXAR, \ 429 PCI_DEVICE_ID_EXAR_##devid, \ 430 PCI_VENDOR_ID_IBM, \ 431 PCI_SUBDEVICE_ID_IBM_##sdevid), 0, 0, \ 432 (kernel_ulong_t)&bd \ 433 } 434 435 static struct pci_device_id exar_pci_tbl[] = { 436 CONNECT_DEVICE(XR17C152, UART_2_232, pbn_connect), 437 CONNECT_DEVICE(XR17C154, UART_4_232, pbn_connect), 438 CONNECT_DEVICE(XR17C158, UART_8_232, pbn_connect), 439 CONNECT_DEVICE(XR17C152, UART_1_1, pbn_connect), 440 CONNECT_DEVICE(XR17C154, UART_2_2, pbn_connect), 441 CONNECT_DEVICE(XR17C158, UART_4_4, pbn_connect), 442 CONNECT_DEVICE(XR17C152, UART_2, pbn_connect), 443 CONNECT_DEVICE(XR17C154, UART_4, pbn_connect), 444 CONNECT_DEVICE(XR17C158, UART_8, pbn_connect), 445 CONNECT_DEVICE(XR17C152, UART_2_485, pbn_connect), 446 CONNECT_DEVICE(XR17C154, UART_4_485, pbn_connect), 447 CONNECT_DEVICE(XR17C158, UART_8_485, pbn_connect), 448 449 IBM_DEVICE(XR17C152, SATURN_SERIAL_ONE_PORT, pbn_exar_ibm_saturn), 450 451 /* Exar Corp. XR17C15[248] Dual/Quad/Octal UART */ 452 EXAR_DEVICE(EXAR, EXAR_XR17C152, pbn_exar_XR17C15x), 453 EXAR_DEVICE(EXAR, EXAR_XR17C154, pbn_exar_XR17C15x), 454 EXAR_DEVICE(EXAR, EXAR_XR17C158, pbn_exar_XR17C15x), 455 456 /* Exar Corp. XR17V[48]35[248] Dual/Quad/Octal/Hexa PCIe UARTs */ 457 EXAR_DEVICE(EXAR, EXAR_XR17V352, pbn_exar_XR17V35x), 458 EXAR_DEVICE(EXAR, EXAR_XR17V354, pbn_exar_XR17V35x), 459 EXAR_DEVICE(EXAR, EXAR_XR17V358, pbn_exar_XR17V35x), 460 EXAR_DEVICE(EXAR, EXAR_XR17V4358, pbn_exar_XR17V4358), 461 EXAR_DEVICE(EXAR, EXAR_XR17V8358, pbn_exar_XR17V8358), 462 EXAR_DEVICE(COMMTECH, COMMTECH_4222PCIE, pbn_exar_XR17V35x), 463 EXAR_DEVICE(COMMTECH, COMMTECH_4224PCIE, pbn_exar_XR17V35x), 464 EXAR_DEVICE(COMMTECH, COMMTECH_4228PCIE, pbn_exar_XR17V35x), 465 466 EXAR_DEVICE(COMMTECH, COMMTECH_4222PCI335, pbn_fastcom335_2), 467 EXAR_DEVICE(COMMTECH, COMMTECH_4224PCI335, pbn_fastcom335_4), 468 EXAR_DEVICE(COMMTECH, COMMTECH_2324PCI335, pbn_fastcom335_4), 469 EXAR_DEVICE(COMMTECH, COMMTECH_2328PCI335, pbn_fastcom335_8), 470 { 0, } 471 }; 472 MODULE_DEVICE_TABLE(pci, exar_pci_tbl); 473 474 static struct pci_driver exar_pci_driver = { 475 .name = "exar_serial", 476 .probe = exar_pci_probe, 477 .remove = exar_pci_remove, 478 .driver = { 479 .pm = &exar_pci_pm, 480 }, 481 .id_table = exar_pci_tbl, 482 }; 483 module_pci_driver(exar_pci_driver); 484 485 MODULE_LICENSE("GPL"); 486 MODULE_DESCRIPTION("Exar Serial Dricer"); 487 MODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>"); 488