1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Early serial console for 8250/16550 devices
4  *
5  * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
6  *	Bjorn Helgaas <bjorn.helgaas@hp.com>
7  *
8  * Based on the 8250.c serial driver, Copyright (C) 2001 Russell King,
9  * and on early_printk.c by Andi Kleen.
10  *
11  * This is for use before the serial driver has initialized, in
12  * particular, before the UARTs have been discovered and named.
13  * Instead of specifying the console device as, e.g., "ttyS0",
14  * we locate the device directly by its MMIO or I/O port address.
15  *
16  * The user can specify the device directly, e.g.,
17  *	earlycon=uart8250,io,0x3f8,9600n8
18  *	earlycon=uart8250,mmio,0xff5e0000,115200n8
19  *	earlycon=uart8250,mmio32,0xff5e0000,115200n8
20  * or
21  *	console=uart8250,io,0x3f8,9600n8
22  *	console=uart8250,mmio,0xff5e0000,115200n8
23  *	console=uart8250,mmio32,0xff5e0000,115200n8
24  */
25 
26 #include <linux/tty.h>
27 #include <linux/init.h>
28 #include <linux/console.h>
29 #include <linux/of.h>
30 #include <linux/of_device.h>
31 #include <linux/serial_reg.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <asm/io.h>
35 #include <asm/serial.h>
36 
37 static unsigned int serial8250_early_in(struct uart_port *port, int offset)
38 {
39 	int reg_offset = offset;
40 	offset <<= port->regshift;
41 
42 	switch (port->iotype) {
43 	case UPIO_MEM:
44 		return readb(port->membase + offset);
45 	case UPIO_MEM16:
46 		return readw(port->membase + offset);
47 	case UPIO_MEM32:
48 		return readl(port->membase + offset);
49 	case UPIO_MEM32BE:
50 		return ioread32be(port->membase + offset);
51 	case UPIO_PORT:
52 		return inb(port->iobase + offset);
53 	case UPIO_AU:
54 		return port->serial_in(port, reg_offset);
55 	default:
56 		return 0;
57 	}
58 }
59 
60 static void serial8250_early_out(struct uart_port *port, int offset, int value)
61 {
62 	int reg_offset = offset;
63 	offset <<= port->regshift;
64 
65 	switch (port->iotype) {
66 	case UPIO_MEM:
67 		writeb(value, port->membase + offset);
68 		break;
69 	case UPIO_MEM16:
70 		writew(value, port->membase + offset);
71 		break;
72 	case UPIO_MEM32:
73 		writel(value, port->membase + offset);
74 		break;
75 	case UPIO_MEM32BE:
76 		iowrite32be(value, port->membase + offset);
77 		break;
78 	case UPIO_PORT:
79 		outb(value, port->iobase + offset);
80 		break;
81 	case UPIO_AU:
82 		port->serial_out(port, reg_offset, value);
83 		break;
84 	}
85 }
86 
87 static void serial_putc(struct uart_port *port, unsigned char c)
88 {
89 	unsigned int status;
90 
91 	serial8250_early_out(port, UART_TX, c);
92 
93 	for (;;) {
94 		status = serial8250_early_in(port, UART_LSR);
95 		if (uart_lsr_tx_empty(status))
96 			break;
97 		cpu_relax();
98 	}
99 }
100 
101 static void early_serial8250_write(struct console *console,
102 					const char *s, unsigned int count)
103 {
104 	struct earlycon_device *device = console->data;
105 	struct uart_port *port = &device->port;
106 
107 	uart_console_write(port, s, count, serial_putc);
108 }
109 
110 #ifdef CONFIG_CONSOLE_POLL
111 static int early_serial8250_read(struct console *console,
112 				 char *s, unsigned int count)
113 {
114 	struct earlycon_device *device = console->data;
115 	struct uart_port *port = &device->port;
116 	unsigned int status;
117 	int num_read = 0;
118 
119 	while (num_read < count) {
120 		status = serial8250_early_in(port, UART_LSR);
121 		if (!(status & UART_LSR_DR))
122 			break;
123 		s[num_read++] = serial8250_early_in(port, UART_RX);
124 	}
125 
126 	return num_read;
127 }
128 #else
129 #define early_serial8250_read NULL
130 #endif
131 
132 static void __init init_port(struct earlycon_device *device)
133 {
134 	struct uart_port *port = &device->port;
135 	unsigned int divisor;
136 	unsigned char c;
137 	unsigned int ier;
138 
139 	serial8250_early_out(port, UART_LCR, 0x3);	/* 8n1 */
140 	ier = serial8250_early_in(port, UART_IER);
141 	serial8250_early_out(port, UART_IER, ier & UART_IER_UUE); /* no interrupt */
142 	serial8250_early_out(port, UART_FCR, 0);	/* no fifo */
143 	serial8250_early_out(port, UART_MCR, 0x3);	/* DTR + RTS */
144 
145 	if (port->uartclk) {
146 		divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * device->baud);
147 		c = serial8250_early_in(port, UART_LCR);
148 		serial8250_early_out(port, UART_LCR, c | UART_LCR_DLAB);
149 		serial8250_early_out(port, UART_DLL, divisor & 0xff);
150 		serial8250_early_out(port, UART_DLM, (divisor >> 8) & 0xff);
151 		serial8250_early_out(port, UART_LCR, c & ~UART_LCR_DLAB);
152 	}
153 }
154 
155 int __init early_serial8250_setup(struct earlycon_device *device,
156 					 const char *options)
157 {
158 	if (!(device->port.membase || device->port.iobase))
159 		return -ENODEV;
160 
161 	if (!device->baud) {
162 		struct uart_port *port = &device->port;
163 		unsigned int ier;
164 
165 		/* assume the device was initialized, only mask interrupts */
166 		ier = serial8250_early_in(port, UART_IER);
167 		serial8250_early_out(port, UART_IER, ier & UART_IER_UUE);
168 	} else
169 		init_port(device);
170 
171 	device->con->write = early_serial8250_write;
172 	device->con->read = early_serial8250_read;
173 	return 0;
174 }
175 EARLYCON_DECLARE(uart8250, early_serial8250_setup);
176 EARLYCON_DECLARE(uart, early_serial8250_setup);
177 OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
178 OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
179 OF_EARLYCON_DECLARE(uart, "nvidia,tegra20-uart", early_serial8250_setup);
180 OF_EARLYCON_DECLARE(uart, "snps,dw-apb-uart", early_serial8250_setup);
181 
182 #ifdef CONFIG_SERIAL_8250_OMAP
183 
184 static int __init early_omap8250_setup(struct earlycon_device *device,
185 				       const char *options)
186 {
187 	struct uart_port *port = &device->port;
188 
189 	if (!(device->port.membase || device->port.iobase))
190 		return -ENODEV;
191 
192 	port->regshift = 2;
193 	device->con->write = early_serial8250_write;
194 	return 0;
195 }
196 
197 OF_EARLYCON_DECLARE(omap8250, "ti,omap2-uart", early_omap8250_setup);
198 OF_EARLYCON_DECLARE(omap8250, "ti,omap3-uart", early_omap8250_setup);
199 OF_EARLYCON_DECLARE(omap8250, "ti,omap4-uart", early_omap8250_setup);
200 
201 #endif
202 
203 #ifdef CONFIG_SERIAL_8250_RT288X
204 
205 static int __init early_au_setup(struct earlycon_device *dev, const char *opt)
206 {
207 	dev->port.serial_in = au_serial_in;
208 	dev->port.serial_out = au_serial_out;
209 	dev->port.iotype = UPIO_AU;
210 	dev->con->write = early_serial8250_write;
211 	return 0;
212 }
213 OF_EARLYCON_DECLARE(palmchip, "ralink,rt2880-uart", early_au_setup);
214 
215 #endif
216