1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * 8250_dma.c - DMA Engine API support for 8250.c 4 * 5 * Copyright (C) 2013 Intel Corporation 6 */ 7 #include <linux/tty.h> 8 #include <linux/tty_flip.h> 9 #include <linux/serial_reg.h> 10 #include <linux/dma-mapping.h> 11 12 #include "8250.h" 13 14 static void __dma_tx_complete(void *param) 15 { 16 struct uart_8250_port *p = param; 17 struct uart_8250_dma *dma = p->dma; 18 struct circ_buf *xmit = &p->port.state->xmit; 19 unsigned long flags; 20 int ret; 21 22 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 23 UART_XMIT_SIZE, DMA_TO_DEVICE); 24 25 spin_lock_irqsave(&p->port.lock, flags); 26 27 dma->tx_running = 0; 28 29 xmit->tail += dma->tx_size; 30 xmit->tail &= UART_XMIT_SIZE - 1; 31 p->port.icount.tx += dma->tx_size; 32 33 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 34 uart_write_wakeup(&p->port); 35 36 ret = serial8250_tx_dma(p); 37 if (ret || !dma->tx_running) 38 serial8250_set_THRI(p); 39 40 spin_unlock_irqrestore(&p->port.lock, flags); 41 } 42 43 static void __dma_rx_complete(void *param) 44 { 45 struct uart_8250_port *p = param; 46 struct uart_8250_dma *dma = p->dma; 47 struct tty_port *tty_port = &p->port.state->port; 48 struct dma_tx_state state; 49 int count; 50 51 dma->rx_running = 0; 52 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 53 54 count = dma->rx_size - state.residue; 55 56 tty_insert_flip_string(tty_port, dma->rx_buf, count); 57 p->port.icount.rx += count; 58 59 tty_flip_buffer_push(tty_port); 60 } 61 62 int serial8250_tx_dma(struct uart_8250_port *p) 63 { 64 struct uart_8250_dma *dma = p->dma; 65 struct circ_buf *xmit = &p->port.state->xmit; 66 struct dma_async_tx_descriptor *desc; 67 struct uart_port *up = &p->port; 68 int ret; 69 70 if (dma->tx_running) { 71 if (up->x_char) { 72 dmaengine_pause(dma->txchan); 73 uart_xchar_out(up, UART_TX); 74 dmaengine_resume(dma->txchan); 75 } 76 return 0; 77 } else if (up->x_char) { 78 uart_xchar_out(up, UART_TX); 79 } 80 81 if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) { 82 /* We have been called from __dma_tx_complete() */ 83 return 0; 84 } 85 86 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 87 88 serial8250_do_prepare_tx_dma(p); 89 90 desc = dmaengine_prep_slave_single(dma->txchan, 91 dma->tx_addr + xmit->tail, 92 dma->tx_size, DMA_MEM_TO_DEV, 93 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 94 if (!desc) { 95 ret = -EBUSY; 96 goto err; 97 } 98 99 dma->tx_running = 1; 100 desc->callback = __dma_tx_complete; 101 desc->callback_param = p; 102 103 dma->tx_cookie = dmaengine_submit(desc); 104 105 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 106 UART_XMIT_SIZE, DMA_TO_DEVICE); 107 108 dma_async_issue_pending(dma->txchan); 109 if (dma->tx_err) { 110 dma->tx_err = 0; 111 serial8250_clear_THRI(p); 112 } 113 return 0; 114 err: 115 dma->tx_err = 1; 116 return ret; 117 } 118 119 int serial8250_rx_dma(struct uart_8250_port *p) 120 { 121 struct uart_8250_dma *dma = p->dma; 122 struct dma_async_tx_descriptor *desc; 123 124 if (dma->rx_running) 125 return 0; 126 127 serial8250_do_prepare_rx_dma(p); 128 129 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 130 dma->rx_size, DMA_DEV_TO_MEM, 131 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 132 if (!desc) 133 return -EBUSY; 134 135 dma->rx_running = 1; 136 desc->callback = __dma_rx_complete; 137 desc->callback_param = p; 138 139 dma->rx_cookie = dmaengine_submit(desc); 140 141 dma_async_issue_pending(dma->rxchan); 142 143 return 0; 144 } 145 146 void serial8250_rx_dma_flush(struct uart_8250_port *p) 147 { 148 struct uart_8250_dma *dma = p->dma; 149 150 if (dma->rx_running) { 151 dmaengine_pause(dma->rxchan); 152 __dma_rx_complete(p); 153 dmaengine_terminate_async(dma->rxchan); 154 } 155 } 156 EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush); 157 158 int serial8250_request_dma(struct uart_8250_port *p) 159 { 160 struct uart_8250_dma *dma = p->dma; 161 phys_addr_t rx_dma_addr = dma->rx_dma_addr ? 162 dma->rx_dma_addr : p->port.mapbase; 163 phys_addr_t tx_dma_addr = dma->tx_dma_addr ? 164 dma->tx_dma_addr : p->port.mapbase; 165 dma_cap_mask_t mask; 166 struct dma_slave_caps caps; 167 int ret; 168 169 /* Default slave configuration parameters */ 170 dma->rxconf.direction = DMA_DEV_TO_MEM; 171 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 172 dma->rxconf.src_addr = rx_dma_addr + UART_RX; 173 174 dma->txconf.direction = DMA_MEM_TO_DEV; 175 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 176 dma->txconf.dst_addr = tx_dma_addr + UART_TX; 177 178 dma_cap_zero(mask); 179 dma_cap_set(DMA_SLAVE, mask); 180 181 /* Get a channel for RX */ 182 dma->rxchan = dma_request_slave_channel_compat(mask, 183 dma->fn, dma->rx_param, 184 p->port.dev, "rx"); 185 if (!dma->rxchan) 186 return -ENODEV; 187 188 /* 8250 rx dma requires dmaengine driver to support pause/terminate */ 189 ret = dma_get_slave_caps(dma->rxchan, &caps); 190 if (ret) 191 goto release_rx; 192 if (!caps.cmd_pause || !caps.cmd_terminate || 193 caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) { 194 ret = -EINVAL; 195 goto release_rx; 196 } 197 198 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 199 200 /* Get a channel for TX */ 201 dma->txchan = dma_request_slave_channel_compat(mask, 202 dma->fn, dma->tx_param, 203 p->port.dev, "tx"); 204 if (!dma->txchan) { 205 ret = -ENODEV; 206 goto release_rx; 207 } 208 209 /* 8250 tx dma requires dmaengine driver to support terminate */ 210 ret = dma_get_slave_caps(dma->txchan, &caps); 211 if (ret) 212 goto err; 213 if (!caps.cmd_terminate) { 214 ret = -EINVAL; 215 goto err; 216 } 217 218 dmaengine_slave_config(dma->txchan, &dma->txconf); 219 220 /* RX buffer */ 221 if (!dma->rx_size) 222 dma->rx_size = PAGE_SIZE; 223 224 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 225 &dma->rx_addr, GFP_KERNEL); 226 if (!dma->rx_buf) { 227 ret = -ENOMEM; 228 goto err; 229 } 230 231 /* TX buffer */ 232 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 233 p->port.state->xmit.buf, 234 UART_XMIT_SIZE, 235 DMA_TO_DEVICE); 236 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 237 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 238 dma->rx_buf, dma->rx_addr); 239 ret = -ENOMEM; 240 goto err; 241 } 242 243 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 244 245 return 0; 246 err: 247 dma_release_channel(dma->txchan); 248 release_rx: 249 dma_release_channel(dma->rxchan); 250 return ret; 251 } 252 EXPORT_SYMBOL_GPL(serial8250_request_dma); 253 254 void serial8250_release_dma(struct uart_8250_port *p) 255 { 256 struct uart_8250_dma *dma = p->dma; 257 258 if (!dma) 259 return; 260 261 /* Release RX resources */ 262 dmaengine_terminate_sync(dma->rxchan); 263 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 264 dma->rx_addr); 265 dma_release_channel(dma->rxchan); 266 dma->rxchan = NULL; 267 268 /* Release TX resources */ 269 dmaengine_terminate_sync(dma->txchan); 270 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 271 UART_XMIT_SIZE, DMA_TO_DEVICE); 272 dma_release_channel(dma->txchan); 273 dma->txchan = NULL; 274 dma->tx_running = 0; 275 276 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 277 } 278 EXPORT_SYMBOL_GPL(serial8250_release_dma); 279