1 /* 2 * 8250_dma.c - DMA Engine API support for 8250.c 3 * 4 * Copyright (C) 2013 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 #include <linux/tty.h> 12 #include <linux/tty_flip.h> 13 #include <linux/serial_reg.h> 14 #include <linux/dma-mapping.h> 15 16 #include "8250.h" 17 18 static void __dma_tx_complete(void *param) 19 { 20 struct uart_8250_port *p = param; 21 struct uart_8250_dma *dma = p->dma; 22 struct circ_buf *xmit = &p->port.state->xmit; 23 unsigned long flags; 24 int ret; 25 26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 27 UART_XMIT_SIZE, DMA_TO_DEVICE); 28 29 spin_lock_irqsave(&p->port.lock, flags); 30 31 dma->tx_running = 0; 32 33 xmit->tail += dma->tx_size; 34 xmit->tail &= UART_XMIT_SIZE - 1; 35 p->port.icount.tx += dma->tx_size; 36 37 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 38 uart_write_wakeup(&p->port); 39 40 ret = serial8250_tx_dma(p); 41 if (ret) { 42 p->ier |= UART_IER_THRI; 43 serial_port_out(&p->port, UART_IER, p->ier); 44 } 45 46 spin_unlock_irqrestore(&p->port.lock, flags); 47 } 48 49 static void __dma_rx_complete(void *param) 50 { 51 struct uart_8250_port *p = param; 52 struct uart_8250_dma *dma = p->dma; 53 struct tty_port *tty_port = &p->port.state->port; 54 struct dma_tx_state state; 55 int count; 56 57 dma->rx_running = 0; 58 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 59 60 count = dma->rx_size - state.residue; 61 62 tty_insert_flip_string(tty_port, dma->rx_buf, count); 63 p->port.icount.rx += count; 64 65 tty_flip_buffer_push(tty_port); 66 } 67 68 int serial8250_tx_dma(struct uart_8250_port *p) 69 { 70 struct uart_8250_dma *dma = p->dma; 71 struct circ_buf *xmit = &p->port.state->xmit; 72 struct dma_async_tx_descriptor *desc; 73 int ret; 74 75 if (uart_tx_stopped(&p->port) || dma->tx_running || 76 uart_circ_empty(xmit)) 77 return 0; 78 79 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 80 81 desc = dmaengine_prep_slave_single(dma->txchan, 82 dma->tx_addr + xmit->tail, 83 dma->tx_size, DMA_MEM_TO_DEV, 84 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 85 if (!desc) { 86 ret = -EBUSY; 87 goto err; 88 } 89 90 dma->tx_running = 1; 91 desc->callback = __dma_tx_complete; 92 desc->callback_param = p; 93 94 dma->tx_cookie = dmaengine_submit(desc); 95 96 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 97 UART_XMIT_SIZE, DMA_TO_DEVICE); 98 99 dma_async_issue_pending(dma->txchan); 100 if (dma->tx_err) { 101 dma->tx_err = 0; 102 if (p->ier & UART_IER_THRI) { 103 p->ier &= ~UART_IER_THRI; 104 serial_out(p, UART_IER, p->ier); 105 } 106 } 107 return 0; 108 err: 109 dma->tx_err = 1; 110 return ret; 111 } 112 113 int serial8250_rx_dma(struct uart_8250_port *p) 114 { 115 struct uart_8250_dma *dma = p->dma; 116 struct dma_async_tx_descriptor *desc; 117 118 if (dma->rx_running) 119 return 0; 120 121 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 122 dma->rx_size, DMA_DEV_TO_MEM, 123 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 124 if (!desc) 125 return -EBUSY; 126 127 dma->rx_running = 1; 128 desc->callback = __dma_rx_complete; 129 desc->callback_param = p; 130 131 dma->rx_cookie = dmaengine_submit(desc); 132 133 dma_async_issue_pending(dma->rxchan); 134 135 return 0; 136 } 137 138 void serial8250_rx_dma_flush(struct uart_8250_port *p) 139 { 140 struct uart_8250_dma *dma = p->dma; 141 142 if (dma->rx_running) { 143 dmaengine_pause(dma->rxchan); 144 __dma_rx_complete(p); 145 dmaengine_terminate_all(dma->rxchan); 146 } 147 } 148 EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush); 149 150 int serial8250_request_dma(struct uart_8250_port *p) 151 { 152 struct uart_8250_dma *dma = p->dma; 153 dma_cap_mask_t mask; 154 struct dma_slave_caps caps; 155 int ret; 156 157 /* Default slave configuration parameters */ 158 dma->rxconf.direction = DMA_DEV_TO_MEM; 159 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 160 dma->rxconf.src_addr = p->port.mapbase + UART_RX; 161 162 dma->txconf.direction = DMA_MEM_TO_DEV; 163 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 164 dma->txconf.dst_addr = p->port.mapbase + UART_TX; 165 166 dma_cap_zero(mask); 167 dma_cap_set(DMA_SLAVE, mask); 168 169 /* Get a channel for RX */ 170 dma->rxchan = dma_request_slave_channel_compat(mask, 171 dma->fn, dma->rx_param, 172 p->port.dev, "rx"); 173 if (!dma->rxchan) 174 return -ENODEV; 175 176 /* 8250 rx dma requires dmaengine driver to support pause/terminate */ 177 ret = dma_get_slave_caps(dma->rxchan, &caps); 178 if (ret) 179 goto release_rx; 180 if (!caps.cmd_pause || !caps.cmd_terminate || 181 caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) { 182 ret = -EINVAL; 183 goto release_rx; 184 } 185 186 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 187 188 /* Get a channel for TX */ 189 dma->txchan = dma_request_slave_channel_compat(mask, 190 dma->fn, dma->tx_param, 191 p->port.dev, "tx"); 192 if (!dma->txchan) { 193 ret = -ENODEV; 194 goto release_rx; 195 } 196 197 /* 8250 tx dma requires dmaengine driver to support terminate */ 198 ret = dma_get_slave_caps(dma->txchan, &caps); 199 if (ret) 200 goto err; 201 if (!caps.cmd_terminate) { 202 ret = -EINVAL; 203 goto err; 204 } 205 206 dmaengine_slave_config(dma->txchan, &dma->txconf); 207 208 /* RX buffer */ 209 if (!dma->rx_size) 210 dma->rx_size = PAGE_SIZE; 211 212 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 213 &dma->rx_addr, GFP_KERNEL); 214 if (!dma->rx_buf) { 215 ret = -ENOMEM; 216 goto err; 217 } 218 219 /* TX buffer */ 220 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 221 p->port.state->xmit.buf, 222 UART_XMIT_SIZE, 223 DMA_TO_DEVICE); 224 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 225 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 226 dma->rx_buf, dma->rx_addr); 227 ret = -ENOMEM; 228 goto err; 229 } 230 231 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 232 233 return 0; 234 err: 235 dma_release_channel(dma->txchan); 236 release_rx: 237 dma_release_channel(dma->rxchan); 238 return ret; 239 } 240 EXPORT_SYMBOL_GPL(serial8250_request_dma); 241 242 void serial8250_release_dma(struct uart_8250_port *p) 243 { 244 struct uart_8250_dma *dma = p->dma; 245 246 if (!dma) 247 return; 248 249 /* Release RX resources */ 250 dmaengine_terminate_all(dma->rxchan); 251 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 252 dma->rx_addr); 253 dma_release_channel(dma->rxchan); 254 dma->rxchan = NULL; 255 256 /* Release TX resources */ 257 dmaengine_terminate_all(dma->txchan); 258 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 259 UART_XMIT_SIZE, DMA_TO_DEVICE); 260 dma_release_channel(dma->txchan); 261 dma->txchan = NULL; 262 dma->tx_running = 0; 263 264 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 265 } 266 EXPORT_SYMBOL_GPL(serial8250_release_dma); 267