1 /* 2 * 8250_dma.c - DMA Engine API support for 8250.c 3 * 4 * Copyright (C) 2013 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 #include <linux/tty.h> 12 #include <linux/tty_flip.h> 13 #include <linux/serial_reg.h> 14 #include <linux/dma-mapping.h> 15 16 #include "8250.h" 17 18 static void __dma_tx_complete(void *param) 19 { 20 struct uart_8250_port *p = param; 21 struct uart_8250_dma *dma = p->dma; 22 struct circ_buf *xmit = &p->port.state->xmit; 23 24 dma->tx_running = 0; 25 26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 27 UART_XMIT_SIZE, DMA_TO_DEVICE); 28 29 xmit->tail += dma->tx_size; 30 xmit->tail &= UART_XMIT_SIZE - 1; 31 p->port.icount.tx += dma->tx_size; 32 33 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 34 uart_write_wakeup(&p->port); 35 36 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) { 37 serial8250_tx_dma(p); 38 uart_write_wakeup(&p->port); 39 } 40 } 41 42 static void __dma_rx_complete(void *param) 43 { 44 struct uart_8250_port *p = param; 45 struct uart_8250_dma *dma = p->dma; 46 struct tty_port *tty_port = &p->port.state->port; 47 struct dma_tx_state state; 48 int count; 49 50 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, 51 dma->rx_size, DMA_FROM_DEVICE); 52 53 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 54 dmaengine_terminate_all(dma->rxchan); 55 56 count = dma->rx_size - state.residue; 57 58 tty_insert_flip_string(tty_port, dma->rx_buf, count); 59 p->port.icount.rx += count; 60 61 tty_flip_buffer_push(tty_port); 62 } 63 64 int serial8250_tx_dma(struct uart_8250_port *p) 65 { 66 struct uart_8250_dma *dma = p->dma; 67 struct circ_buf *xmit = &p->port.state->xmit; 68 struct dma_async_tx_descriptor *desc; 69 70 if (dma->tx_running) 71 return -EBUSY; 72 73 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 74 if (!dma->tx_size) 75 return -EINVAL; 76 77 desc = dmaengine_prep_slave_single(dma->txchan, 78 dma->tx_addr + xmit->tail, 79 dma->tx_size, DMA_MEM_TO_DEV, 80 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 81 if (!desc) 82 return -EBUSY; 83 84 dma->tx_running = 1; 85 86 desc->callback = __dma_tx_complete; 87 desc->callback_param = p; 88 89 dma->tx_cookie = dmaengine_submit(desc); 90 91 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 92 UART_XMIT_SIZE, DMA_TO_DEVICE); 93 94 dma_async_issue_pending(dma->txchan); 95 96 return 0; 97 } 98 EXPORT_SYMBOL_GPL(serial8250_tx_dma); 99 100 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 101 { 102 struct uart_8250_dma *dma = p->dma; 103 struct dma_async_tx_descriptor *desc; 104 struct dma_tx_state state; 105 int dma_status; 106 107 /* 108 * If RCVR FIFO trigger level was not reached, complete the transfer and 109 * let 8250.c copy the remaining data. 110 */ 111 if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT) { 112 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, 113 &state); 114 if (dma_status == DMA_IN_PROGRESS) { 115 dmaengine_pause(dma->rxchan); 116 __dma_rx_complete(p); 117 } 118 return -ETIMEDOUT; 119 } 120 121 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 122 dma->rx_size, DMA_DEV_TO_MEM, 123 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 124 if (!desc) 125 return -EBUSY; 126 127 desc->callback = __dma_rx_complete; 128 desc->callback_param = p; 129 130 dma->rx_cookie = dmaengine_submit(desc); 131 132 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, 133 dma->rx_size, DMA_FROM_DEVICE); 134 135 dma_async_issue_pending(dma->rxchan); 136 137 return 0; 138 } 139 EXPORT_SYMBOL_GPL(serial8250_rx_dma); 140 141 int serial8250_request_dma(struct uart_8250_port *p) 142 { 143 struct uart_8250_dma *dma = p->dma; 144 dma_cap_mask_t mask; 145 146 dma->rxconf.src_addr = p->port.mapbase + UART_RX; 147 dma->txconf.dst_addr = p->port.mapbase + UART_TX; 148 149 dma_cap_zero(mask); 150 dma_cap_set(DMA_SLAVE, mask); 151 152 /* Get a channel for RX */ 153 dma->rxchan = dma_request_channel(mask, dma->fn, dma->rx_param); 154 if (!dma->rxchan) 155 return -ENODEV; 156 157 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 158 159 /* Get a channel for TX */ 160 dma->txchan = dma_request_channel(mask, dma->fn, dma->tx_param); 161 if (!dma->txchan) { 162 dma_release_channel(dma->rxchan); 163 return -ENODEV; 164 } 165 166 dmaengine_slave_config(dma->txchan, &dma->txconf); 167 168 /* RX buffer */ 169 if (!dma->rx_size) 170 dma->rx_size = PAGE_SIZE; 171 172 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 173 &dma->rx_addr, GFP_KERNEL); 174 if (!dma->rx_buf) { 175 dma_release_channel(dma->rxchan); 176 dma_release_channel(dma->txchan); 177 return -ENOMEM; 178 } 179 180 /* TX buffer */ 181 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 182 p->port.state->xmit.buf, 183 UART_XMIT_SIZE, 184 DMA_TO_DEVICE); 185 186 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 187 188 return 0; 189 } 190 EXPORT_SYMBOL_GPL(serial8250_request_dma); 191 192 void serial8250_release_dma(struct uart_8250_port *p) 193 { 194 struct uart_8250_dma *dma = p->dma; 195 196 if (!dma) 197 return; 198 199 /* Release RX resources */ 200 dmaengine_terminate_all(dma->rxchan); 201 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 202 dma->rx_addr); 203 dma_release_channel(dma->rxchan); 204 dma->rxchan = NULL; 205 206 /* Release TX resources */ 207 dmaengine_terminate_all(dma->txchan); 208 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 209 UART_XMIT_SIZE, DMA_TO_DEVICE); 210 dma_release_channel(dma->txchan); 211 dma->txchan = NULL; 212 dma->tx_running = 0; 213 214 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 215 } 216 EXPORT_SYMBOL_GPL(serial8250_release_dma); 217