1 /* 2 * 8250_dma.c - DMA Engine API support for 8250.c 3 * 4 * Copyright (C) 2013 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 #include <linux/tty.h> 12 #include <linux/tty_flip.h> 13 #include <linux/serial_reg.h> 14 #include <linux/dma-mapping.h> 15 16 #include "8250.h" 17 18 static void __dma_tx_complete(void *param) 19 { 20 struct uart_8250_port *p = param; 21 struct uart_8250_dma *dma = p->dma; 22 struct circ_buf *xmit = &p->port.state->xmit; 23 unsigned long flags; 24 25 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 26 UART_XMIT_SIZE, DMA_TO_DEVICE); 27 28 spin_lock_irqsave(&p->port.lock, flags); 29 30 dma->tx_running = 0; 31 32 xmit->tail += dma->tx_size; 33 xmit->tail &= UART_XMIT_SIZE - 1; 34 p->port.icount.tx += dma->tx_size; 35 36 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 37 uart_write_wakeup(&p->port); 38 39 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) 40 serial8250_tx_dma(p); 41 42 spin_unlock_irqrestore(&p->port.lock, flags); 43 } 44 45 static void __dma_rx_complete(void *param) 46 { 47 struct uart_8250_port *p = param; 48 struct uart_8250_dma *dma = p->dma; 49 struct tty_port *tty_port = &p->port.state->port; 50 struct dma_tx_state state; 51 int count; 52 53 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, 54 dma->rx_size, DMA_FROM_DEVICE); 55 56 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 57 dmaengine_terminate_all(dma->rxchan); 58 59 count = dma->rx_size - state.residue; 60 61 tty_insert_flip_string(tty_port, dma->rx_buf, count); 62 p->port.icount.rx += count; 63 64 tty_flip_buffer_push(tty_port); 65 } 66 67 int serial8250_tx_dma(struct uart_8250_port *p) 68 { 69 struct uart_8250_dma *dma = p->dma; 70 struct circ_buf *xmit = &p->port.state->xmit; 71 struct dma_async_tx_descriptor *desc; 72 73 if (uart_tx_stopped(&p->port) || dma->tx_running || 74 uart_circ_empty(xmit)) 75 return 0; 76 77 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 78 79 desc = dmaengine_prep_slave_single(dma->txchan, 80 dma->tx_addr + xmit->tail, 81 dma->tx_size, DMA_MEM_TO_DEV, 82 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 83 if (!desc) 84 return -EBUSY; 85 86 dma->tx_running = 1; 87 88 desc->callback = __dma_tx_complete; 89 desc->callback_param = p; 90 91 dma->tx_cookie = dmaengine_submit(desc); 92 93 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 94 UART_XMIT_SIZE, DMA_TO_DEVICE); 95 96 dma_async_issue_pending(dma->txchan); 97 98 return 0; 99 } 100 EXPORT_SYMBOL_GPL(serial8250_tx_dma); 101 102 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 103 { 104 struct uart_8250_dma *dma = p->dma; 105 struct dma_async_tx_descriptor *desc; 106 struct dma_tx_state state; 107 int dma_status; 108 109 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 110 111 switch (iir & 0x3f) { 112 case UART_IIR_RLSI: 113 /* 8250_core handles errors and break interrupts */ 114 return -EIO; 115 case UART_IIR_RX_TIMEOUT: 116 /* 117 * If RCVR FIFO trigger level was not reached, complete the 118 * transfer and let 8250_core copy the remaining data. 119 */ 120 if (dma_status == DMA_IN_PROGRESS) { 121 dmaengine_pause(dma->rxchan); 122 __dma_rx_complete(p); 123 } 124 return -ETIMEDOUT; 125 default: 126 break; 127 } 128 129 if (dma_status) 130 return 0; 131 132 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 133 dma->rx_size, DMA_DEV_TO_MEM, 134 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 135 if (!desc) 136 return -EBUSY; 137 138 desc->callback = __dma_rx_complete; 139 desc->callback_param = p; 140 141 dma->rx_cookie = dmaengine_submit(desc); 142 143 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, 144 dma->rx_size, DMA_FROM_DEVICE); 145 146 dma_async_issue_pending(dma->rxchan); 147 148 return 0; 149 } 150 EXPORT_SYMBOL_GPL(serial8250_rx_dma); 151 152 int serial8250_request_dma(struct uart_8250_port *p) 153 { 154 struct uart_8250_dma *dma = p->dma; 155 dma_cap_mask_t mask; 156 157 /* Default slave configuration parameters */ 158 dma->rxconf.direction = DMA_DEV_TO_MEM; 159 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 160 dma->rxconf.src_addr = p->port.mapbase + UART_RX; 161 162 dma->txconf.direction = DMA_MEM_TO_DEV; 163 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 164 dma->txconf.dst_addr = p->port.mapbase + UART_TX; 165 166 dma_cap_zero(mask); 167 dma_cap_set(DMA_SLAVE, mask); 168 169 /* Get a channel for RX */ 170 dma->rxchan = dma_request_slave_channel_compat(mask, 171 dma->fn, dma->rx_param, 172 p->port.dev, "rx"); 173 if (!dma->rxchan) 174 return -ENODEV; 175 176 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 177 178 /* Get a channel for TX */ 179 dma->txchan = dma_request_slave_channel_compat(mask, 180 dma->fn, dma->tx_param, 181 p->port.dev, "tx"); 182 if (!dma->txchan) { 183 dma_release_channel(dma->rxchan); 184 return -ENODEV; 185 } 186 187 dmaengine_slave_config(dma->txchan, &dma->txconf); 188 189 /* RX buffer */ 190 if (!dma->rx_size) 191 dma->rx_size = PAGE_SIZE; 192 193 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 194 &dma->rx_addr, GFP_KERNEL); 195 if (!dma->rx_buf) 196 goto err; 197 198 /* TX buffer */ 199 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 200 p->port.state->xmit.buf, 201 UART_XMIT_SIZE, 202 DMA_TO_DEVICE); 203 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 204 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 205 dma->rx_buf, dma->rx_addr); 206 goto err; 207 } 208 209 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 210 211 return 0; 212 err: 213 dma_release_channel(dma->rxchan); 214 dma_release_channel(dma->txchan); 215 216 return -ENOMEM; 217 } 218 EXPORT_SYMBOL_GPL(serial8250_request_dma); 219 220 void serial8250_release_dma(struct uart_8250_port *p) 221 { 222 struct uart_8250_dma *dma = p->dma; 223 224 if (!dma) 225 return; 226 227 /* Release RX resources */ 228 dmaengine_terminate_all(dma->rxchan); 229 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 230 dma->rx_addr); 231 dma_release_channel(dma->rxchan); 232 dma->rxchan = NULL; 233 234 /* Release TX resources */ 235 dmaengine_terminate_all(dma->txchan); 236 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 237 UART_XMIT_SIZE, DMA_TO_DEVICE); 238 dma_release_channel(dma->txchan); 239 dma->txchan = NULL; 240 dma->tx_running = 0; 241 242 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 243 } 244 EXPORT_SYMBOL_GPL(serial8250_release_dma); 245