19196d8acSJiri Slaby /* 29196d8acSJiri Slaby * Driver for 8250/16550-type serial ports 39196d8acSJiri Slaby * 49196d8acSJiri Slaby * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 59196d8acSJiri Slaby * 69196d8acSJiri Slaby * Copyright (C) 2001 Russell King. 79196d8acSJiri Slaby * 89196d8acSJiri Slaby * This program is free software; you can redistribute it and/or modify 99196d8acSJiri Slaby * it under the terms of the GNU General Public License as published by 109196d8acSJiri Slaby * the Free Software Foundation; either version 2 of the License, or 119196d8acSJiri Slaby * (at your option) any later version. 129196d8acSJiri Slaby * 139196d8acSJiri Slaby * A note about mapbase / membase 149196d8acSJiri Slaby * 159196d8acSJiri Slaby * mapbase is the physical address of the IO port. 169196d8acSJiri Slaby * membase is an 'ioremapped' cookie. 179196d8acSJiri Slaby */ 189196d8acSJiri Slaby 199196d8acSJiri Slaby #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 209196d8acSJiri Slaby #define SUPPORT_SYSRQ 219196d8acSJiri Slaby #endif 229196d8acSJiri Slaby 239196d8acSJiri Slaby #include <linux/module.h> 249196d8acSJiri Slaby #include <linux/moduleparam.h> 259196d8acSJiri Slaby #include <linux/ioport.h> 269196d8acSJiri Slaby #include <linux/init.h> 279196d8acSJiri Slaby #include <linux/console.h> 289196d8acSJiri Slaby #include <linux/sysrq.h> 299196d8acSJiri Slaby #include <linux/delay.h> 309196d8acSJiri Slaby #include <linux/platform_device.h> 319196d8acSJiri Slaby #include <linux/tty.h> 329196d8acSJiri Slaby #include <linux/ratelimit.h> 339196d8acSJiri Slaby #include <linux/tty_flip.h> 349196d8acSJiri Slaby #include <linux/serial_reg.h> 359196d8acSJiri Slaby #include <linux/serial_core.h> 369196d8acSJiri Slaby #include <linux/serial.h> 379196d8acSJiri Slaby #include <linux/serial_8250.h> 389196d8acSJiri Slaby #include <linux/nmi.h> 399196d8acSJiri Slaby #include <linux/mutex.h> 409196d8acSJiri Slaby #include <linux/slab.h> 419196d8acSJiri Slaby #ifdef CONFIG_SPARC 429196d8acSJiri Slaby #include <linux/sunserialcore.h> 439196d8acSJiri Slaby #endif 449196d8acSJiri Slaby 459196d8acSJiri Slaby #include <asm/io.h> 469196d8acSJiri Slaby #include <asm/irq.h> 479196d8acSJiri Slaby 489196d8acSJiri Slaby #include "8250.h" 499196d8acSJiri Slaby 509196d8acSJiri Slaby /* 519196d8acSJiri Slaby * Configuration: 529196d8acSJiri Slaby * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option 539196d8acSJiri Slaby * is unsafe when used on edge-triggered interrupts. 549196d8acSJiri Slaby */ 559196d8acSJiri Slaby static unsigned int share_irqs = SERIAL8250_SHARE_IRQS; 569196d8acSJiri Slaby 579196d8acSJiri Slaby static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS; 589196d8acSJiri Slaby 599196d8acSJiri Slaby static struct uart_driver serial8250_reg; 609196d8acSJiri Slaby 619196d8acSJiri Slaby static int serial_index(struct uart_port *port) 629196d8acSJiri Slaby { 639196d8acSJiri Slaby return (serial8250_reg.minor - 64) + port->line; 649196d8acSJiri Slaby } 659196d8acSJiri Slaby 669196d8acSJiri Slaby static unsigned int skip_txen_test; /* force skip of txen test at init time */ 679196d8acSJiri Slaby 689196d8acSJiri Slaby /* 699196d8acSJiri Slaby * Debugging. 709196d8acSJiri Slaby */ 719196d8acSJiri Slaby #if 0 729196d8acSJiri Slaby #define DEBUG_AUTOCONF(fmt...) printk(fmt) 739196d8acSJiri Slaby #else 749196d8acSJiri Slaby #define DEBUG_AUTOCONF(fmt...) do { } while (0) 759196d8acSJiri Slaby #endif 769196d8acSJiri Slaby 779196d8acSJiri Slaby #if 0 789196d8acSJiri Slaby #define DEBUG_INTR(fmt...) printk(fmt) 799196d8acSJiri Slaby #else 809196d8acSJiri Slaby #define DEBUG_INTR(fmt...) do { } while (0) 819196d8acSJiri Slaby #endif 829196d8acSJiri Slaby 839196d8acSJiri Slaby #define PASS_LIMIT 512 849196d8acSJiri Slaby 859196d8acSJiri Slaby #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 869196d8acSJiri Slaby 879196d8acSJiri Slaby 889196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_DETECT_IRQ 899196d8acSJiri Slaby #define CONFIG_SERIAL_DETECT_IRQ 1 909196d8acSJiri Slaby #endif 919196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_MANY_PORTS 929196d8acSJiri Slaby #define CONFIG_SERIAL_MANY_PORTS 1 939196d8acSJiri Slaby #endif 949196d8acSJiri Slaby 959196d8acSJiri Slaby /* 969196d8acSJiri Slaby * HUB6 is always on. This will be removed once the header 979196d8acSJiri Slaby * files have been cleaned. 989196d8acSJiri Slaby */ 999196d8acSJiri Slaby #define CONFIG_HUB6 1 1009196d8acSJiri Slaby 1019196d8acSJiri Slaby #include <asm/serial.h> 1029196d8acSJiri Slaby /* 1039196d8acSJiri Slaby * SERIAL_PORT_DFNS tells us about built-in ports that have no 1049196d8acSJiri Slaby * standard enumeration mechanism. Platforms that can find all 1059196d8acSJiri Slaby * serial ports via mechanisms like ACPI or PCI need not supply it. 1069196d8acSJiri Slaby */ 1079196d8acSJiri Slaby #ifndef SERIAL_PORT_DFNS 1089196d8acSJiri Slaby #define SERIAL_PORT_DFNS 1099196d8acSJiri Slaby #endif 1109196d8acSJiri Slaby 1119196d8acSJiri Slaby static const struct old_serial_port old_serial_port[] = { 1129196d8acSJiri Slaby SERIAL_PORT_DFNS /* defined in asm/serial.h */ 1139196d8acSJiri Slaby }; 1149196d8acSJiri Slaby 1159196d8acSJiri Slaby #define UART_NR CONFIG_SERIAL_8250_NR_UARTS 1169196d8acSJiri Slaby 1179196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 1189196d8acSJiri Slaby 1199196d8acSJiri Slaby #define PORT_RSA_MAX 4 1209196d8acSJiri Slaby static unsigned long probe_rsa[PORT_RSA_MAX]; 1219196d8acSJiri Slaby static unsigned int probe_rsa_count; 1229196d8acSJiri Slaby #endif /* CONFIG_SERIAL_8250_RSA */ 1239196d8acSJiri Slaby 1249196d8acSJiri Slaby struct irq_info { 1259196d8acSJiri Slaby struct hlist_node node; 1269196d8acSJiri Slaby int irq; 1279196d8acSJiri Slaby spinlock_t lock; /* Protects list not the hash */ 1289196d8acSJiri Slaby struct list_head *head; 1299196d8acSJiri Slaby }; 1309196d8acSJiri Slaby 1319196d8acSJiri Slaby #define NR_IRQ_HASH 32 /* Can be adjusted later */ 1329196d8acSJiri Slaby static struct hlist_head irq_lists[NR_IRQ_HASH]; 1339196d8acSJiri Slaby static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */ 1349196d8acSJiri Slaby 1359196d8acSJiri Slaby /* 1369196d8acSJiri Slaby * Here we define the default xmit fifo size used for each type of UART. 1379196d8acSJiri Slaby */ 1389196d8acSJiri Slaby static const struct serial8250_config uart_config[] = { 1399196d8acSJiri Slaby [PORT_UNKNOWN] = { 1409196d8acSJiri Slaby .name = "unknown", 1419196d8acSJiri Slaby .fifo_size = 1, 1429196d8acSJiri Slaby .tx_loadsz = 1, 1439196d8acSJiri Slaby }, 1449196d8acSJiri Slaby [PORT_8250] = { 1459196d8acSJiri Slaby .name = "8250", 1469196d8acSJiri Slaby .fifo_size = 1, 1479196d8acSJiri Slaby .tx_loadsz = 1, 1489196d8acSJiri Slaby }, 1499196d8acSJiri Slaby [PORT_16450] = { 1509196d8acSJiri Slaby .name = "16450", 1519196d8acSJiri Slaby .fifo_size = 1, 1529196d8acSJiri Slaby .tx_loadsz = 1, 1539196d8acSJiri Slaby }, 1549196d8acSJiri Slaby [PORT_16550] = { 1559196d8acSJiri Slaby .name = "16550", 1569196d8acSJiri Slaby .fifo_size = 1, 1579196d8acSJiri Slaby .tx_loadsz = 1, 1589196d8acSJiri Slaby }, 1599196d8acSJiri Slaby [PORT_16550A] = { 1609196d8acSJiri Slaby .name = "16550A", 1619196d8acSJiri Slaby .fifo_size = 16, 1629196d8acSJiri Slaby .tx_loadsz = 16, 1639196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 1649196d8acSJiri Slaby .flags = UART_CAP_FIFO, 1659196d8acSJiri Slaby }, 1669196d8acSJiri Slaby [PORT_CIRRUS] = { 1679196d8acSJiri Slaby .name = "Cirrus", 1689196d8acSJiri Slaby .fifo_size = 1, 1699196d8acSJiri Slaby .tx_loadsz = 1, 1709196d8acSJiri Slaby }, 1719196d8acSJiri Slaby [PORT_16650] = { 1729196d8acSJiri Slaby .name = "ST16650", 1739196d8acSJiri Slaby .fifo_size = 1, 1749196d8acSJiri Slaby .tx_loadsz = 1, 1759196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP, 1769196d8acSJiri Slaby }, 1779196d8acSJiri Slaby [PORT_16650V2] = { 1789196d8acSJiri Slaby .name = "ST16650V2", 1799196d8acSJiri Slaby .fifo_size = 32, 1809196d8acSJiri Slaby .tx_loadsz = 16, 1819196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 | 1829196d8acSJiri Slaby UART_FCR_T_TRIG_00, 1839196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP, 1849196d8acSJiri Slaby }, 1859196d8acSJiri Slaby [PORT_16750] = { 1869196d8acSJiri Slaby .name = "TI16750", 1879196d8acSJiri Slaby .fifo_size = 64, 1889196d8acSJiri Slaby .tx_loadsz = 64, 1899196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 | 1909196d8acSJiri Slaby UART_FCR7_64BYTE, 1919196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE, 1929196d8acSJiri Slaby }, 1939196d8acSJiri Slaby [PORT_STARTECH] = { 1949196d8acSJiri Slaby .name = "Startech", 1959196d8acSJiri Slaby .fifo_size = 1, 1969196d8acSJiri Slaby .tx_loadsz = 1, 1979196d8acSJiri Slaby }, 1989196d8acSJiri Slaby [PORT_16C950] = { 1999196d8acSJiri Slaby .name = "16C950/954", 2009196d8acSJiri Slaby .fifo_size = 128, 2019196d8acSJiri Slaby .tx_loadsz = 128, 2029196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2039196d8acSJiri Slaby /* UART_CAP_EFR breaks billionon CF bluetooth card. */ 2049196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_SLEEP, 2059196d8acSJiri Slaby }, 2069196d8acSJiri Slaby [PORT_16654] = { 2079196d8acSJiri Slaby .name = "ST16654", 2089196d8acSJiri Slaby .fifo_size = 64, 2099196d8acSJiri Slaby .tx_loadsz = 32, 2109196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 | 2119196d8acSJiri Slaby UART_FCR_T_TRIG_10, 2129196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP, 2139196d8acSJiri Slaby }, 2149196d8acSJiri Slaby [PORT_16850] = { 2159196d8acSJiri Slaby .name = "XR16850", 2169196d8acSJiri Slaby .fifo_size = 128, 2179196d8acSJiri Slaby .tx_loadsz = 128, 2189196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2199196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP, 2209196d8acSJiri Slaby }, 2219196d8acSJiri Slaby [PORT_RSA] = { 2229196d8acSJiri Slaby .name = "RSA", 2239196d8acSJiri Slaby .fifo_size = 2048, 2249196d8acSJiri Slaby .tx_loadsz = 2048, 2259196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11, 2269196d8acSJiri Slaby .flags = UART_CAP_FIFO, 2279196d8acSJiri Slaby }, 2289196d8acSJiri Slaby [PORT_NS16550A] = { 2299196d8acSJiri Slaby .name = "NS16550A", 2309196d8acSJiri Slaby .fifo_size = 16, 2319196d8acSJiri Slaby .tx_loadsz = 16, 2329196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2339196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_NATSEMI, 2349196d8acSJiri Slaby }, 2359196d8acSJiri Slaby [PORT_XSCALE] = { 2369196d8acSJiri Slaby .name = "XScale", 2379196d8acSJiri Slaby .fifo_size = 32, 2389196d8acSJiri Slaby .tx_loadsz = 32, 2399196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2409196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE, 2419196d8acSJiri Slaby }, 2429196d8acSJiri Slaby [PORT_OCTEON] = { 2439196d8acSJiri Slaby .name = "OCTEON", 2449196d8acSJiri Slaby .fifo_size = 64, 2459196d8acSJiri Slaby .tx_loadsz = 64, 2469196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2479196d8acSJiri Slaby .flags = UART_CAP_FIFO, 2489196d8acSJiri Slaby }, 2499196d8acSJiri Slaby [PORT_AR7] = { 2509196d8acSJiri Slaby .name = "AR7", 2519196d8acSJiri Slaby .fifo_size = 16, 2529196d8acSJiri Slaby .tx_loadsz = 16, 2539196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, 2549196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE, 2559196d8acSJiri Slaby }, 2569196d8acSJiri Slaby [PORT_U6_16550A] = { 2579196d8acSJiri Slaby .name = "U6_16550A", 2589196d8acSJiri Slaby .fifo_size = 64, 2599196d8acSJiri Slaby .tx_loadsz = 64, 2609196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2619196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE, 2629196d8acSJiri Slaby }, 2639196d8acSJiri Slaby [PORT_TEGRA] = { 2649196d8acSJiri Slaby .name = "Tegra", 2659196d8acSJiri Slaby .fifo_size = 32, 2669196d8acSJiri Slaby .tx_loadsz = 8, 2679196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 | 2689196d8acSJiri Slaby UART_FCR_T_TRIG_01, 2699196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_RTOIE, 2709196d8acSJiri Slaby }, 2719196d8acSJiri Slaby [PORT_XR17D15X] = { 2729196d8acSJiri Slaby .name = "XR17D15X", 2739196d8acSJiri Slaby .fifo_size = 64, 2749196d8acSJiri Slaby .tx_loadsz = 64, 2759196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 2769196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR | 2779196d8acSJiri Slaby UART_CAP_SLEEP, 2789196d8acSJiri Slaby }, 2799196d8acSJiri Slaby [PORT_XR17V35X] = { 2809196d8acSJiri Slaby .name = "XR17V35X", 2819196d8acSJiri Slaby .fifo_size = 256, 2829196d8acSJiri Slaby .tx_loadsz = 256, 2839196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 | 2849196d8acSJiri Slaby UART_FCR_T_TRIG_11, 2859196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR | 2869196d8acSJiri Slaby UART_CAP_SLEEP, 2879196d8acSJiri Slaby }, 2889196d8acSJiri Slaby [PORT_LPC3220] = { 2899196d8acSJiri Slaby .name = "LPC3220", 2909196d8acSJiri Slaby .fifo_size = 64, 2919196d8acSJiri Slaby .tx_loadsz = 32, 2929196d8acSJiri Slaby .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO | 2939196d8acSJiri Slaby UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00, 2949196d8acSJiri Slaby .flags = UART_CAP_FIFO, 2959196d8acSJiri Slaby }, 2969196d8acSJiri Slaby [PORT_BRCM_TRUMANAGE] = { 2979196d8acSJiri Slaby .name = "TruManage", 2989196d8acSJiri Slaby .fifo_size = 1, 2999196d8acSJiri Slaby .tx_loadsz = 1024, 3009196d8acSJiri Slaby .flags = UART_CAP_HFIFO, 3019196d8acSJiri Slaby }, 3029196d8acSJiri Slaby [PORT_8250_CIR] = { 3039196d8acSJiri Slaby .name = "CIR port" 3049196d8acSJiri Slaby }, 3059196d8acSJiri Slaby [PORT_ALTR_16550_F32] = { 3069196d8acSJiri Slaby .name = "Altera 16550 FIFO32", 3079196d8acSJiri Slaby .fifo_size = 32, 3089196d8acSJiri Slaby .tx_loadsz = 32, 3099196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 3109196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE, 3119196d8acSJiri Slaby }, 3129196d8acSJiri Slaby [PORT_ALTR_16550_F64] = { 3139196d8acSJiri Slaby .name = "Altera 16550 FIFO64", 3149196d8acSJiri Slaby .fifo_size = 64, 3159196d8acSJiri Slaby .tx_loadsz = 64, 3169196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 3179196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE, 3189196d8acSJiri Slaby }, 3199196d8acSJiri Slaby [PORT_ALTR_16550_F128] = { 3209196d8acSJiri Slaby .name = "Altera 16550 FIFO128", 3219196d8acSJiri Slaby .fifo_size = 128, 3229196d8acSJiri Slaby .tx_loadsz = 128, 3239196d8acSJiri Slaby .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 3249196d8acSJiri Slaby .flags = UART_CAP_FIFO | UART_CAP_AFE, 3259196d8acSJiri Slaby }, 3269196d8acSJiri Slaby }; 3279196d8acSJiri Slaby 3289196d8acSJiri Slaby /* Uart divisor latch read */ 3299196d8acSJiri Slaby static int default_serial_dl_read(struct uart_8250_port *up) 3309196d8acSJiri Slaby { 3319196d8acSJiri Slaby return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8; 3329196d8acSJiri Slaby } 3339196d8acSJiri Slaby 3349196d8acSJiri Slaby /* Uart divisor latch write */ 3359196d8acSJiri Slaby static void default_serial_dl_write(struct uart_8250_port *up, int value) 3369196d8acSJiri Slaby { 3379196d8acSJiri Slaby serial_out(up, UART_DLL, value & 0xff); 3389196d8acSJiri Slaby serial_out(up, UART_DLM, value >> 8 & 0xff); 3399196d8acSJiri Slaby } 3409196d8acSJiri Slaby 3419196d8acSJiri Slaby #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X) 3429196d8acSJiri Slaby 3439196d8acSJiri Slaby /* Au1x00/RT288x UART hardware has a weird register layout */ 3449196d8acSJiri Slaby static const u8 au_io_in_map[] = { 3459196d8acSJiri Slaby [UART_RX] = 0, 3469196d8acSJiri Slaby [UART_IER] = 2, 3479196d8acSJiri Slaby [UART_IIR] = 3, 3489196d8acSJiri Slaby [UART_LCR] = 5, 3499196d8acSJiri Slaby [UART_MCR] = 6, 3509196d8acSJiri Slaby [UART_LSR] = 7, 3519196d8acSJiri Slaby [UART_MSR] = 8, 3529196d8acSJiri Slaby }; 3539196d8acSJiri Slaby 3549196d8acSJiri Slaby static const u8 au_io_out_map[] = { 3559196d8acSJiri Slaby [UART_TX] = 1, 3569196d8acSJiri Slaby [UART_IER] = 2, 3579196d8acSJiri Slaby [UART_FCR] = 4, 3589196d8acSJiri Slaby [UART_LCR] = 5, 3599196d8acSJiri Slaby [UART_MCR] = 6, 3609196d8acSJiri Slaby }; 3619196d8acSJiri Slaby 3629196d8acSJiri Slaby static unsigned int au_serial_in(struct uart_port *p, int offset) 3639196d8acSJiri Slaby { 3649196d8acSJiri Slaby offset = au_io_in_map[offset] << p->regshift; 3659196d8acSJiri Slaby return __raw_readl(p->membase + offset); 3669196d8acSJiri Slaby } 3679196d8acSJiri Slaby 3689196d8acSJiri Slaby static void au_serial_out(struct uart_port *p, int offset, int value) 3699196d8acSJiri Slaby { 3709196d8acSJiri Slaby offset = au_io_out_map[offset] << p->regshift; 3719196d8acSJiri Slaby __raw_writel(value, p->membase + offset); 3729196d8acSJiri Slaby } 3739196d8acSJiri Slaby 3749196d8acSJiri Slaby /* Au1x00 haven't got a standard divisor latch */ 3759196d8acSJiri Slaby static int au_serial_dl_read(struct uart_8250_port *up) 3769196d8acSJiri Slaby { 3779196d8acSJiri Slaby return __raw_readl(up->port.membase + 0x28); 3789196d8acSJiri Slaby } 3799196d8acSJiri Slaby 3809196d8acSJiri Slaby static void au_serial_dl_write(struct uart_8250_port *up, int value) 3819196d8acSJiri Slaby { 3829196d8acSJiri Slaby __raw_writel(value, up->port.membase + 0x28); 3839196d8acSJiri Slaby } 3849196d8acSJiri Slaby 3859196d8acSJiri Slaby #endif 3869196d8acSJiri Slaby 3879196d8acSJiri Slaby static unsigned int hub6_serial_in(struct uart_port *p, int offset) 3889196d8acSJiri Slaby { 3899196d8acSJiri Slaby offset = offset << p->regshift; 3909196d8acSJiri Slaby outb(p->hub6 - 1 + offset, p->iobase); 3919196d8acSJiri Slaby return inb(p->iobase + 1); 3929196d8acSJiri Slaby } 3939196d8acSJiri Slaby 3949196d8acSJiri Slaby static void hub6_serial_out(struct uart_port *p, int offset, int value) 3959196d8acSJiri Slaby { 3969196d8acSJiri Slaby offset = offset << p->regshift; 3979196d8acSJiri Slaby outb(p->hub6 - 1 + offset, p->iobase); 3989196d8acSJiri Slaby outb(value, p->iobase + 1); 3999196d8acSJiri Slaby } 4009196d8acSJiri Slaby 4019196d8acSJiri Slaby static unsigned int mem_serial_in(struct uart_port *p, int offset) 4029196d8acSJiri Slaby { 4039196d8acSJiri Slaby offset = offset << p->regshift; 4049196d8acSJiri Slaby return readb(p->membase + offset); 4059196d8acSJiri Slaby } 4069196d8acSJiri Slaby 4079196d8acSJiri Slaby static void mem_serial_out(struct uart_port *p, int offset, int value) 4089196d8acSJiri Slaby { 4099196d8acSJiri Slaby offset = offset << p->regshift; 4109196d8acSJiri Slaby writeb(value, p->membase + offset); 4119196d8acSJiri Slaby } 4129196d8acSJiri Slaby 4139196d8acSJiri Slaby static void mem32_serial_out(struct uart_port *p, int offset, int value) 4149196d8acSJiri Slaby { 4159196d8acSJiri Slaby offset = offset << p->regshift; 4169196d8acSJiri Slaby writel(value, p->membase + offset); 4179196d8acSJiri Slaby } 4189196d8acSJiri Slaby 4199196d8acSJiri Slaby static unsigned int mem32_serial_in(struct uart_port *p, int offset) 4209196d8acSJiri Slaby { 4219196d8acSJiri Slaby offset = offset << p->regshift; 4229196d8acSJiri Slaby return readl(p->membase + offset); 4239196d8acSJiri Slaby } 4249196d8acSJiri Slaby 4259196d8acSJiri Slaby static unsigned int io_serial_in(struct uart_port *p, int offset) 4269196d8acSJiri Slaby { 4279196d8acSJiri Slaby offset = offset << p->regshift; 4289196d8acSJiri Slaby return inb(p->iobase + offset); 4299196d8acSJiri Slaby } 4309196d8acSJiri Slaby 4319196d8acSJiri Slaby static void io_serial_out(struct uart_port *p, int offset, int value) 4329196d8acSJiri Slaby { 4339196d8acSJiri Slaby offset = offset << p->regshift; 4349196d8acSJiri Slaby outb(value, p->iobase + offset); 4359196d8acSJiri Slaby } 4369196d8acSJiri Slaby 4379196d8acSJiri Slaby static int serial8250_default_handle_irq(struct uart_port *port); 4389196d8acSJiri Slaby static int exar_handle_irq(struct uart_port *port); 4399196d8acSJiri Slaby 4409196d8acSJiri Slaby static void set_io_from_upio(struct uart_port *p) 4419196d8acSJiri Slaby { 4429196d8acSJiri Slaby struct uart_8250_port *up = 4439196d8acSJiri Slaby container_of(p, struct uart_8250_port, port); 4449196d8acSJiri Slaby 4459196d8acSJiri Slaby up->dl_read = default_serial_dl_read; 4469196d8acSJiri Slaby up->dl_write = default_serial_dl_write; 4479196d8acSJiri Slaby 4489196d8acSJiri Slaby switch (p->iotype) { 4499196d8acSJiri Slaby case UPIO_HUB6: 4509196d8acSJiri Slaby p->serial_in = hub6_serial_in; 4519196d8acSJiri Slaby p->serial_out = hub6_serial_out; 4529196d8acSJiri Slaby break; 4539196d8acSJiri Slaby 4549196d8acSJiri Slaby case UPIO_MEM: 4559196d8acSJiri Slaby p->serial_in = mem_serial_in; 4569196d8acSJiri Slaby p->serial_out = mem_serial_out; 4579196d8acSJiri Slaby break; 4589196d8acSJiri Slaby 4599196d8acSJiri Slaby case UPIO_MEM32: 4609196d8acSJiri Slaby p->serial_in = mem32_serial_in; 4619196d8acSJiri Slaby p->serial_out = mem32_serial_out; 4629196d8acSJiri Slaby break; 4639196d8acSJiri Slaby 4649196d8acSJiri Slaby #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X) 4659196d8acSJiri Slaby case UPIO_AU: 4669196d8acSJiri Slaby p->serial_in = au_serial_in; 4679196d8acSJiri Slaby p->serial_out = au_serial_out; 4689196d8acSJiri Slaby up->dl_read = au_serial_dl_read; 4699196d8acSJiri Slaby up->dl_write = au_serial_dl_write; 4709196d8acSJiri Slaby break; 4719196d8acSJiri Slaby #endif 4729196d8acSJiri Slaby 4739196d8acSJiri Slaby default: 4749196d8acSJiri Slaby p->serial_in = io_serial_in; 4759196d8acSJiri Slaby p->serial_out = io_serial_out; 4769196d8acSJiri Slaby break; 4779196d8acSJiri Slaby } 4789196d8acSJiri Slaby /* Remember loaded iotype */ 4799196d8acSJiri Slaby up->cur_iotype = p->iotype; 4809196d8acSJiri Slaby p->handle_irq = serial8250_default_handle_irq; 4819196d8acSJiri Slaby } 4829196d8acSJiri Slaby 4839196d8acSJiri Slaby static void 4849196d8acSJiri Slaby serial_port_out_sync(struct uart_port *p, int offset, int value) 4859196d8acSJiri Slaby { 4869196d8acSJiri Slaby switch (p->iotype) { 4879196d8acSJiri Slaby case UPIO_MEM: 4889196d8acSJiri Slaby case UPIO_MEM32: 4899196d8acSJiri Slaby case UPIO_AU: 4909196d8acSJiri Slaby p->serial_out(p, offset, value); 4919196d8acSJiri Slaby p->serial_in(p, UART_LCR); /* safe, no side-effects */ 4929196d8acSJiri Slaby break; 4939196d8acSJiri Slaby default: 4949196d8acSJiri Slaby p->serial_out(p, offset, value); 4959196d8acSJiri Slaby } 4969196d8acSJiri Slaby } 4979196d8acSJiri Slaby 4989196d8acSJiri Slaby /* 4999196d8acSJiri Slaby * For the 16C950 5009196d8acSJiri Slaby */ 5019196d8acSJiri Slaby static void serial_icr_write(struct uart_8250_port *up, int offset, int value) 5029196d8acSJiri Slaby { 5039196d8acSJiri Slaby serial_out(up, UART_SCR, offset); 5049196d8acSJiri Slaby serial_out(up, UART_ICR, value); 5059196d8acSJiri Slaby } 5069196d8acSJiri Slaby 5079196d8acSJiri Slaby static unsigned int serial_icr_read(struct uart_8250_port *up, int offset) 5089196d8acSJiri Slaby { 5099196d8acSJiri Slaby unsigned int value; 5109196d8acSJiri Slaby 5119196d8acSJiri Slaby serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD); 5129196d8acSJiri Slaby serial_out(up, UART_SCR, offset); 5139196d8acSJiri Slaby value = serial_in(up, UART_ICR); 5149196d8acSJiri Slaby serial_icr_write(up, UART_ACR, up->acr); 5159196d8acSJiri Slaby 5169196d8acSJiri Slaby return value; 5179196d8acSJiri Slaby } 5189196d8acSJiri Slaby 5199196d8acSJiri Slaby /* 5209196d8acSJiri Slaby * FIFO support. 5219196d8acSJiri Slaby */ 5229196d8acSJiri Slaby static void serial8250_clear_fifos(struct uart_8250_port *p) 5239196d8acSJiri Slaby { 5249196d8acSJiri Slaby if (p->capabilities & UART_CAP_FIFO) { 5259196d8acSJiri Slaby serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO); 5269196d8acSJiri Slaby serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO | 5279196d8acSJiri Slaby UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 5289196d8acSJiri Slaby serial_out(p, UART_FCR, 0); 5299196d8acSJiri Slaby } 5309196d8acSJiri Slaby } 5319196d8acSJiri Slaby 5329196d8acSJiri Slaby void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p) 5339196d8acSJiri Slaby { 5349196d8acSJiri Slaby unsigned char fcr; 5359196d8acSJiri Slaby 5369196d8acSJiri Slaby serial8250_clear_fifos(p); 5379196d8acSJiri Slaby fcr = uart_config[p->port.type].fcr; 5389196d8acSJiri Slaby serial_out(p, UART_FCR, fcr); 5399196d8acSJiri Slaby } 5409196d8acSJiri Slaby EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos); 5419196d8acSJiri Slaby 5429196d8acSJiri Slaby /* 5439196d8acSJiri Slaby * IER sleep support. UARTs which have EFRs need the "extended 5449196d8acSJiri Slaby * capability" bit enabled. Note that on XR16C850s, we need to 5459196d8acSJiri Slaby * reset LCR to write to IER. 5469196d8acSJiri Slaby */ 5479196d8acSJiri Slaby static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) 5489196d8acSJiri Slaby { 5499196d8acSJiri Slaby /* 5509196d8acSJiri Slaby * Exar UARTs have a SLEEP register that enables or disables 5519196d8acSJiri Slaby * each UART to enter sleep mode separately. On the XR17V35x the 5529196d8acSJiri Slaby * register is accessible to each UART at the UART_EXAR_SLEEP 5539196d8acSJiri Slaby * offset but the UART channel may only write to the corresponding 5549196d8acSJiri Slaby * bit. 5559196d8acSJiri Slaby */ 5569196d8acSJiri Slaby if ((p->port.type == PORT_XR17V35X) || 5579196d8acSJiri Slaby (p->port.type == PORT_XR17D15X)) { 5589196d8acSJiri Slaby serial_out(p, UART_EXAR_SLEEP, 0xff); 5599196d8acSJiri Slaby return; 5609196d8acSJiri Slaby } 5619196d8acSJiri Slaby 5629196d8acSJiri Slaby if (p->capabilities & UART_CAP_SLEEP) { 5639196d8acSJiri Slaby if (p->capabilities & UART_CAP_EFR) { 5649196d8acSJiri Slaby serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); 5659196d8acSJiri Slaby serial_out(p, UART_EFR, UART_EFR_ECB); 5669196d8acSJiri Slaby serial_out(p, UART_LCR, 0); 5679196d8acSJiri Slaby } 5689196d8acSJiri Slaby serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); 5699196d8acSJiri Slaby if (p->capabilities & UART_CAP_EFR) { 5709196d8acSJiri Slaby serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); 5719196d8acSJiri Slaby serial_out(p, UART_EFR, 0); 5729196d8acSJiri Slaby serial_out(p, UART_LCR, 0); 5739196d8acSJiri Slaby } 5749196d8acSJiri Slaby } 5759196d8acSJiri Slaby } 5769196d8acSJiri Slaby 5779196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 5789196d8acSJiri Slaby /* 5799196d8acSJiri Slaby * Attempts to turn on the RSA FIFO. Returns zero on failure. 5809196d8acSJiri Slaby * We set the port uart clock rate if we succeed. 5819196d8acSJiri Slaby */ 5829196d8acSJiri Slaby static int __enable_rsa(struct uart_8250_port *up) 5839196d8acSJiri Slaby { 5849196d8acSJiri Slaby unsigned char mode; 5859196d8acSJiri Slaby int result; 5869196d8acSJiri Slaby 5879196d8acSJiri Slaby mode = serial_in(up, UART_RSA_MSR); 5889196d8acSJiri Slaby result = mode & UART_RSA_MSR_FIFO; 5899196d8acSJiri Slaby 5909196d8acSJiri Slaby if (!result) { 5919196d8acSJiri Slaby serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); 5929196d8acSJiri Slaby mode = serial_in(up, UART_RSA_MSR); 5939196d8acSJiri Slaby result = mode & UART_RSA_MSR_FIFO; 5949196d8acSJiri Slaby } 5959196d8acSJiri Slaby 5969196d8acSJiri Slaby if (result) 5979196d8acSJiri Slaby up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; 5989196d8acSJiri Slaby 5999196d8acSJiri Slaby return result; 6009196d8acSJiri Slaby } 6019196d8acSJiri Slaby 6029196d8acSJiri Slaby static void enable_rsa(struct uart_8250_port *up) 6039196d8acSJiri Slaby { 6049196d8acSJiri Slaby if (up->port.type == PORT_RSA) { 6059196d8acSJiri Slaby if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { 6069196d8acSJiri Slaby spin_lock_irq(&up->port.lock); 6079196d8acSJiri Slaby __enable_rsa(up); 6089196d8acSJiri Slaby spin_unlock_irq(&up->port.lock); 6099196d8acSJiri Slaby } 6109196d8acSJiri Slaby if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) 6119196d8acSJiri Slaby serial_out(up, UART_RSA_FRR, 0); 6129196d8acSJiri Slaby } 6139196d8acSJiri Slaby } 6149196d8acSJiri Slaby 6159196d8acSJiri Slaby /* 6169196d8acSJiri Slaby * Attempts to turn off the RSA FIFO. Returns zero on failure. 6179196d8acSJiri Slaby * It is unknown why interrupts were disabled in here. However, 6189196d8acSJiri Slaby * the caller is expected to preserve this behaviour by grabbing 6199196d8acSJiri Slaby * the spinlock before calling this function. 6209196d8acSJiri Slaby */ 6219196d8acSJiri Slaby static void disable_rsa(struct uart_8250_port *up) 6229196d8acSJiri Slaby { 6239196d8acSJiri Slaby unsigned char mode; 6249196d8acSJiri Slaby int result; 6259196d8acSJiri Slaby 6269196d8acSJiri Slaby if (up->port.type == PORT_RSA && 6279196d8acSJiri Slaby up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { 6289196d8acSJiri Slaby spin_lock_irq(&up->port.lock); 6299196d8acSJiri Slaby 6309196d8acSJiri Slaby mode = serial_in(up, UART_RSA_MSR); 6319196d8acSJiri Slaby result = !(mode & UART_RSA_MSR_FIFO); 6329196d8acSJiri Slaby 6339196d8acSJiri Slaby if (!result) { 6349196d8acSJiri Slaby serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); 6359196d8acSJiri Slaby mode = serial_in(up, UART_RSA_MSR); 6369196d8acSJiri Slaby result = !(mode & UART_RSA_MSR_FIFO); 6379196d8acSJiri Slaby } 6389196d8acSJiri Slaby 6399196d8acSJiri Slaby if (result) 6409196d8acSJiri Slaby up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; 6419196d8acSJiri Slaby spin_unlock_irq(&up->port.lock); 6429196d8acSJiri Slaby } 6439196d8acSJiri Slaby } 6449196d8acSJiri Slaby #endif /* CONFIG_SERIAL_8250_RSA */ 6459196d8acSJiri Slaby 6469196d8acSJiri Slaby /* 6479196d8acSJiri Slaby * This is a quickie test to see how big the FIFO is. 6489196d8acSJiri Slaby * It doesn't work at all the time, more's the pity. 6499196d8acSJiri Slaby */ 6509196d8acSJiri Slaby static int size_fifo(struct uart_8250_port *up) 6519196d8acSJiri Slaby { 6529196d8acSJiri Slaby unsigned char old_fcr, old_mcr, old_lcr; 6539196d8acSJiri Slaby unsigned short old_dl; 6549196d8acSJiri Slaby int count; 6559196d8acSJiri Slaby 6569196d8acSJiri Slaby old_lcr = serial_in(up, UART_LCR); 6579196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 6589196d8acSJiri Slaby old_fcr = serial_in(up, UART_FCR); 6599196d8acSJiri Slaby old_mcr = serial_in(up, UART_MCR); 6609196d8acSJiri Slaby serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 6619196d8acSJiri Slaby UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 6629196d8acSJiri Slaby serial_out(up, UART_MCR, UART_MCR_LOOP); 6639196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 6649196d8acSJiri Slaby old_dl = serial_dl_read(up); 6659196d8acSJiri Slaby serial_dl_write(up, 0x0001); 6669196d8acSJiri Slaby serial_out(up, UART_LCR, 0x03); 6679196d8acSJiri Slaby for (count = 0; count < 256; count++) 6689196d8acSJiri Slaby serial_out(up, UART_TX, count); 6699196d8acSJiri Slaby mdelay(20);/* FIXME - schedule_timeout */ 6709196d8acSJiri Slaby for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) && 6719196d8acSJiri Slaby (count < 256); count++) 6729196d8acSJiri Slaby serial_in(up, UART_RX); 6739196d8acSJiri Slaby serial_out(up, UART_FCR, old_fcr); 6749196d8acSJiri Slaby serial_out(up, UART_MCR, old_mcr); 6759196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 6769196d8acSJiri Slaby serial_dl_write(up, old_dl); 6779196d8acSJiri Slaby serial_out(up, UART_LCR, old_lcr); 6789196d8acSJiri Slaby 6799196d8acSJiri Slaby return count; 6809196d8acSJiri Slaby } 6819196d8acSJiri Slaby 6829196d8acSJiri Slaby /* 6839196d8acSJiri Slaby * Read UART ID using the divisor method - set DLL and DLM to zero 6849196d8acSJiri Slaby * and the revision will be in DLL and device type in DLM. We 6859196d8acSJiri Slaby * preserve the device state across this. 6869196d8acSJiri Slaby */ 6879196d8acSJiri Slaby static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p) 6889196d8acSJiri Slaby { 6899196d8acSJiri Slaby unsigned char old_dll, old_dlm, old_lcr; 6909196d8acSJiri Slaby unsigned int id; 6919196d8acSJiri Slaby 6929196d8acSJiri Slaby old_lcr = serial_in(p, UART_LCR); 6939196d8acSJiri Slaby serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A); 6949196d8acSJiri Slaby 6959196d8acSJiri Slaby old_dll = serial_in(p, UART_DLL); 6969196d8acSJiri Slaby old_dlm = serial_in(p, UART_DLM); 6979196d8acSJiri Slaby 6989196d8acSJiri Slaby serial_out(p, UART_DLL, 0); 6999196d8acSJiri Slaby serial_out(p, UART_DLM, 0); 7009196d8acSJiri Slaby 7019196d8acSJiri Slaby id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8; 7029196d8acSJiri Slaby 7039196d8acSJiri Slaby serial_out(p, UART_DLL, old_dll); 7049196d8acSJiri Slaby serial_out(p, UART_DLM, old_dlm); 7059196d8acSJiri Slaby serial_out(p, UART_LCR, old_lcr); 7069196d8acSJiri Slaby 7079196d8acSJiri Slaby return id; 7089196d8acSJiri Slaby } 7099196d8acSJiri Slaby 7109196d8acSJiri Slaby /* 7119196d8acSJiri Slaby * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's. 7129196d8acSJiri Slaby * When this function is called we know it is at least a StarTech 7139196d8acSJiri Slaby * 16650 V2, but it might be one of several StarTech UARTs, or one of 7149196d8acSJiri Slaby * its clones. (We treat the broken original StarTech 16650 V1 as a 7159196d8acSJiri Slaby * 16550, and why not? Startech doesn't seem to even acknowledge its 7169196d8acSJiri Slaby * existence.) 7179196d8acSJiri Slaby * 7189196d8acSJiri Slaby * What evil have men's minds wrought... 7199196d8acSJiri Slaby */ 7209196d8acSJiri Slaby static void autoconfig_has_efr(struct uart_8250_port *up) 7219196d8acSJiri Slaby { 7229196d8acSJiri Slaby unsigned int id1, id2, id3, rev; 7239196d8acSJiri Slaby 7249196d8acSJiri Slaby /* 7259196d8acSJiri Slaby * Everything with an EFR has SLEEP 7269196d8acSJiri Slaby */ 7279196d8acSJiri Slaby up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; 7289196d8acSJiri Slaby 7299196d8acSJiri Slaby /* 7309196d8acSJiri Slaby * First we check to see if it's an Oxford Semiconductor UART. 7319196d8acSJiri Slaby * 7329196d8acSJiri Slaby * If we have to do this here because some non-National 7339196d8acSJiri Slaby * Semiconductor clone chips lock up if you try writing to the 7349196d8acSJiri Slaby * LSR register (which serial_icr_read does) 7359196d8acSJiri Slaby */ 7369196d8acSJiri Slaby 7379196d8acSJiri Slaby /* 7389196d8acSJiri Slaby * Check for Oxford Semiconductor 16C950. 7399196d8acSJiri Slaby * 7409196d8acSJiri Slaby * EFR [4] must be set else this test fails. 7419196d8acSJiri Slaby * 7429196d8acSJiri Slaby * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca) 7439196d8acSJiri Slaby * claims that it's needed for 952 dual UART's (which are not 7449196d8acSJiri Slaby * recommended for new designs). 7459196d8acSJiri Slaby */ 7469196d8acSJiri Slaby up->acr = 0; 7479196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 7489196d8acSJiri Slaby serial_out(up, UART_EFR, UART_EFR_ECB); 7499196d8acSJiri Slaby serial_out(up, UART_LCR, 0x00); 7509196d8acSJiri Slaby id1 = serial_icr_read(up, UART_ID1); 7519196d8acSJiri Slaby id2 = serial_icr_read(up, UART_ID2); 7529196d8acSJiri Slaby id3 = serial_icr_read(up, UART_ID3); 7539196d8acSJiri Slaby rev = serial_icr_read(up, UART_REV); 7549196d8acSJiri Slaby 7559196d8acSJiri Slaby DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev); 7569196d8acSJiri Slaby 7579196d8acSJiri Slaby if (id1 == 0x16 && id2 == 0xC9 && 7589196d8acSJiri Slaby (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) { 7599196d8acSJiri Slaby up->port.type = PORT_16C950; 7609196d8acSJiri Slaby 7619196d8acSJiri Slaby /* 7629196d8acSJiri Slaby * Enable work around for the Oxford Semiconductor 952 rev B 7639196d8acSJiri Slaby * chip which causes it to seriously miscalculate baud rates 7649196d8acSJiri Slaby * when DLL is 0. 7659196d8acSJiri Slaby */ 7669196d8acSJiri Slaby if (id3 == 0x52 && rev == 0x01) 7679196d8acSJiri Slaby up->bugs |= UART_BUG_QUOT; 7689196d8acSJiri Slaby return; 7699196d8acSJiri Slaby } 7709196d8acSJiri Slaby 7719196d8acSJiri Slaby /* 7729196d8acSJiri Slaby * We check for a XR16C850 by setting DLL and DLM to 0, and then 7739196d8acSJiri Slaby * reading back DLL and DLM. The chip type depends on the DLM 7749196d8acSJiri Slaby * value read back: 7759196d8acSJiri Slaby * 0x10 - XR16C850 and the DLL contains the chip revision. 7769196d8acSJiri Slaby * 0x12 - XR16C2850. 7779196d8acSJiri Slaby * 0x14 - XR16C854. 7789196d8acSJiri Slaby */ 7799196d8acSJiri Slaby id1 = autoconfig_read_divisor_id(up); 7809196d8acSJiri Slaby DEBUG_AUTOCONF("850id=%04x ", id1); 7819196d8acSJiri Slaby 7829196d8acSJiri Slaby id2 = id1 >> 8; 7839196d8acSJiri Slaby if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) { 7849196d8acSJiri Slaby up->port.type = PORT_16850; 7859196d8acSJiri Slaby return; 7869196d8acSJiri Slaby } 7879196d8acSJiri Slaby 7889196d8acSJiri Slaby /* 7899196d8acSJiri Slaby * It wasn't an XR16C850. 7909196d8acSJiri Slaby * 7919196d8acSJiri Slaby * We distinguish between the '654 and the '650 by counting 7929196d8acSJiri Slaby * how many bytes are in the FIFO. I'm using this for now, 7939196d8acSJiri Slaby * since that's the technique that was sent to me in the 7949196d8acSJiri Slaby * serial driver update, but I'm not convinced this works. 7959196d8acSJiri Slaby * I've had problems doing this in the past. -TYT 7969196d8acSJiri Slaby */ 7979196d8acSJiri Slaby if (size_fifo(up) == 64) 7989196d8acSJiri Slaby up->port.type = PORT_16654; 7999196d8acSJiri Slaby else 8009196d8acSJiri Slaby up->port.type = PORT_16650V2; 8019196d8acSJiri Slaby } 8029196d8acSJiri Slaby 8039196d8acSJiri Slaby /* 8049196d8acSJiri Slaby * We detected a chip without a FIFO. Only two fall into 8059196d8acSJiri Slaby * this category - the original 8250 and the 16450. The 8069196d8acSJiri Slaby * 16450 has a scratch register (accessible with LCR=0) 8079196d8acSJiri Slaby */ 8089196d8acSJiri Slaby static void autoconfig_8250(struct uart_8250_port *up) 8099196d8acSJiri Slaby { 8109196d8acSJiri Slaby unsigned char scratch, status1, status2; 8119196d8acSJiri Slaby 8129196d8acSJiri Slaby up->port.type = PORT_8250; 8139196d8acSJiri Slaby 8149196d8acSJiri Slaby scratch = serial_in(up, UART_SCR); 8159196d8acSJiri Slaby serial_out(up, UART_SCR, 0xa5); 8169196d8acSJiri Slaby status1 = serial_in(up, UART_SCR); 8179196d8acSJiri Slaby serial_out(up, UART_SCR, 0x5a); 8189196d8acSJiri Slaby status2 = serial_in(up, UART_SCR); 8199196d8acSJiri Slaby serial_out(up, UART_SCR, scratch); 8209196d8acSJiri Slaby 8219196d8acSJiri Slaby if (status1 == 0xa5 && status2 == 0x5a) 8229196d8acSJiri Slaby up->port.type = PORT_16450; 8239196d8acSJiri Slaby } 8249196d8acSJiri Slaby 8259196d8acSJiri Slaby static int broken_efr(struct uart_8250_port *up) 8269196d8acSJiri Slaby { 8279196d8acSJiri Slaby /* 8289196d8acSJiri Slaby * Exar ST16C2550 "A2" devices incorrectly detect as 8299196d8acSJiri Slaby * having an EFR, and report an ID of 0x0201. See 8309196d8acSJiri Slaby * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html 8319196d8acSJiri Slaby */ 8329196d8acSJiri Slaby if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16) 8339196d8acSJiri Slaby return 1; 8349196d8acSJiri Slaby 8359196d8acSJiri Slaby return 0; 8369196d8acSJiri Slaby } 8379196d8acSJiri Slaby 8389196d8acSJiri Slaby static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) 8399196d8acSJiri Slaby { 8409196d8acSJiri Slaby unsigned char status; 8419196d8acSJiri Slaby 8429196d8acSJiri Slaby status = serial_in(up, 0x04); /* EXCR2 */ 8439196d8acSJiri Slaby #define PRESL(x) ((x) & 0x30) 8449196d8acSJiri Slaby if (PRESL(status) == 0x10) { 8459196d8acSJiri Slaby /* already in high speed mode */ 8469196d8acSJiri Slaby return 0; 8479196d8acSJiri Slaby } else { 8489196d8acSJiri Slaby status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 8499196d8acSJiri Slaby status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 8509196d8acSJiri Slaby serial_out(up, 0x04, status); 8519196d8acSJiri Slaby } 8529196d8acSJiri Slaby return 1; 8539196d8acSJiri Slaby } 8549196d8acSJiri Slaby 8559196d8acSJiri Slaby /* 8569196d8acSJiri Slaby * We know that the chip has FIFOs. Does it have an EFR? The 8579196d8acSJiri Slaby * EFR is located in the same register position as the IIR and 8589196d8acSJiri Slaby * we know the top two bits of the IIR are currently set. The 8599196d8acSJiri Slaby * EFR should contain zero. Try to read the EFR. 8609196d8acSJiri Slaby */ 8619196d8acSJiri Slaby static void autoconfig_16550a(struct uart_8250_port *up) 8629196d8acSJiri Slaby { 8639196d8acSJiri Slaby unsigned char status1, status2; 8649196d8acSJiri Slaby unsigned int iersave; 8659196d8acSJiri Slaby 8669196d8acSJiri Slaby up->port.type = PORT_16550A; 8679196d8acSJiri Slaby up->capabilities |= UART_CAP_FIFO; 8689196d8acSJiri Slaby 8699196d8acSJiri Slaby /* 8709196d8acSJiri Slaby * XR17V35x UARTs have an extra divisor register, DLD 8719196d8acSJiri Slaby * that gets enabled with when DLAB is set which will 8729196d8acSJiri Slaby * cause the device to incorrectly match and assign 8739196d8acSJiri Slaby * port type to PORT_16650. The EFR for this UART is 8749196d8acSJiri Slaby * found at offset 0x09. Instead check the Deice ID (DVID) 8759196d8acSJiri Slaby * register for a 2, 4 or 8 port UART. 8769196d8acSJiri Slaby */ 8779196d8acSJiri Slaby if (up->port.flags & UPF_EXAR_EFR) { 8789196d8acSJiri Slaby status1 = serial_in(up, UART_EXAR_DVID); 8799196d8acSJiri Slaby if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) { 8809196d8acSJiri Slaby DEBUG_AUTOCONF("Exar XR17V35x "); 8819196d8acSJiri Slaby up->port.type = PORT_XR17V35X; 8829196d8acSJiri Slaby up->capabilities |= UART_CAP_AFE | UART_CAP_EFR | 8839196d8acSJiri Slaby UART_CAP_SLEEP; 8849196d8acSJiri Slaby 8859196d8acSJiri Slaby return; 8869196d8acSJiri Slaby } 8879196d8acSJiri Slaby 8889196d8acSJiri Slaby } 8899196d8acSJiri Slaby 8909196d8acSJiri Slaby /* 8919196d8acSJiri Slaby * Check for presence of the EFR when DLAB is set. 8929196d8acSJiri Slaby * Only ST16C650V1 UARTs pass this test. 8939196d8acSJiri Slaby */ 8949196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 8959196d8acSJiri Slaby if (serial_in(up, UART_EFR) == 0) { 8969196d8acSJiri Slaby serial_out(up, UART_EFR, 0xA8); 8979196d8acSJiri Slaby if (serial_in(up, UART_EFR) != 0) { 8989196d8acSJiri Slaby DEBUG_AUTOCONF("EFRv1 "); 8999196d8acSJiri Slaby up->port.type = PORT_16650; 9009196d8acSJiri Slaby up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; 9019196d8acSJiri Slaby } else { 9029196d8acSJiri Slaby DEBUG_AUTOCONF("Motorola 8xxx DUART "); 9039196d8acSJiri Slaby } 9049196d8acSJiri Slaby serial_out(up, UART_EFR, 0); 9059196d8acSJiri Slaby return; 9069196d8acSJiri Slaby } 9079196d8acSJiri Slaby 9089196d8acSJiri Slaby /* 9099196d8acSJiri Slaby * Maybe it requires 0xbf to be written to the LCR. 9109196d8acSJiri Slaby * (other ST16C650V2 UARTs, TI16C752A, etc) 9119196d8acSJiri Slaby */ 9129196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 9139196d8acSJiri Slaby if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { 9149196d8acSJiri Slaby DEBUG_AUTOCONF("EFRv2 "); 9159196d8acSJiri Slaby autoconfig_has_efr(up); 9169196d8acSJiri Slaby return; 9179196d8acSJiri Slaby } 9189196d8acSJiri Slaby 9199196d8acSJiri Slaby /* 9209196d8acSJiri Slaby * Check for a National Semiconductor SuperIO chip. 9219196d8acSJiri Slaby * Attempt to switch to bank 2, read the value of the LOOP bit 9229196d8acSJiri Slaby * from EXCR1. Switch back to bank 0, change it in MCR. Then 9239196d8acSJiri Slaby * switch back to bank 2, read it from EXCR1 again and check 9249196d8acSJiri Slaby * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 9259196d8acSJiri Slaby */ 9269196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 9279196d8acSJiri Slaby status1 = serial_in(up, UART_MCR); 9289196d8acSJiri Slaby serial_out(up, UART_LCR, 0xE0); 9299196d8acSJiri Slaby status2 = serial_in(up, 0x02); /* EXCR1 */ 9309196d8acSJiri Slaby 9319196d8acSJiri Slaby if (!((status2 ^ status1) & UART_MCR_LOOP)) { 9329196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 9339196d8acSJiri Slaby serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP); 9349196d8acSJiri Slaby serial_out(up, UART_LCR, 0xE0); 9359196d8acSJiri Slaby status2 = serial_in(up, 0x02); /* EXCR1 */ 9369196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 9379196d8acSJiri Slaby serial_out(up, UART_MCR, status1); 9389196d8acSJiri Slaby 9399196d8acSJiri Slaby if ((status2 ^ status1) & UART_MCR_LOOP) { 9409196d8acSJiri Slaby unsigned short quot; 9419196d8acSJiri Slaby 9429196d8acSJiri Slaby serial_out(up, UART_LCR, 0xE0); 9439196d8acSJiri Slaby 9449196d8acSJiri Slaby quot = serial_dl_read(up); 9459196d8acSJiri Slaby quot <<= 3; 9469196d8acSJiri Slaby 9479196d8acSJiri Slaby if (ns16550a_goto_highspeed(up)) 9489196d8acSJiri Slaby serial_dl_write(up, quot); 9499196d8acSJiri Slaby 9509196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 9519196d8acSJiri Slaby 9529196d8acSJiri Slaby up->port.uartclk = 921600*16; 9539196d8acSJiri Slaby up->port.type = PORT_NS16550A; 9549196d8acSJiri Slaby up->capabilities |= UART_NATSEMI; 9559196d8acSJiri Slaby return; 9569196d8acSJiri Slaby } 9579196d8acSJiri Slaby } 9589196d8acSJiri Slaby 9599196d8acSJiri Slaby /* 9609196d8acSJiri Slaby * No EFR. Try to detect a TI16750, which only sets bit 5 of 9619196d8acSJiri Slaby * the IIR when 64 byte FIFO mode is enabled when DLAB is set. 9629196d8acSJiri Slaby * Try setting it with and without DLAB set. Cheap clones 9639196d8acSJiri Slaby * set bit 5 without DLAB set. 9649196d8acSJiri Slaby */ 9659196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 9669196d8acSJiri Slaby serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 9679196d8acSJiri Slaby status1 = serial_in(up, UART_IIR) >> 5; 9689196d8acSJiri Slaby serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 9699196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 9709196d8acSJiri Slaby serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 9719196d8acSJiri Slaby status2 = serial_in(up, UART_IIR) >> 5; 9729196d8acSJiri Slaby serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 9739196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 9749196d8acSJiri Slaby 9759196d8acSJiri Slaby DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2); 9769196d8acSJiri Slaby 9779196d8acSJiri Slaby if (status1 == 6 && status2 == 7) { 9789196d8acSJiri Slaby up->port.type = PORT_16750; 9799196d8acSJiri Slaby up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP; 9809196d8acSJiri Slaby return; 9819196d8acSJiri Slaby } 9829196d8acSJiri Slaby 9839196d8acSJiri Slaby /* 9849196d8acSJiri Slaby * Try writing and reading the UART_IER_UUE bit (b6). 9859196d8acSJiri Slaby * If it works, this is probably one of the Xscale platform's 9869196d8acSJiri Slaby * internal UARTs. 9879196d8acSJiri Slaby * We're going to explicitly set the UUE bit to 0 before 9889196d8acSJiri Slaby * trying to write and read a 1 just to make sure it's not 9899196d8acSJiri Slaby * already a 1 and maybe locked there before we even start start. 9909196d8acSJiri Slaby */ 9919196d8acSJiri Slaby iersave = serial_in(up, UART_IER); 9929196d8acSJiri Slaby serial_out(up, UART_IER, iersave & ~UART_IER_UUE); 9939196d8acSJiri Slaby if (!(serial_in(up, UART_IER) & UART_IER_UUE)) { 9949196d8acSJiri Slaby /* 9959196d8acSJiri Slaby * OK it's in a known zero state, try writing and reading 9969196d8acSJiri Slaby * without disturbing the current state of the other bits. 9979196d8acSJiri Slaby */ 9989196d8acSJiri Slaby serial_out(up, UART_IER, iersave | UART_IER_UUE); 9999196d8acSJiri Slaby if (serial_in(up, UART_IER) & UART_IER_UUE) { 10009196d8acSJiri Slaby /* 10019196d8acSJiri Slaby * It's an Xscale. 10029196d8acSJiri Slaby * We'll leave the UART_IER_UUE bit set to 1 (enabled). 10039196d8acSJiri Slaby */ 10049196d8acSJiri Slaby DEBUG_AUTOCONF("Xscale "); 10059196d8acSJiri Slaby up->port.type = PORT_XSCALE; 10069196d8acSJiri Slaby up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE; 10079196d8acSJiri Slaby return; 10089196d8acSJiri Slaby } 10099196d8acSJiri Slaby } else { 10109196d8acSJiri Slaby /* 10119196d8acSJiri Slaby * If we got here we couldn't force the IER_UUE bit to 0. 10129196d8acSJiri Slaby * Log it and continue. 10139196d8acSJiri Slaby */ 10149196d8acSJiri Slaby DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 "); 10159196d8acSJiri Slaby } 10169196d8acSJiri Slaby serial_out(up, UART_IER, iersave); 10179196d8acSJiri Slaby 10189196d8acSJiri Slaby /* 10199196d8acSJiri Slaby * Exar uarts have EFR in a weird location 10209196d8acSJiri Slaby */ 10219196d8acSJiri Slaby if (up->port.flags & UPF_EXAR_EFR) { 10229196d8acSJiri Slaby DEBUG_AUTOCONF("Exar XR17D15x "); 10239196d8acSJiri Slaby up->port.type = PORT_XR17D15X; 10249196d8acSJiri Slaby up->capabilities |= UART_CAP_AFE | UART_CAP_EFR | 10259196d8acSJiri Slaby UART_CAP_SLEEP; 10269196d8acSJiri Slaby 10279196d8acSJiri Slaby return; 10289196d8acSJiri Slaby } 10299196d8acSJiri Slaby 10309196d8acSJiri Slaby /* 10319196d8acSJiri Slaby * We distinguish between 16550A and U6 16550A by counting 10329196d8acSJiri Slaby * how many bytes are in the FIFO. 10339196d8acSJiri Slaby */ 10349196d8acSJiri Slaby if (up->port.type == PORT_16550A && size_fifo(up) == 64) { 10359196d8acSJiri Slaby up->port.type = PORT_U6_16550A; 10369196d8acSJiri Slaby up->capabilities |= UART_CAP_AFE; 10379196d8acSJiri Slaby } 10389196d8acSJiri Slaby } 10399196d8acSJiri Slaby 10409196d8acSJiri Slaby /* 10419196d8acSJiri Slaby * This routine is called by rs_init() to initialize a specific serial 10429196d8acSJiri Slaby * port. It determines what type of UART chip this serial port is 10439196d8acSJiri Slaby * using: 8250, 16450, 16550, 16550A. The important question is 10449196d8acSJiri Slaby * whether or not this UART is a 16550A or not, since this will 10459196d8acSJiri Slaby * determine whether or not we can use its FIFO features or not. 10469196d8acSJiri Slaby */ 10479196d8acSJiri Slaby static void autoconfig(struct uart_8250_port *up, unsigned int probeflags) 10489196d8acSJiri Slaby { 10499196d8acSJiri Slaby unsigned char status1, scratch, scratch2, scratch3; 10509196d8acSJiri Slaby unsigned char save_lcr, save_mcr; 10519196d8acSJiri Slaby struct uart_port *port = &up->port; 10529196d8acSJiri Slaby unsigned long flags; 10539196d8acSJiri Slaby unsigned int old_capabilities; 10549196d8acSJiri Slaby 10559196d8acSJiri Slaby if (!port->iobase && !port->mapbase && !port->membase) 10569196d8acSJiri Slaby return; 10579196d8acSJiri Slaby 10589196d8acSJiri Slaby DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ", 10599196d8acSJiri Slaby serial_index(port), port->iobase, port->membase); 10609196d8acSJiri Slaby 10619196d8acSJiri Slaby /* 10629196d8acSJiri Slaby * We really do need global IRQs disabled here - we're going to 10639196d8acSJiri Slaby * be frobbing the chips IRQ enable register to see if it exists. 10649196d8acSJiri Slaby */ 10659196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 10669196d8acSJiri Slaby 10679196d8acSJiri Slaby up->capabilities = 0; 10689196d8acSJiri Slaby up->bugs = 0; 10699196d8acSJiri Slaby 10709196d8acSJiri Slaby if (!(port->flags & UPF_BUGGY_UART)) { 10719196d8acSJiri Slaby /* 10729196d8acSJiri Slaby * Do a simple existence test first; if we fail this, 10739196d8acSJiri Slaby * there's no point trying anything else. 10749196d8acSJiri Slaby * 10759196d8acSJiri Slaby * 0x80 is used as a nonsense port to prevent against 10769196d8acSJiri Slaby * false positives due to ISA bus float. The 10779196d8acSJiri Slaby * assumption is that 0x80 is a non-existent port; 10789196d8acSJiri Slaby * which should be safe since include/asm/io.h also 10799196d8acSJiri Slaby * makes this assumption. 10809196d8acSJiri Slaby * 10819196d8acSJiri Slaby * Note: this is safe as long as MCR bit 4 is clear 10829196d8acSJiri Slaby * and the device is in "PC" mode. 10839196d8acSJiri Slaby */ 10849196d8acSJiri Slaby scratch = serial_in(up, UART_IER); 10859196d8acSJiri Slaby serial_out(up, UART_IER, 0); 10869196d8acSJiri Slaby #ifdef __i386__ 10879196d8acSJiri Slaby outb(0xff, 0x080); 10889196d8acSJiri Slaby #endif 10899196d8acSJiri Slaby /* 10909196d8acSJiri Slaby * Mask out IER[7:4] bits for test as some UARTs (e.g. TL 10919196d8acSJiri Slaby * 16C754B) allow only to modify them if an EFR bit is set. 10929196d8acSJiri Slaby */ 10939196d8acSJiri Slaby scratch2 = serial_in(up, UART_IER) & 0x0f; 10949196d8acSJiri Slaby serial_out(up, UART_IER, 0x0F); 10959196d8acSJiri Slaby #ifdef __i386__ 10969196d8acSJiri Slaby outb(0, 0x080); 10979196d8acSJiri Slaby #endif 10989196d8acSJiri Slaby scratch3 = serial_in(up, UART_IER) & 0x0f; 10999196d8acSJiri Slaby serial_out(up, UART_IER, scratch); 11009196d8acSJiri Slaby if (scratch2 != 0 || scratch3 != 0x0F) { 11019196d8acSJiri Slaby /* 11029196d8acSJiri Slaby * We failed; there's nothing here 11039196d8acSJiri Slaby */ 11049196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 11059196d8acSJiri Slaby DEBUG_AUTOCONF("IER test failed (%02x, %02x) ", 11069196d8acSJiri Slaby scratch2, scratch3); 11079196d8acSJiri Slaby goto out; 11089196d8acSJiri Slaby } 11099196d8acSJiri Slaby } 11109196d8acSJiri Slaby 11119196d8acSJiri Slaby save_mcr = serial_in(up, UART_MCR); 11129196d8acSJiri Slaby save_lcr = serial_in(up, UART_LCR); 11139196d8acSJiri Slaby 11149196d8acSJiri Slaby /* 11159196d8acSJiri Slaby * Check to see if a UART is really there. Certain broken 11169196d8acSJiri Slaby * internal modems based on the Rockwell chipset fail this 11179196d8acSJiri Slaby * test, because they apparently don't implement the loopback 11189196d8acSJiri Slaby * test mode. So this test is skipped on the COM 1 through 11199196d8acSJiri Slaby * COM 4 ports. This *should* be safe, since no board 11209196d8acSJiri Slaby * manufacturer would be stupid enough to design a board 11219196d8acSJiri Slaby * that conflicts with COM 1-4 --- we hope! 11229196d8acSJiri Slaby */ 11239196d8acSJiri Slaby if (!(port->flags & UPF_SKIP_TEST)) { 11249196d8acSJiri Slaby serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A); 11259196d8acSJiri Slaby status1 = serial_in(up, UART_MSR) & 0xF0; 11269196d8acSJiri Slaby serial_out(up, UART_MCR, save_mcr); 11279196d8acSJiri Slaby if (status1 != 0x90) { 11289196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 11299196d8acSJiri Slaby DEBUG_AUTOCONF("LOOP test failed (%02x) ", 11309196d8acSJiri Slaby status1); 11319196d8acSJiri Slaby goto out; 11329196d8acSJiri Slaby } 11339196d8acSJiri Slaby } 11349196d8acSJiri Slaby 11359196d8acSJiri Slaby /* 11369196d8acSJiri Slaby * We're pretty sure there's a port here. Lets find out what 11379196d8acSJiri Slaby * type of port it is. The IIR top two bits allows us to find 11389196d8acSJiri Slaby * out if it's 8250 or 16450, 16550, 16550A or later. This 11399196d8acSJiri Slaby * determines what we test for next. 11409196d8acSJiri Slaby * 11419196d8acSJiri Slaby * We also initialise the EFR (if any) to zero for later. The 11429196d8acSJiri Slaby * EFR occupies the same register location as the FCR and IIR. 11439196d8acSJiri Slaby */ 11449196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 11459196d8acSJiri Slaby serial_out(up, UART_EFR, 0); 11469196d8acSJiri Slaby serial_out(up, UART_LCR, 0); 11479196d8acSJiri Slaby 11489196d8acSJiri Slaby serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 11499196d8acSJiri Slaby scratch = serial_in(up, UART_IIR) >> 6; 11509196d8acSJiri Slaby 11519196d8acSJiri Slaby switch (scratch) { 11529196d8acSJiri Slaby case 0: 11539196d8acSJiri Slaby autoconfig_8250(up); 11549196d8acSJiri Slaby break; 11559196d8acSJiri Slaby case 1: 11569196d8acSJiri Slaby port->type = PORT_UNKNOWN; 11579196d8acSJiri Slaby break; 11589196d8acSJiri Slaby case 2: 11599196d8acSJiri Slaby port->type = PORT_16550; 11609196d8acSJiri Slaby break; 11619196d8acSJiri Slaby case 3: 11629196d8acSJiri Slaby autoconfig_16550a(up); 11639196d8acSJiri Slaby break; 11649196d8acSJiri Slaby } 11659196d8acSJiri Slaby 11669196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 11679196d8acSJiri Slaby /* 11689196d8acSJiri Slaby * Only probe for RSA ports if we got the region. 11699196d8acSJiri Slaby */ 11709196d8acSJiri Slaby if (port->type == PORT_16550A && probeflags & PROBE_RSA) { 11719196d8acSJiri Slaby int i; 11729196d8acSJiri Slaby 11739196d8acSJiri Slaby for (i = 0 ; i < probe_rsa_count; ++i) { 11749196d8acSJiri Slaby if (probe_rsa[i] == port->iobase && __enable_rsa(up)) { 11759196d8acSJiri Slaby port->type = PORT_RSA; 11769196d8acSJiri Slaby break; 11779196d8acSJiri Slaby } 11789196d8acSJiri Slaby } 11799196d8acSJiri Slaby } 11809196d8acSJiri Slaby #endif 11819196d8acSJiri Slaby 11829196d8acSJiri Slaby serial_out(up, UART_LCR, save_lcr); 11839196d8acSJiri Slaby 11849196d8acSJiri Slaby port->fifosize = uart_config[up->port.type].fifo_size; 11859196d8acSJiri Slaby old_capabilities = up->capabilities; 11869196d8acSJiri Slaby up->capabilities = uart_config[port->type].flags; 11879196d8acSJiri Slaby up->tx_loadsz = uart_config[port->type].tx_loadsz; 11889196d8acSJiri Slaby 11899196d8acSJiri Slaby if (port->type == PORT_UNKNOWN) 11909196d8acSJiri Slaby goto out_lock; 11919196d8acSJiri Slaby 11929196d8acSJiri Slaby /* 11939196d8acSJiri Slaby * Reset the UART. 11949196d8acSJiri Slaby */ 11959196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 11969196d8acSJiri Slaby if (port->type == PORT_RSA) 11979196d8acSJiri Slaby serial_out(up, UART_RSA_FRR, 0); 11989196d8acSJiri Slaby #endif 11999196d8acSJiri Slaby serial_out(up, UART_MCR, save_mcr); 12009196d8acSJiri Slaby serial8250_clear_fifos(up); 12019196d8acSJiri Slaby serial_in(up, UART_RX); 12029196d8acSJiri Slaby if (up->capabilities & UART_CAP_UUE) 12039196d8acSJiri Slaby serial_out(up, UART_IER, UART_IER_UUE); 12049196d8acSJiri Slaby else 12059196d8acSJiri Slaby serial_out(up, UART_IER, 0); 12069196d8acSJiri Slaby 12079196d8acSJiri Slaby out_lock: 12089196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 12099196d8acSJiri Slaby if (up->capabilities != old_capabilities) { 12109196d8acSJiri Slaby printk(KERN_WARNING 12119196d8acSJiri Slaby "ttyS%d: detected caps %08x should be %08x\n", 12129196d8acSJiri Slaby serial_index(port), old_capabilities, 12139196d8acSJiri Slaby up->capabilities); 12149196d8acSJiri Slaby } 12159196d8acSJiri Slaby out: 12169196d8acSJiri Slaby DEBUG_AUTOCONF("iir=%d ", scratch); 12179196d8acSJiri Slaby DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name); 12189196d8acSJiri Slaby } 12199196d8acSJiri Slaby 12209196d8acSJiri Slaby static void autoconfig_irq(struct uart_8250_port *up) 12219196d8acSJiri Slaby { 12229196d8acSJiri Slaby struct uart_port *port = &up->port; 12239196d8acSJiri Slaby unsigned char save_mcr, save_ier; 12249196d8acSJiri Slaby unsigned char save_ICP = 0; 12259196d8acSJiri Slaby unsigned int ICP = 0; 12269196d8acSJiri Slaby unsigned long irqs; 12279196d8acSJiri Slaby int irq; 12289196d8acSJiri Slaby 12299196d8acSJiri Slaby if (port->flags & UPF_FOURPORT) { 12309196d8acSJiri Slaby ICP = (port->iobase & 0xfe0) | 0x1f; 12319196d8acSJiri Slaby save_ICP = inb_p(ICP); 12329196d8acSJiri Slaby outb_p(0x80, ICP); 12339196d8acSJiri Slaby inb_p(ICP); 12349196d8acSJiri Slaby } 12359196d8acSJiri Slaby 12369196d8acSJiri Slaby /* forget possible initially masked and pending IRQ */ 12379196d8acSJiri Slaby probe_irq_off(probe_irq_on()); 12389196d8acSJiri Slaby save_mcr = serial_in(up, UART_MCR); 12399196d8acSJiri Slaby save_ier = serial_in(up, UART_IER); 12409196d8acSJiri Slaby serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2); 12419196d8acSJiri Slaby 12429196d8acSJiri Slaby irqs = probe_irq_on(); 12439196d8acSJiri Slaby serial_out(up, UART_MCR, 0); 12449196d8acSJiri Slaby udelay(10); 12459196d8acSJiri Slaby if (port->flags & UPF_FOURPORT) { 12469196d8acSJiri Slaby serial_out(up, UART_MCR, 12479196d8acSJiri Slaby UART_MCR_DTR | UART_MCR_RTS); 12489196d8acSJiri Slaby } else { 12499196d8acSJiri Slaby serial_out(up, UART_MCR, 12509196d8acSJiri Slaby UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2); 12519196d8acSJiri Slaby } 12529196d8acSJiri Slaby serial_out(up, UART_IER, 0x0f); /* enable all intrs */ 12539196d8acSJiri Slaby serial_in(up, UART_LSR); 12549196d8acSJiri Slaby serial_in(up, UART_RX); 12559196d8acSJiri Slaby serial_in(up, UART_IIR); 12569196d8acSJiri Slaby serial_in(up, UART_MSR); 12579196d8acSJiri Slaby serial_out(up, UART_TX, 0xFF); 12589196d8acSJiri Slaby udelay(20); 12599196d8acSJiri Slaby irq = probe_irq_off(irqs); 12609196d8acSJiri Slaby 12619196d8acSJiri Slaby serial_out(up, UART_MCR, save_mcr); 12629196d8acSJiri Slaby serial_out(up, UART_IER, save_ier); 12639196d8acSJiri Slaby 12649196d8acSJiri Slaby if (port->flags & UPF_FOURPORT) 12659196d8acSJiri Slaby outb_p(save_ICP, ICP); 12669196d8acSJiri Slaby 12679196d8acSJiri Slaby port->irq = (irq > 0) ? irq : 0; 12689196d8acSJiri Slaby } 12699196d8acSJiri Slaby 12709196d8acSJiri Slaby static inline void __stop_tx(struct uart_8250_port *p) 12719196d8acSJiri Slaby { 12729196d8acSJiri Slaby if (p->ier & UART_IER_THRI) { 12739196d8acSJiri Slaby p->ier &= ~UART_IER_THRI; 12749196d8acSJiri Slaby serial_out(p, UART_IER, p->ier); 12759196d8acSJiri Slaby } 12769196d8acSJiri Slaby } 12779196d8acSJiri Slaby 12789196d8acSJiri Slaby static void serial8250_stop_tx(struct uart_port *port) 12799196d8acSJiri Slaby { 12809196d8acSJiri Slaby struct uart_8250_port *up = 12819196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 12829196d8acSJiri Slaby 12839196d8acSJiri Slaby __stop_tx(up); 12849196d8acSJiri Slaby 12859196d8acSJiri Slaby /* 12869196d8acSJiri Slaby * We really want to stop the transmitter from sending. 12879196d8acSJiri Slaby */ 12889196d8acSJiri Slaby if (port->type == PORT_16C950) { 12899196d8acSJiri Slaby up->acr |= UART_ACR_TXDIS; 12909196d8acSJiri Slaby serial_icr_write(up, UART_ACR, up->acr); 12919196d8acSJiri Slaby } 12929196d8acSJiri Slaby } 12939196d8acSJiri Slaby 12949196d8acSJiri Slaby static void serial8250_start_tx(struct uart_port *port) 12959196d8acSJiri Slaby { 12969196d8acSJiri Slaby struct uart_8250_port *up = 12979196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 12989196d8acSJiri Slaby 12999196d8acSJiri Slaby if (up->dma && !serial8250_tx_dma(up)) { 13009196d8acSJiri Slaby return; 13019196d8acSJiri Slaby } else if (!(up->ier & UART_IER_THRI)) { 13029196d8acSJiri Slaby up->ier |= UART_IER_THRI; 13039196d8acSJiri Slaby serial_port_out(port, UART_IER, up->ier); 13049196d8acSJiri Slaby 13059196d8acSJiri Slaby if (up->bugs & UART_BUG_TXEN) { 13069196d8acSJiri Slaby unsigned char lsr; 13079196d8acSJiri Slaby lsr = serial_in(up, UART_LSR); 13089196d8acSJiri Slaby up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 13099196d8acSJiri Slaby if (lsr & UART_LSR_TEMT) 13109196d8acSJiri Slaby serial8250_tx_chars(up); 13119196d8acSJiri Slaby } 13129196d8acSJiri Slaby } 13139196d8acSJiri Slaby 13149196d8acSJiri Slaby /* 13159196d8acSJiri Slaby * Re-enable the transmitter if we disabled it. 13169196d8acSJiri Slaby */ 13179196d8acSJiri Slaby if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { 13189196d8acSJiri Slaby up->acr &= ~UART_ACR_TXDIS; 13199196d8acSJiri Slaby serial_icr_write(up, UART_ACR, up->acr); 13209196d8acSJiri Slaby } 13219196d8acSJiri Slaby } 13229196d8acSJiri Slaby 13239196d8acSJiri Slaby static void serial8250_stop_rx(struct uart_port *port) 13249196d8acSJiri Slaby { 13259196d8acSJiri Slaby struct uart_8250_port *up = 13269196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 13279196d8acSJiri Slaby 13289196d8acSJiri Slaby up->ier &= ~UART_IER_RLSI; 13299196d8acSJiri Slaby up->port.read_status_mask &= ~UART_LSR_DR; 13309196d8acSJiri Slaby serial_port_out(port, UART_IER, up->ier); 13319196d8acSJiri Slaby } 13329196d8acSJiri Slaby 13339196d8acSJiri Slaby static void serial8250_enable_ms(struct uart_port *port) 13349196d8acSJiri Slaby { 13359196d8acSJiri Slaby struct uart_8250_port *up = 13369196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 13379196d8acSJiri Slaby 13389196d8acSJiri Slaby /* no MSR capabilities */ 13399196d8acSJiri Slaby if (up->bugs & UART_BUG_NOMSR) 13409196d8acSJiri Slaby return; 13419196d8acSJiri Slaby 13429196d8acSJiri Slaby up->ier |= UART_IER_MSI; 13439196d8acSJiri Slaby serial_port_out(port, UART_IER, up->ier); 13449196d8acSJiri Slaby } 13459196d8acSJiri Slaby 13469196d8acSJiri Slaby /* 13479196d8acSJiri Slaby * serial8250_rx_chars: processes according to the passed in LSR 13489196d8acSJiri Slaby * value, and returns the remaining LSR bits not handled 13499196d8acSJiri Slaby * by this Rx routine. 13509196d8acSJiri Slaby */ 13519196d8acSJiri Slaby unsigned char 13529196d8acSJiri Slaby serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr) 13539196d8acSJiri Slaby { 13549196d8acSJiri Slaby struct uart_port *port = &up->port; 13559196d8acSJiri Slaby unsigned char ch; 13569196d8acSJiri Slaby int max_count = 256; 13579196d8acSJiri Slaby char flag; 13589196d8acSJiri Slaby 13599196d8acSJiri Slaby do { 13609196d8acSJiri Slaby if (likely(lsr & UART_LSR_DR)) 13619196d8acSJiri Slaby ch = serial_in(up, UART_RX); 13629196d8acSJiri Slaby else 13639196d8acSJiri Slaby /* 13649196d8acSJiri Slaby * Intel 82571 has a Serial Over Lan device that will 13659196d8acSJiri Slaby * set UART_LSR_BI without setting UART_LSR_DR when 13669196d8acSJiri Slaby * it receives a break. To avoid reading from the 13679196d8acSJiri Slaby * receive buffer without UART_LSR_DR bit set, we 13689196d8acSJiri Slaby * just force the read character to be 0 13699196d8acSJiri Slaby */ 13709196d8acSJiri Slaby ch = 0; 13719196d8acSJiri Slaby 13729196d8acSJiri Slaby flag = TTY_NORMAL; 13739196d8acSJiri Slaby port->icount.rx++; 13749196d8acSJiri Slaby 13759196d8acSJiri Slaby lsr |= up->lsr_saved_flags; 13769196d8acSJiri Slaby up->lsr_saved_flags = 0; 13779196d8acSJiri Slaby 13789196d8acSJiri Slaby if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) { 13799196d8acSJiri Slaby if (lsr & UART_LSR_BI) { 13809196d8acSJiri Slaby lsr &= ~(UART_LSR_FE | UART_LSR_PE); 13819196d8acSJiri Slaby port->icount.brk++; 13829196d8acSJiri Slaby /* 13839196d8acSJiri Slaby * We do the SysRQ and SAK checking 13849196d8acSJiri Slaby * here because otherwise the break 13859196d8acSJiri Slaby * may get masked by ignore_status_mask 13869196d8acSJiri Slaby * or read_status_mask. 13879196d8acSJiri Slaby */ 13889196d8acSJiri Slaby if (uart_handle_break(port)) 13899196d8acSJiri Slaby goto ignore_char; 13909196d8acSJiri Slaby } else if (lsr & UART_LSR_PE) 13919196d8acSJiri Slaby port->icount.parity++; 13929196d8acSJiri Slaby else if (lsr & UART_LSR_FE) 13939196d8acSJiri Slaby port->icount.frame++; 13949196d8acSJiri Slaby if (lsr & UART_LSR_OE) 13959196d8acSJiri Slaby port->icount.overrun++; 13969196d8acSJiri Slaby 13979196d8acSJiri Slaby /* 13989196d8acSJiri Slaby * Mask off conditions which should be ignored. 13999196d8acSJiri Slaby */ 14009196d8acSJiri Slaby lsr &= port->read_status_mask; 14019196d8acSJiri Slaby 14029196d8acSJiri Slaby if (lsr & UART_LSR_BI) { 14039196d8acSJiri Slaby DEBUG_INTR("handling break...."); 14049196d8acSJiri Slaby flag = TTY_BREAK; 14059196d8acSJiri Slaby } else if (lsr & UART_LSR_PE) 14069196d8acSJiri Slaby flag = TTY_PARITY; 14079196d8acSJiri Slaby else if (lsr & UART_LSR_FE) 14089196d8acSJiri Slaby flag = TTY_FRAME; 14099196d8acSJiri Slaby } 14109196d8acSJiri Slaby if (uart_handle_sysrq_char(port, ch)) 14119196d8acSJiri Slaby goto ignore_char; 14129196d8acSJiri Slaby 14139196d8acSJiri Slaby uart_insert_char(port, lsr, UART_LSR_OE, ch, flag); 14149196d8acSJiri Slaby 14159196d8acSJiri Slaby ignore_char: 14169196d8acSJiri Slaby lsr = serial_in(up, UART_LSR); 14179196d8acSJiri Slaby } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0)); 14189196d8acSJiri Slaby spin_unlock(&port->lock); 14199196d8acSJiri Slaby tty_flip_buffer_push(&port->state->port); 14209196d8acSJiri Slaby spin_lock(&port->lock); 14219196d8acSJiri Slaby return lsr; 14229196d8acSJiri Slaby } 14239196d8acSJiri Slaby EXPORT_SYMBOL_GPL(serial8250_rx_chars); 14249196d8acSJiri Slaby 14259196d8acSJiri Slaby void serial8250_tx_chars(struct uart_8250_port *up) 14269196d8acSJiri Slaby { 14279196d8acSJiri Slaby struct uart_port *port = &up->port; 14289196d8acSJiri Slaby struct circ_buf *xmit = &port->state->xmit; 14299196d8acSJiri Slaby int count; 14309196d8acSJiri Slaby 14319196d8acSJiri Slaby if (port->x_char) { 14329196d8acSJiri Slaby serial_out(up, UART_TX, port->x_char); 14339196d8acSJiri Slaby port->icount.tx++; 14349196d8acSJiri Slaby port->x_char = 0; 14359196d8acSJiri Slaby return; 14369196d8acSJiri Slaby } 14379196d8acSJiri Slaby if (uart_tx_stopped(port)) { 14389196d8acSJiri Slaby serial8250_stop_tx(port); 14399196d8acSJiri Slaby return; 14409196d8acSJiri Slaby } 14419196d8acSJiri Slaby if (uart_circ_empty(xmit)) { 14429196d8acSJiri Slaby __stop_tx(up); 14439196d8acSJiri Slaby return; 14449196d8acSJiri Slaby } 14459196d8acSJiri Slaby 14469196d8acSJiri Slaby count = up->tx_loadsz; 14479196d8acSJiri Slaby do { 14489196d8acSJiri Slaby serial_out(up, UART_TX, xmit->buf[xmit->tail]); 14499196d8acSJiri Slaby xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 14509196d8acSJiri Slaby port->icount.tx++; 14519196d8acSJiri Slaby if (uart_circ_empty(xmit)) 14529196d8acSJiri Slaby break; 14539196d8acSJiri Slaby if (up->capabilities & UART_CAP_HFIFO) { 14549196d8acSJiri Slaby if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) != 14559196d8acSJiri Slaby BOTH_EMPTY) 14569196d8acSJiri Slaby break; 14579196d8acSJiri Slaby } 14589196d8acSJiri Slaby } while (--count > 0); 14599196d8acSJiri Slaby 14609196d8acSJiri Slaby if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 14619196d8acSJiri Slaby uart_write_wakeup(port); 14629196d8acSJiri Slaby 14639196d8acSJiri Slaby DEBUG_INTR("THRE..."); 14649196d8acSJiri Slaby 14659196d8acSJiri Slaby if (uart_circ_empty(xmit)) 14669196d8acSJiri Slaby __stop_tx(up); 14679196d8acSJiri Slaby } 14689196d8acSJiri Slaby EXPORT_SYMBOL_GPL(serial8250_tx_chars); 14699196d8acSJiri Slaby 14709196d8acSJiri Slaby unsigned int serial8250_modem_status(struct uart_8250_port *up) 14719196d8acSJiri Slaby { 14729196d8acSJiri Slaby struct uart_port *port = &up->port; 14739196d8acSJiri Slaby unsigned int status = serial_in(up, UART_MSR); 14749196d8acSJiri Slaby 14759196d8acSJiri Slaby status |= up->msr_saved_flags; 14769196d8acSJiri Slaby up->msr_saved_flags = 0; 14779196d8acSJiri Slaby if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 14789196d8acSJiri Slaby port->state != NULL) { 14799196d8acSJiri Slaby if (status & UART_MSR_TERI) 14809196d8acSJiri Slaby port->icount.rng++; 14819196d8acSJiri Slaby if (status & UART_MSR_DDSR) 14829196d8acSJiri Slaby port->icount.dsr++; 14839196d8acSJiri Slaby if (status & UART_MSR_DDCD) 14849196d8acSJiri Slaby uart_handle_dcd_change(port, status & UART_MSR_DCD); 14859196d8acSJiri Slaby if (status & UART_MSR_DCTS) 14869196d8acSJiri Slaby uart_handle_cts_change(port, status & UART_MSR_CTS); 14879196d8acSJiri Slaby 14889196d8acSJiri Slaby wake_up_interruptible(&port->state->port.delta_msr_wait); 14899196d8acSJiri Slaby } 14909196d8acSJiri Slaby 14919196d8acSJiri Slaby return status; 14929196d8acSJiri Slaby } 14939196d8acSJiri Slaby EXPORT_SYMBOL_GPL(serial8250_modem_status); 14949196d8acSJiri Slaby 14959196d8acSJiri Slaby /* 14969196d8acSJiri Slaby * This handles the interrupt from one port. 14979196d8acSJiri Slaby */ 14989196d8acSJiri Slaby int serial8250_handle_irq(struct uart_port *port, unsigned int iir) 14999196d8acSJiri Slaby { 15009196d8acSJiri Slaby unsigned char status; 15019196d8acSJiri Slaby unsigned long flags; 15029196d8acSJiri Slaby struct uart_8250_port *up = 15039196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 15049196d8acSJiri Slaby int dma_err = 0; 15059196d8acSJiri Slaby 15069196d8acSJiri Slaby if (iir & UART_IIR_NO_INT) 15079196d8acSJiri Slaby return 0; 15089196d8acSJiri Slaby 15099196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 15109196d8acSJiri Slaby 15119196d8acSJiri Slaby status = serial_port_in(port, UART_LSR); 15129196d8acSJiri Slaby 15139196d8acSJiri Slaby DEBUG_INTR("status = %x...", status); 15149196d8acSJiri Slaby 15159196d8acSJiri Slaby if (status & (UART_LSR_DR | UART_LSR_BI)) { 15169196d8acSJiri Slaby if (up->dma) 15179196d8acSJiri Slaby dma_err = serial8250_rx_dma(up, iir); 15189196d8acSJiri Slaby 15199196d8acSJiri Slaby if (!up->dma || dma_err) 15209196d8acSJiri Slaby status = serial8250_rx_chars(up, status); 15219196d8acSJiri Slaby } 15229196d8acSJiri Slaby serial8250_modem_status(up); 15239196d8acSJiri Slaby if (status & UART_LSR_THRE) 15249196d8acSJiri Slaby serial8250_tx_chars(up); 15259196d8acSJiri Slaby 15269196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 15279196d8acSJiri Slaby return 1; 15289196d8acSJiri Slaby } 15299196d8acSJiri Slaby EXPORT_SYMBOL_GPL(serial8250_handle_irq); 15309196d8acSJiri Slaby 15319196d8acSJiri Slaby static int serial8250_default_handle_irq(struct uart_port *port) 15329196d8acSJiri Slaby { 15339196d8acSJiri Slaby unsigned int iir = serial_port_in(port, UART_IIR); 15349196d8acSJiri Slaby 15359196d8acSJiri Slaby return serial8250_handle_irq(port, iir); 15369196d8acSJiri Slaby } 15379196d8acSJiri Slaby 15389196d8acSJiri Slaby /* 15399196d8acSJiri Slaby * These Exar UARTs have an extra interrupt indicator that could 15409196d8acSJiri Slaby * fire for a few unimplemented interrupts. One of which is a 15419196d8acSJiri Slaby * wakeup event when coming out of sleep. Put this here just 15429196d8acSJiri Slaby * to be on the safe side that these interrupts don't go unhandled. 15439196d8acSJiri Slaby */ 15449196d8acSJiri Slaby static int exar_handle_irq(struct uart_port *port) 15459196d8acSJiri Slaby { 15469196d8acSJiri Slaby unsigned char int0, int1, int2, int3; 15479196d8acSJiri Slaby unsigned int iir = serial_port_in(port, UART_IIR); 15489196d8acSJiri Slaby int ret; 15499196d8acSJiri Slaby 15509196d8acSJiri Slaby ret = serial8250_handle_irq(port, iir); 15519196d8acSJiri Slaby 15529196d8acSJiri Slaby if ((port->type == PORT_XR17V35X) || 15539196d8acSJiri Slaby (port->type == PORT_XR17D15X)) { 15549196d8acSJiri Slaby int0 = serial_port_in(port, 0x80); 15559196d8acSJiri Slaby int1 = serial_port_in(port, 0x81); 15569196d8acSJiri Slaby int2 = serial_port_in(port, 0x82); 15579196d8acSJiri Slaby int3 = serial_port_in(port, 0x83); 15589196d8acSJiri Slaby } 15599196d8acSJiri Slaby 15609196d8acSJiri Slaby return ret; 15619196d8acSJiri Slaby } 15629196d8acSJiri Slaby 15639196d8acSJiri Slaby /* 15649196d8acSJiri Slaby * This is the serial driver's interrupt routine. 15659196d8acSJiri Slaby * 15669196d8acSJiri Slaby * Arjan thinks the old way was overly complex, so it got simplified. 15679196d8acSJiri Slaby * Alan disagrees, saying that need the complexity to handle the weird 15689196d8acSJiri Slaby * nature of ISA shared interrupts. (This is a special exception.) 15699196d8acSJiri Slaby * 15709196d8acSJiri Slaby * In order to handle ISA shared interrupts properly, we need to check 15719196d8acSJiri Slaby * that all ports have been serviced, and therefore the ISA interrupt 15729196d8acSJiri Slaby * line has been de-asserted. 15739196d8acSJiri Slaby * 15749196d8acSJiri Slaby * This means we need to loop through all ports. checking that they 15759196d8acSJiri Slaby * don't have an interrupt pending. 15769196d8acSJiri Slaby */ 15779196d8acSJiri Slaby static irqreturn_t serial8250_interrupt(int irq, void *dev_id) 15789196d8acSJiri Slaby { 15799196d8acSJiri Slaby struct irq_info *i = dev_id; 15809196d8acSJiri Slaby struct list_head *l, *end = NULL; 15819196d8acSJiri Slaby int pass_counter = 0, handled = 0; 15829196d8acSJiri Slaby 15839196d8acSJiri Slaby DEBUG_INTR("serial8250_interrupt(%d)...", irq); 15849196d8acSJiri Slaby 15859196d8acSJiri Slaby spin_lock(&i->lock); 15869196d8acSJiri Slaby 15879196d8acSJiri Slaby l = i->head; 15889196d8acSJiri Slaby do { 15899196d8acSJiri Slaby struct uart_8250_port *up; 15909196d8acSJiri Slaby struct uart_port *port; 15919196d8acSJiri Slaby 15929196d8acSJiri Slaby up = list_entry(l, struct uart_8250_port, list); 15939196d8acSJiri Slaby port = &up->port; 15949196d8acSJiri Slaby 15959196d8acSJiri Slaby if (port->handle_irq(port)) { 15969196d8acSJiri Slaby handled = 1; 15979196d8acSJiri Slaby end = NULL; 15989196d8acSJiri Slaby } else if (end == NULL) 15999196d8acSJiri Slaby end = l; 16009196d8acSJiri Slaby 16019196d8acSJiri Slaby l = l->next; 16029196d8acSJiri Slaby 16039196d8acSJiri Slaby if (l == i->head && pass_counter++ > PASS_LIMIT) { 16049196d8acSJiri Slaby /* If we hit this, we're dead. */ 16059196d8acSJiri Slaby printk_ratelimited(KERN_ERR 16069196d8acSJiri Slaby "serial8250: too much work for irq%d\n", irq); 16079196d8acSJiri Slaby break; 16089196d8acSJiri Slaby } 16099196d8acSJiri Slaby } while (l != end); 16109196d8acSJiri Slaby 16119196d8acSJiri Slaby spin_unlock(&i->lock); 16129196d8acSJiri Slaby 16139196d8acSJiri Slaby DEBUG_INTR("end.\n"); 16149196d8acSJiri Slaby 16159196d8acSJiri Slaby return IRQ_RETVAL(handled); 16169196d8acSJiri Slaby } 16179196d8acSJiri Slaby 16189196d8acSJiri Slaby /* 16199196d8acSJiri Slaby * To support ISA shared interrupts, we need to have one interrupt 16209196d8acSJiri Slaby * handler that ensures that the IRQ line has been deasserted 16219196d8acSJiri Slaby * before returning. Failing to do this will result in the IRQ 16229196d8acSJiri Slaby * line being stuck active, and, since ISA irqs are edge triggered, 16239196d8acSJiri Slaby * no more IRQs will be seen. 16249196d8acSJiri Slaby */ 16259196d8acSJiri Slaby static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up) 16269196d8acSJiri Slaby { 16279196d8acSJiri Slaby spin_lock_irq(&i->lock); 16289196d8acSJiri Slaby 16299196d8acSJiri Slaby if (!list_empty(i->head)) { 16309196d8acSJiri Slaby if (i->head == &up->list) 16319196d8acSJiri Slaby i->head = i->head->next; 16329196d8acSJiri Slaby list_del(&up->list); 16339196d8acSJiri Slaby } else { 16349196d8acSJiri Slaby BUG_ON(i->head != &up->list); 16359196d8acSJiri Slaby i->head = NULL; 16369196d8acSJiri Slaby } 16379196d8acSJiri Slaby spin_unlock_irq(&i->lock); 16389196d8acSJiri Slaby /* List empty so throw away the hash node */ 16399196d8acSJiri Slaby if (i->head == NULL) { 16409196d8acSJiri Slaby hlist_del(&i->node); 16419196d8acSJiri Slaby kfree(i); 16429196d8acSJiri Slaby } 16439196d8acSJiri Slaby } 16449196d8acSJiri Slaby 16459196d8acSJiri Slaby static int serial_link_irq_chain(struct uart_8250_port *up) 16469196d8acSJiri Slaby { 16479196d8acSJiri Slaby struct hlist_head *h; 16489196d8acSJiri Slaby struct hlist_node *n; 16499196d8acSJiri Slaby struct irq_info *i; 16509196d8acSJiri Slaby int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0; 16519196d8acSJiri Slaby 16529196d8acSJiri Slaby mutex_lock(&hash_mutex); 16539196d8acSJiri Slaby 16549196d8acSJiri Slaby h = &irq_lists[up->port.irq % NR_IRQ_HASH]; 16559196d8acSJiri Slaby 16569196d8acSJiri Slaby hlist_for_each(n, h) { 16579196d8acSJiri Slaby i = hlist_entry(n, struct irq_info, node); 16589196d8acSJiri Slaby if (i->irq == up->port.irq) 16599196d8acSJiri Slaby break; 16609196d8acSJiri Slaby } 16619196d8acSJiri Slaby 16629196d8acSJiri Slaby if (n == NULL) { 16639196d8acSJiri Slaby i = kzalloc(sizeof(struct irq_info), GFP_KERNEL); 16649196d8acSJiri Slaby if (i == NULL) { 16659196d8acSJiri Slaby mutex_unlock(&hash_mutex); 16669196d8acSJiri Slaby return -ENOMEM; 16679196d8acSJiri Slaby } 16689196d8acSJiri Slaby spin_lock_init(&i->lock); 16699196d8acSJiri Slaby i->irq = up->port.irq; 16709196d8acSJiri Slaby hlist_add_head(&i->node, h); 16719196d8acSJiri Slaby } 16729196d8acSJiri Slaby mutex_unlock(&hash_mutex); 16739196d8acSJiri Slaby 16749196d8acSJiri Slaby spin_lock_irq(&i->lock); 16759196d8acSJiri Slaby 16769196d8acSJiri Slaby if (i->head) { 16779196d8acSJiri Slaby list_add(&up->list, i->head); 16789196d8acSJiri Slaby spin_unlock_irq(&i->lock); 16799196d8acSJiri Slaby 16809196d8acSJiri Slaby ret = 0; 16819196d8acSJiri Slaby } else { 16829196d8acSJiri Slaby INIT_LIST_HEAD(&up->list); 16839196d8acSJiri Slaby i->head = &up->list; 16849196d8acSJiri Slaby spin_unlock_irq(&i->lock); 16859196d8acSJiri Slaby irq_flags |= up->port.irqflags; 16869196d8acSJiri Slaby ret = request_irq(up->port.irq, serial8250_interrupt, 16879196d8acSJiri Slaby irq_flags, "serial", i); 16889196d8acSJiri Slaby if (ret < 0) 16899196d8acSJiri Slaby serial_do_unlink(i, up); 16909196d8acSJiri Slaby } 16919196d8acSJiri Slaby 16929196d8acSJiri Slaby return ret; 16939196d8acSJiri Slaby } 16949196d8acSJiri Slaby 16959196d8acSJiri Slaby static void serial_unlink_irq_chain(struct uart_8250_port *up) 16969196d8acSJiri Slaby { 1697bd2fe272SPaul Gortmaker /* 1698bd2fe272SPaul Gortmaker * yes, some broken gcc emit "warning: 'i' may be used uninitialized" 1699bd2fe272SPaul Gortmaker * but no, we are not going to take a patch that assigns NULL below. 1700bd2fe272SPaul Gortmaker */ 17019196d8acSJiri Slaby struct irq_info *i; 17029196d8acSJiri Slaby struct hlist_node *n; 17039196d8acSJiri Slaby struct hlist_head *h; 17049196d8acSJiri Slaby 17059196d8acSJiri Slaby mutex_lock(&hash_mutex); 17069196d8acSJiri Slaby 17079196d8acSJiri Slaby h = &irq_lists[up->port.irq % NR_IRQ_HASH]; 17089196d8acSJiri Slaby 17099196d8acSJiri Slaby hlist_for_each(n, h) { 17109196d8acSJiri Slaby i = hlist_entry(n, struct irq_info, node); 17119196d8acSJiri Slaby if (i->irq == up->port.irq) 17129196d8acSJiri Slaby break; 17139196d8acSJiri Slaby } 17149196d8acSJiri Slaby 17159196d8acSJiri Slaby BUG_ON(n == NULL); 17169196d8acSJiri Slaby BUG_ON(i->head == NULL); 17179196d8acSJiri Slaby 17189196d8acSJiri Slaby if (list_empty(i->head)) 17199196d8acSJiri Slaby free_irq(up->port.irq, i); 17209196d8acSJiri Slaby 17219196d8acSJiri Slaby serial_do_unlink(i, up); 17229196d8acSJiri Slaby mutex_unlock(&hash_mutex); 17239196d8acSJiri Slaby } 17249196d8acSJiri Slaby 17259196d8acSJiri Slaby /* 17269196d8acSJiri Slaby * This function is used to handle ports that do not have an 17279196d8acSJiri Slaby * interrupt. This doesn't work very well for 16450's, but gives 17289196d8acSJiri Slaby * barely passable results for a 16550A. (Although at the expense 17299196d8acSJiri Slaby * of much CPU overhead). 17309196d8acSJiri Slaby */ 17319196d8acSJiri Slaby static void serial8250_timeout(unsigned long data) 17329196d8acSJiri Slaby { 17339196d8acSJiri Slaby struct uart_8250_port *up = (struct uart_8250_port *)data; 17349196d8acSJiri Slaby 17359196d8acSJiri Slaby up->port.handle_irq(&up->port); 17369196d8acSJiri Slaby mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port)); 17379196d8acSJiri Slaby } 17389196d8acSJiri Slaby 17399196d8acSJiri Slaby static void serial8250_backup_timeout(unsigned long data) 17409196d8acSJiri Slaby { 17419196d8acSJiri Slaby struct uart_8250_port *up = (struct uart_8250_port *)data; 17429196d8acSJiri Slaby unsigned int iir, ier = 0, lsr; 17439196d8acSJiri Slaby unsigned long flags; 17449196d8acSJiri Slaby 17459196d8acSJiri Slaby spin_lock_irqsave(&up->port.lock, flags); 17469196d8acSJiri Slaby 17479196d8acSJiri Slaby /* 17489196d8acSJiri Slaby * Must disable interrupts or else we risk racing with the interrupt 17499196d8acSJiri Slaby * based handler. 17509196d8acSJiri Slaby */ 17519196d8acSJiri Slaby if (up->port.irq) { 17529196d8acSJiri Slaby ier = serial_in(up, UART_IER); 17539196d8acSJiri Slaby serial_out(up, UART_IER, 0); 17549196d8acSJiri Slaby } 17559196d8acSJiri Slaby 17569196d8acSJiri Slaby iir = serial_in(up, UART_IIR); 17579196d8acSJiri Slaby 17589196d8acSJiri Slaby /* 17599196d8acSJiri Slaby * This should be a safe test for anyone who doesn't trust the 17609196d8acSJiri Slaby * IIR bits on their UART, but it's specifically designed for 17619196d8acSJiri Slaby * the "Diva" UART used on the management processor on many HP 17629196d8acSJiri Slaby * ia64 and parisc boxes. 17639196d8acSJiri Slaby */ 17649196d8acSJiri Slaby lsr = serial_in(up, UART_LSR); 17659196d8acSJiri Slaby up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 17669196d8acSJiri Slaby if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) && 17679196d8acSJiri Slaby (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) && 17689196d8acSJiri Slaby (lsr & UART_LSR_THRE)) { 17699196d8acSJiri Slaby iir &= ~(UART_IIR_ID | UART_IIR_NO_INT); 17709196d8acSJiri Slaby iir |= UART_IIR_THRI; 17719196d8acSJiri Slaby } 17729196d8acSJiri Slaby 17739196d8acSJiri Slaby if (!(iir & UART_IIR_NO_INT)) 17749196d8acSJiri Slaby serial8250_tx_chars(up); 17759196d8acSJiri Slaby 17769196d8acSJiri Slaby if (up->port.irq) 17779196d8acSJiri Slaby serial_out(up, UART_IER, ier); 17789196d8acSJiri Slaby 17799196d8acSJiri Slaby spin_unlock_irqrestore(&up->port.lock, flags); 17809196d8acSJiri Slaby 17819196d8acSJiri Slaby /* Standard timer interval plus 0.2s to keep the port running */ 17829196d8acSJiri Slaby mod_timer(&up->timer, 17839196d8acSJiri Slaby jiffies + uart_poll_timeout(&up->port) + HZ / 5); 17849196d8acSJiri Slaby } 17859196d8acSJiri Slaby 17869196d8acSJiri Slaby static unsigned int serial8250_tx_empty(struct uart_port *port) 17879196d8acSJiri Slaby { 17889196d8acSJiri Slaby struct uart_8250_port *up = 17899196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 17909196d8acSJiri Slaby unsigned long flags; 17919196d8acSJiri Slaby unsigned int lsr; 17929196d8acSJiri Slaby 17939196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 17949196d8acSJiri Slaby lsr = serial_port_in(port, UART_LSR); 17959196d8acSJiri Slaby up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 17969196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 17979196d8acSJiri Slaby 17989196d8acSJiri Slaby return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0; 17999196d8acSJiri Slaby } 18009196d8acSJiri Slaby 18019196d8acSJiri Slaby static unsigned int serial8250_get_mctrl(struct uart_port *port) 18029196d8acSJiri Slaby { 18039196d8acSJiri Slaby struct uart_8250_port *up = 18049196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 18059196d8acSJiri Slaby unsigned int status; 18069196d8acSJiri Slaby unsigned int ret; 18079196d8acSJiri Slaby 18089196d8acSJiri Slaby status = serial8250_modem_status(up); 18099196d8acSJiri Slaby 18109196d8acSJiri Slaby ret = 0; 18119196d8acSJiri Slaby if (status & UART_MSR_DCD) 18129196d8acSJiri Slaby ret |= TIOCM_CAR; 18139196d8acSJiri Slaby if (status & UART_MSR_RI) 18149196d8acSJiri Slaby ret |= TIOCM_RNG; 18159196d8acSJiri Slaby if (status & UART_MSR_DSR) 18169196d8acSJiri Slaby ret |= TIOCM_DSR; 18179196d8acSJiri Slaby if (status & UART_MSR_CTS) 18189196d8acSJiri Slaby ret |= TIOCM_CTS; 18199196d8acSJiri Slaby return ret; 18209196d8acSJiri Slaby } 18219196d8acSJiri Slaby 18229196d8acSJiri Slaby static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl) 18239196d8acSJiri Slaby { 18249196d8acSJiri Slaby struct uart_8250_port *up = 18259196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 18269196d8acSJiri Slaby unsigned char mcr = 0; 18279196d8acSJiri Slaby 18289196d8acSJiri Slaby if (mctrl & TIOCM_RTS) 18299196d8acSJiri Slaby mcr |= UART_MCR_RTS; 18309196d8acSJiri Slaby if (mctrl & TIOCM_DTR) 18319196d8acSJiri Slaby mcr |= UART_MCR_DTR; 18329196d8acSJiri Slaby if (mctrl & TIOCM_OUT1) 18339196d8acSJiri Slaby mcr |= UART_MCR_OUT1; 18349196d8acSJiri Slaby if (mctrl & TIOCM_OUT2) 18359196d8acSJiri Slaby mcr |= UART_MCR_OUT2; 18369196d8acSJiri Slaby if (mctrl & TIOCM_LOOP) 18379196d8acSJiri Slaby mcr |= UART_MCR_LOOP; 18389196d8acSJiri Slaby 18399196d8acSJiri Slaby mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr; 18409196d8acSJiri Slaby 18419196d8acSJiri Slaby serial_port_out(port, UART_MCR, mcr); 18429196d8acSJiri Slaby } 18439196d8acSJiri Slaby 18449196d8acSJiri Slaby static void serial8250_break_ctl(struct uart_port *port, int break_state) 18459196d8acSJiri Slaby { 18469196d8acSJiri Slaby struct uart_8250_port *up = 18479196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 18489196d8acSJiri Slaby unsigned long flags; 18499196d8acSJiri Slaby 18509196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 18519196d8acSJiri Slaby if (break_state == -1) 18529196d8acSJiri Slaby up->lcr |= UART_LCR_SBC; 18539196d8acSJiri Slaby else 18549196d8acSJiri Slaby up->lcr &= ~UART_LCR_SBC; 18559196d8acSJiri Slaby serial_port_out(port, UART_LCR, up->lcr); 18569196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 18579196d8acSJiri Slaby } 18589196d8acSJiri Slaby 18599196d8acSJiri Slaby /* 18609196d8acSJiri Slaby * Wait for transmitter & holding register to empty 18619196d8acSJiri Slaby */ 18629196d8acSJiri Slaby static void wait_for_xmitr(struct uart_8250_port *up, int bits) 18639196d8acSJiri Slaby { 18649196d8acSJiri Slaby unsigned int status, tmout = 10000; 18659196d8acSJiri Slaby 18669196d8acSJiri Slaby /* Wait up to 10ms for the character(s) to be sent. */ 18679196d8acSJiri Slaby for (;;) { 18689196d8acSJiri Slaby status = serial_in(up, UART_LSR); 18699196d8acSJiri Slaby 18709196d8acSJiri Slaby up->lsr_saved_flags |= status & LSR_SAVE_FLAGS; 18719196d8acSJiri Slaby 18729196d8acSJiri Slaby if ((status & bits) == bits) 18739196d8acSJiri Slaby break; 18749196d8acSJiri Slaby if (--tmout == 0) 18759196d8acSJiri Slaby break; 18769196d8acSJiri Slaby udelay(1); 18779196d8acSJiri Slaby } 18789196d8acSJiri Slaby 18799196d8acSJiri Slaby /* Wait up to 1s for flow control if necessary */ 18809196d8acSJiri Slaby if (up->port.flags & UPF_CONS_FLOW) { 18819196d8acSJiri Slaby unsigned int tmout; 18829196d8acSJiri Slaby for (tmout = 1000000; tmout; tmout--) { 18839196d8acSJiri Slaby unsigned int msr = serial_in(up, UART_MSR); 18849196d8acSJiri Slaby up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 18859196d8acSJiri Slaby if (msr & UART_MSR_CTS) 18869196d8acSJiri Slaby break; 18879196d8acSJiri Slaby udelay(1); 18889196d8acSJiri Slaby touch_nmi_watchdog(); 18899196d8acSJiri Slaby } 18909196d8acSJiri Slaby } 18919196d8acSJiri Slaby } 18929196d8acSJiri Slaby 18939196d8acSJiri Slaby #ifdef CONFIG_CONSOLE_POLL 18949196d8acSJiri Slaby /* 18959196d8acSJiri Slaby * Console polling routines for writing and reading from the uart while 18969196d8acSJiri Slaby * in an interrupt or debug context. 18979196d8acSJiri Slaby */ 18989196d8acSJiri Slaby 18999196d8acSJiri Slaby static int serial8250_get_poll_char(struct uart_port *port) 19009196d8acSJiri Slaby { 19019196d8acSJiri Slaby unsigned char lsr = serial_port_in(port, UART_LSR); 19029196d8acSJiri Slaby 19039196d8acSJiri Slaby if (!(lsr & UART_LSR_DR)) 19049196d8acSJiri Slaby return NO_POLL_CHAR; 19059196d8acSJiri Slaby 19069196d8acSJiri Slaby return serial_port_in(port, UART_RX); 19079196d8acSJiri Slaby } 19089196d8acSJiri Slaby 19099196d8acSJiri Slaby 19109196d8acSJiri Slaby static void serial8250_put_poll_char(struct uart_port *port, 19119196d8acSJiri Slaby unsigned char c) 19129196d8acSJiri Slaby { 19139196d8acSJiri Slaby unsigned int ier; 19149196d8acSJiri Slaby struct uart_8250_port *up = 19159196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 19169196d8acSJiri Slaby 19179196d8acSJiri Slaby /* 19189196d8acSJiri Slaby * First save the IER then disable the interrupts 19199196d8acSJiri Slaby */ 19209196d8acSJiri Slaby ier = serial_port_in(port, UART_IER); 19219196d8acSJiri Slaby if (up->capabilities & UART_CAP_UUE) 19229196d8acSJiri Slaby serial_port_out(port, UART_IER, UART_IER_UUE); 19239196d8acSJiri Slaby else 19249196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 19259196d8acSJiri Slaby 19269196d8acSJiri Slaby wait_for_xmitr(up, BOTH_EMPTY); 19279196d8acSJiri Slaby /* 19289196d8acSJiri Slaby * Send the character out. 19299196d8acSJiri Slaby * If a LF, also do CR... 19309196d8acSJiri Slaby */ 19319196d8acSJiri Slaby serial_port_out(port, UART_TX, c); 19329196d8acSJiri Slaby if (c == 10) { 19339196d8acSJiri Slaby wait_for_xmitr(up, BOTH_EMPTY); 19349196d8acSJiri Slaby serial_port_out(port, UART_TX, 13); 19359196d8acSJiri Slaby } 19369196d8acSJiri Slaby 19379196d8acSJiri Slaby /* 19389196d8acSJiri Slaby * Finally, wait for transmitter to become empty 19399196d8acSJiri Slaby * and restore the IER 19409196d8acSJiri Slaby */ 19419196d8acSJiri Slaby wait_for_xmitr(up, BOTH_EMPTY); 19429196d8acSJiri Slaby serial_port_out(port, UART_IER, ier); 19439196d8acSJiri Slaby } 19449196d8acSJiri Slaby 19459196d8acSJiri Slaby #endif /* CONFIG_CONSOLE_POLL */ 19469196d8acSJiri Slaby 19479196d8acSJiri Slaby static int serial8250_startup(struct uart_port *port) 19489196d8acSJiri Slaby { 19499196d8acSJiri Slaby struct uart_8250_port *up = 19509196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 19519196d8acSJiri Slaby unsigned long flags; 19529196d8acSJiri Slaby unsigned char lsr, iir; 19539196d8acSJiri Slaby int retval; 19549196d8acSJiri Slaby 19559196d8acSJiri Slaby if (port->type == PORT_8250_CIR) 19569196d8acSJiri Slaby return -ENODEV; 19579196d8acSJiri Slaby 19589196d8acSJiri Slaby if (!port->fifosize) 19599196d8acSJiri Slaby port->fifosize = uart_config[port->type].fifo_size; 19609196d8acSJiri Slaby if (!up->tx_loadsz) 19619196d8acSJiri Slaby up->tx_loadsz = uart_config[port->type].tx_loadsz; 19629196d8acSJiri Slaby if (!up->capabilities) 19639196d8acSJiri Slaby up->capabilities = uart_config[port->type].flags; 19649196d8acSJiri Slaby up->mcr = 0; 19659196d8acSJiri Slaby 19669196d8acSJiri Slaby if (port->iotype != up->cur_iotype) 19679196d8acSJiri Slaby set_io_from_upio(port); 19689196d8acSJiri Slaby 19699196d8acSJiri Slaby if (port->type == PORT_16C950) { 19709196d8acSJiri Slaby /* Wake up and initialize UART */ 19719196d8acSJiri Slaby up->acr = 0; 19729196d8acSJiri Slaby serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B); 19739196d8acSJiri Slaby serial_port_out(port, UART_EFR, UART_EFR_ECB); 19749196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 19759196d8acSJiri Slaby serial_port_out(port, UART_LCR, 0); 19769196d8acSJiri Slaby serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ 19779196d8acSJiri Slaby serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B); 19789196d8acSJiri Slaby serial_port_out(port, UART_EFR, UART_EFR_ECB); 19799196d8acSJiri Slaby serial_port_out(port, UART_LCR, 0); 19809196d8acSJiri Slaby } 19819196d8acSJiri Slaby 19829196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 19839196d8acSJiri Slaby /* 19849196d8acSJiri Slaby * If this is an RSA port, see if we can kick it up to the 19859196d8acSJiri Slaby * higher speed clock. 19869196d8acSJiri Slaby */ 19879196d8acSJiri Slaby enable_rsa(up); 19889196d8acSJiri Slaby #endif 19899196d8acSJiri Slaby 19909196d8acSJiri Slaby /* 19919196d8acSJiri Slaby * Clear the FIFO buffers and disable them. 19929196d8acSJiri Slaby * (they will be reenabled in set_termios()) 19939196d8acSJiri Slaby */ 19949196d8acSJiri Slaby serial8250_clear_fifos(up); 19959196d8acSJiri Slaby 19969196d8acSJiri Slaby /* 19979196d8acSJiri Slaby * Clear the interrupt registers. 19989196d8acSJiri Slaby */ 19999196d8acSJiri Slaby serial_port_in(port, UART_LSR); 20009196d8acSJiri Slaby serial_port_in(port, UART_RX); 20019196d8acSJiri Slaby serial_port_in(port, UART_IIR); 20029196d8acSJiri Slaby serial_port_in(port, UART_MSR); 20039196d8acSJiri Slaby 20049196d8acSJiri Slaby /* 20059196d8acSJiri Slaby * At this point, there's no way the LSR could still be 0xff; 20069196d8acSJiri Slaby * if it is, then bail out, because there's likely no UART 20079196d8acSJiri Slaby * here. 20089196d8acSJiri Slaby */ 20099196d8acSJiri Slaby if (!(port->flags & UPF_BUGGY_UART) && 20109196d8acSJiri Slaby (serial_port_in(port, UART_LSR) == 0xff)) { 20119196d8acSJiri Slaby printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n", 20129196d8acSJiri Slaby serial_index(port)); 20139196d8acSJiri Slaby return -ENODEV; 20149196d8acSJiri Slaby } 20159196d8acSJiri Slaby 20169196d8acSJiri Slaby /* 20179196d8acSJiri Slaby * For a XR16C850, we need to set the trigger levels 20189196d8acSJiri Slaby */ 20199196d8acSJiri Slaby if (port->type == PORT_16850) { 20209196d8acSJiri Slaby unsigned char fctr; 20219196d8acSJiri Slaby 20229196d8acSJiri Slaby serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 20239196d8acSJiri Slaby 20249196d8acSJiri Slaby fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); 20259196d8acSJiri Slaby serial_port_out(port, UART_FCTR, 20269196d8acSJiri Slaby fctr | UART_FCTR_TRGD | UART_FCTR_RX); 20279196d8acSJiri Slaby serial_port_out(port, UART_TRG, UART_TRG_96); 20289196d8acSJiri Slaby serial_port_out(port, UART_FCTR, 20299196d8acSJiri Slaby fctr | UART_FCTR_TRGD | UART_FCTR_TX); 20309196d8acSJiri Slaby serial_port_out(port, UART_TRG, UART_TRG_96); 20319196d8acSJiri Slaby 20329196d8acSJiri Slaby serial_port_out(port, UART_LCR, 0); 20339196d8acSJiri Slaby } 20349196d8acSJiri Slaby 20359196d8acSJiri Slaby if (port->irq) { 20369196d8acSJiri Slaby unsigned char iir1; 20379196d8acSJiri Slaby /* 20389196d8acSJiri Slaby * Test for UARTs that do not reassert THRE when the 20399196d8acSJiri Slaby * transmitter is idle and the interrupt has already 20409196d8acSJiri Slaby * been cleared. Real 16550s should always reassert 20419196d8acSJiri Slaby * this interrupt whenever the transmitter is idle and 20429196d8acSJiri Slaby * the interrupt is enabled. Delays are necessary to 20439196d8acSJiri Slaby * allow register changes to become visible. 20449196d8acSJiri Slaby */ 20459196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 20469196d8acSJiri Slaby if (up->port.irqflags & IRQF_SHARED) 20479196d8acSJiri Slaby disable_irq_nosync(port->irq); 20489196d8acSJiri Slaby 20499196d8acSJiri Slaby wait_for_xmitr(up, UART_LSR_THRE); 20509196d8acSJiri Slaby serial_port_out_sync(port, UART_IER, UART_IER_THRI); 20519196d8acSJiri Slaby udelay(1); /* allow THRE to set */ 20529196d8acSJiri Slaby iir1 = serial_port_in(port, UART_IIR); 20539196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 20549196d8acSJiri Slaby serial_port_out_sync(port, UART_IER, UART_IER_THRI); 20559196d8acSJiri Slaby udelay(1); /* allow a working UART time to re-assert THRE */ 20569196d8acSJiri Slaby iir = serial_port_in(port, UART_IIR); 20579196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 20589196d8acSJiri Slaby 20599196d8acSJiri Slaby if (port->irqflags & IRQF_SHARED) 20609196d8acSJiri Slaby enable_irq(port->irq); 20619196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 20629196d8acSJiri Slaby 20639196d8acSJiri Slaby /* 20649196d8acSJiri Slaby * If the interrupt is not reasserted, or we otherwise 20659196d8acSJiri Slaby * don't trust the iir, setup a timer to kick the UART 20669196d8acSJiri Slaby * on a regular basis. 20679196d8acSJiri Slaby */ 20689196d8acSJiri Slaby if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) || 20699196d8acSJiri Slaby up->port.flags & UPF_BUG_THRE) { 20709196d8acSJiri Slaby up->bugs |= UART_BUG_THRE; 20719196d8acSJiri Slaby pr_debug("ttyS%d - using backup timer\n", 20729196d8acSJiri Slaby serial_index(port)); 20739196d8acSJiri Slaby } 20749196d8acSJiri Slaby } 20759196d8acSJiri Slaby 20769196d8acSJiri Slaby /* 20779196d8acSJiri Slaby * The above check will only give an accurate result the first time 20789196d8acSJiri Slaby * the port is opened so this value needs to be preserved. 20799196d8acSJiri Slaby */ 20809196d8acSJiri Slaby if (up->bugs & UART_BUG_THRE) { 20819196d8acSJiri Slaby up->timer.function = serial8250_backup_timeout; 20829196d8acSJiri Slaby up->timer.data = (unsigned long)up; 20839196d8acSJiri Slaby mod_timer(&up->timer, jiffies + 20849196d8acSJiri Slaby uart_poll_timeout(port) + HZ / 5); 20859196d8acSJiri Slaby } 20869196d8acSJiri Slaby 20879196d8acSJiri Slaby /* 20889196d8acSJiri Slaby * If the "interrupt" for this port doesn't correspond with any 20899196d8acSJiri Slaby * hardware interrupt, we use a timer-based system. The original 20909196d8acSJiri Slaby * driver used to do this with IRQ0. 20919196d8acSJiri Slaby */ 20929196d8acSJiri Slaby if (!port->irq) { 20939196d8acSJiri Slaby up->timer.data = (unsigned long)up; 20949196d8acSJiri Slaby mod_timer(&up->timer, jiffies + uart_poll_timeout(port)); 20959196d8acSJiri Slaby } else { 20969196d8acSJiri Slaby retval = serial_link_irq_chain(up); 20979196d8acSJiri Slaby if (retval) 20989196d8acSJiri Slaby return retval; 20999196d8acSJiri Slaby } 21009196d8acSJiri Slaby 21019196d8acSJiri Slaby /* 21029196d8acSJiri Slaby * Now, initialize the UART 21039196d8acSJiri Slaby */ 21049196d8acSJiri Slaby serial_port_out(port, UART_LCR, UART_LCR_WLEN8); 21059196d8acSJiri Slaby 21069196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 21079196d8acSJiri Slaby if (up->port.flags & UPF_FOURPORT) { 21089196d8acSJiri Slaby if (!up->port.irq) 21099196d8acSJiri Slaby up->port.mctrl |= TIOCM_OUT1; 21109196d8acSJiri Slaby } else 21119196d8acSJiri Slaby /* 21129196d8acSJiri Slaby * Most PC uarts need OUT2 raised to enable interrupts. 21139196d8acSJiri Slaby */ 21149196d8acSJiri Slaby if (port->irq) 21159196d8acSJiri Slaby up->port.mctrl |= TIOCM_OUT2; 21169196d8acSJiri Slaby 21179196d8acSJiri Slaby serial8250_set_mctrl(port, port->mctrl); 21189196d8acSJiri Slaby 21199196d8acSJiri Slaby /* Serial over Lan (SoL) hack: 21209196d8acSJiri Slaby Intel 8257x Gigabit ethernet chips have a 21219196d8acSJiri Slaby 16550 emulation, to be used for Serial Over Lan. 21229196d8acSJiri Slaby Those chips take a longer time than a normal 21239196d8acSJiri Slaby serial device to signalize that a transmission 21249196d8acSJiri Slaby data was queued. Due to that, the above test generally 21259196d8acSJiri Slaby fails. One solution would be to delay the reading of 21269196d8acSJiri Slaby iir. However, this is not reliable, since the timeout 21279196d8acSJiri Slaby is variable. So, let's just don't test if we receive 21289196d8acSJiri Slaby TX irq. This way, we'll never enable UART_BUG_TXEN. 21299196d8acSJiri Slaby */ 21309196d8acSJiri Slaby if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST) 21319196d8acSJiri Slaby goto dont_test_tx_en; 21329196d8acSJiri Slaby 21339196d8acSJiri Slaby /* 21349196d8acSJiri Slaby * Do a quick test to see if we receive an 21359196d8acSJiri Slaby * interrupt when we enable the TX irq. 21369196d8acSJiri Slaby */ 21379196d8acSJiri Slaby serial_port_out(port, UART_IER, UART_IER_THRI); 21389196d8acSJiri Slaby lsr = serial_port_in(port, UART_LSR); 21399196d8acSJiri Slaby iir = serial_port_in(port, UART_IIR); 21409196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 21419196d8acSJiri Slaby 21429196d8acSJiri Slaby if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) { 21439196d8acSJiri Slaby if (!(up->bugs & UART_BUG_TXEN)) { 21449196d8acSJiri Slaby up->bugs |= UART_BUG_TXEN; 21459196d8acSJiri Slaby pr_debug("ttyS%d - enabling bad tx status workarounds\n", 21469196d8acSJiri Slaby serial_index(port)); 21479196d8acSJiri Slaby } 21489196d8acSJiri Slaby } else { 21499196d8acSJiri Slaby up->bugs &= ~UART_BUG_TXEN; 21509196d8acSJiri Slaby } 21519196d8acSJiri Slaby 21529196d8acSJiri Slaby dont_test_tx_en: 21539196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 21549196d8acSJiri Slaby 21559196d8acSJiri Slaby /* 21569196d8acSJiri Slaby * Clear the interrupt registers again for luck, and clear the 21579196d8acSJiri Slaby * saved flags to avoid getting false values from polling 21589196d8acSJiri Slaby * routines or the previous session. 21599196d8acSJiri Slaby */ 21609196d8acSJiri Slaby serial_port_in(port, UART_LSR); 21619196d8acSJiri Slaby serial_port_in(port, UART_RX); 21629196d8acSJiri Slaby serial_port_in(port, UART_IIR); 21639196d8acSJiri Slaby serial_port_in(port, UART_MSR); 21649196d8acSJiri Slaby up->lsr_saved_flags = 0; 21659196d8acSJiri Slaby up->msr_saved_flags = 0; 21669196d8acSJiri Slaby 21679196d8acSJiri Slaby /* 21689196d8acSJiri Slaby * Request DMA channels for both RX and TX. 21699196d8acSJiri Slaby */ 21709196d8acSJiri Slaby if (up->dma) { 21719196d8acSJiri Slaby retval = serial8250_request_dma(up); 21729196d8acSJiri Slaby if (retval) { 21739196d8acSJiri Slaby pr_warn_ratelimited("ttyS%d - failed to request DMA\n", 21749196d8acSJiri Slaby serial_index(port)); 21759196d8acSJiri Slaby up->dma = NULL; 21769196d8acSJiri Slaby } 21779196d8acSJiri Slaby } 21789196d8acSJiri Slaby 21799196d8acSJiri Slaby /* 21809196d8acSJiri Slaby * Finally, enable interrupts. Note: Modem status interrupts 21819196d8acSJiri Slaby * are set via set_termios(), which will be occurring imminently 21829196d8acSJiri Slaby * anyway, so we don't enable them here. 21839196d8acSJiri Slaby */ 21849196d8acSJiri Slaby up->ier = UART_IER_RLSI | UART_IER_RDI; 21859196d8acSJiri Slaby serial_port_out(port, UART_IER, up->ier); 21869196d8acSJiri Slaby 21879196d8acSJiri Slaby if (port->flags & UPF_FOURPORT) { 21889196d8acSJiri Slaby unsigned int icp; 21899196d8acSJiri Slaby /* 21909196d8acSJiri Slaby * Enable interrupts on the AST Fourport board 21919196d8acSJiri Slaby */ 21929196d8acSJiri Slaby icp = (port->iobase & 0xfe0) | 0x01f; 21939196d8acSJiri Slaby outb_p(0x80, icp); 21949196d8acSJiri Slaby inb_p(icp); 21959196d8acSJiri Slaby } 21969196d8acSJiri Slaby 21979196d8acSJiri Slaby return 0; 21989196d8acSJiri Slaby } 21999196d8acSJiri Slaby 22009196d8acSJiri Slaby static void serial8250_shutdown(struct uart_port *port) 22019196d8acSJiri Slaby { 22029196d8acSJiri Slaby struct uart_8250_port *up = 22039196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 22049196d8acSJiri Slaby unsigned long flags; 22059196d8acSJiri Slaby 22069196d8acSJiri Slaby /* 22079196d8acSJiri Slaby * Disable interrupts from this port 22089196d8acSJiri Slaby */ 22099196d8acSJiri Slaby up->ier = 0; 22109196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 22119196d8acSJiri Slaby 22129196d8acSJiri Slaby if (up->dma) 22139196d8acSJiri Slaby serial8250_release_dma(up); 22149196d8acSJiri Slaby 22159196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 22169196d8acSJiri Slaby if (port->flags & UPF_FOURPORT) { 22179196d8acSJiri Slaby /* reset interrupts on the AST Fourport board */ 22189196d8acSJiri Slaby inb((port->iobase & 0xfe0) | 0x1f); 22199196d8acSJiri Slaby port->mctrl |= TIOCM_OUT1; 22209196d8acSJiri Slaby } else 22219196d8acSJiri Slaby port->mctrl &= ~TIOCM_OUT2; 22229196d8acSJiri Slaby 22239196d8acSJiri Slaby serial8250_set_mctrl(port, port->mctrl); 22249196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 22259196d8acSJiri Slaby 22269196d8acSJiri Slaby /* 22279196d8acSJiri Slaby * Disable break condition and FIFOs 22289196d8acSJiri Slaby */ 22299196d8acSJiri Slaby serial_port_out(port, UART_LCR, 22309196d8acSJiri Slaby serial_port_in(port, UART_LCR) & ~UART_LCR_SBC); 22319196d8acSJiri Slaby serial8250_clear_fifos(up); 22329196d8acSJiri Slaby 22339196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 22349196d8acSJiri Slaby /* 22359196d8acSJiri Slaby * Reset the RSA board back to 115kbps compat mode. 22369196d8acSJiri Slaby */ 22379196d8acSJiri Slaby disable_rsa(up); 22389196d8acSJiri Slaby #endif 22399196d8acSJiri Slaby 22409196d8acSJiri Slaby /* 22419196d8acSJiri Slaby * Read data port to reset things, and then unlink from 22429196d8acSJiri Slaby * the IRQ chain. 22439196d8acSJiri Slaby */ 22449196d8acSJiri Slaby serial_port_in(port, UART_RX); 22459196d8acSJiri Slaby 22469196d8acSJiri Slaby del_timer_sync(&up->timer); 22479196d8acSJiri Slaby up->timer.function = serial8250_timeout; 22489196d8acSJiri Slaby if (port->irq) 22499196d8acSJiri Slaby serial_unlink_irq_chain(up); 22509196d8acSJiri Slaby } 22519196d8acSJiri Slaby 22529196d8acSJiri Slaby static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud) 22539196d8acSJiri Slaby { 22549196d8acSJiri Slaby unsigned int quot; 22559196d8acSJiri Slaby 22569196d8acSJiri Slaby /* 22579196d8acSJiri Slaby * Handle magic divisors for baud rates above baud_base on 22589196d8acSJiri Slaby * SMSC SuperIO chips. 22599196d8acSJiri Slaby */ 22609196d8acSJiri Slaby if ((port->flags & UPF_MAGIC_MULTIPLIER) && 22619196d8acSJiri Slaby baud == (port->uartclk/4)) 22629196d8acSJiri Slaby quot = 0x8001; 22639196d8acSJiri Slaby else if ((port->flags & UPF_MAGIC_MULTIPLIER) && 22649196d8acSJiri Slaby baud == (port->uartclk/8)) 22659196d8acSJiri Slaby quot = 0x8002; 22669196d8acSJiri Slaby else 22679196d8acSJiri Slaby quot = uart_get_divisor(port, baud); 22689196d8acSJiri Slaby 22699196d8acSJiri Slaby return quot; 22709196d8acSJiri Slaby } 22719196d8acSJiri Slaby 22729196d8acSJiri Slaby void 22739196d8acSJiri Slaby serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, 22749196d8acSJiri Slaby struct ktermios *old) 22759196d8acSJiri Slaby { 22769196d8acSJiri Slaby struct uart_8250_port *up = 22779196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 22789196d8acSJiri Slaby unsigned char cval, fcr = 0; 22799196d8acSJiri Slaby unsigned long flags; 22809196d8acSJiri Slaby unsigned int baud, quot; 22819196d8acSJiri Slaby int fifo_bug = 0; 22829196d8acSJiri Slaby 22839196d8acSJiri Slaby switch (termios->c_cflag & CSIZE) { 22849196d8acSJiri Slaby case CS5: 22859196d8acSJiri Slaby cval = UART_LCR_WLEN5; 22869196d8acSJiri Slaby break; 22879196d8acSJiri Slaby case CS6: 22889196d8acSJiri Slaby cval = UART_LCR_WLEN6; 22899196d8acSJiri Slaby break; 22909196d8acSJiri Slaby case CS7: 22919196d8acSJiri Slaby cval = UART_LCR_WLEN7; 22929196d8acSJiri Slaby break; 22939196d8acSJiri Slaby default: 22949196d8acSJiri Slaby case CS8: 22959196d8acSJiri Slaby cval = UART_LCR_WLEN8; 22969196d8acSJiri Slaby break; 22979196d8acSJiri Slaby } 22989196d8acSJiri Slaby 22999196d8acSJiri Slaby if (termios->c_cflag & CSTOPB) 23009196d8acSJiri Slaby cval |= UART_LCR_STOP; 23019196d8acSJiri Slaby if (termios->c_cflag & PARENB) { 23029196d8acSJiri Slaby cval |= UART_LCR_PARITY; 23039196d8acSJiri Slaby if (up->bugs & UART_BUG_PARITY) 23049196d8acSJiri Slaby fifo_bug = 1; 23059196d8acSJiri Slaby } 23069196d8acSJiri Slaby if (!(termios->c_cflag & PARODD)) 23079196d8acSJiri Slaby cval |= UART_LCR_EPAR; 23089196d8acSJiri Slaby #ifdef CMSPAR 23099196d8acSJiri Slaby if (termios->c_cflag & CMSPAR) 23109196d8acSJiri Slaby cval |= UART_LCR_SPAR; 23119196d8acSJiri Slaby #endif 23129196d8acSJiri Slaby 23139196d8acSJiri Slaby /* 23149196d8acSJiri Slaby * Ask the core to calculate the divisor for us. 23159196d8acSJiri Slaby */ 23169196d8acSJiri Slaby baud = uart_get_baud_rate(port, termios, old, 23179196d8acSJiri Slaby port->uartclk / 16 / 0xffff, 23189196d8acSJiri Slaby port->uartclk / 16); 23199196d8acSJiri Slaby quot = serial8250_get_divisor(port, baud); 23209196d8acSJiri Slaby 23219196d8acSJiri Slaby /* 23229196d8acSJiri Slaby * Oxford Semi 952 rev B workaround 23239196d8acSJiri Slaby */ 23249196d8acSJiri Slaby if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0) 23259196d8acSJiri Slaby quot++; 23269196d8acSJiri Slaby 23279196d8acSJiri Slaby if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { 23289196d8acSJiri Slaby fcr = uart_config[port->type].fcr; 23292797f6fbSHeikki Krogerus if ((baud < 2400 && !up->dma) || fifo_bug) { 23309196d8acSJiri Slaby fcr &= ~UART_FCR_TRIGGER_MASK; 23319196d8acSJiri Slaby fcr |= UART_FCR_TRIGGER_1; 23329196d8acSJiri Slaby } 23339196d8acSJiri Slaby } 23349196d8acSJiri Slaby 23359196d8acSJiri Slaby /* 23369196d8acSJiri Slaby * MCR-based auto flow control. When AFE is enabled, RTS will be 23379196d8acSJiri Slaby * deasserted when the receive FIFO contains more characters than 23389196d8acSJiri Slaby * the trigger, or the MCR RTS bit is cleared. In the case where 23399196d8acSJiri Slaby * the remote UART is not using CTS auto flow control, we must 23409196d8acSJiri Slaby * have sufficient FIFO entries for the latency of the remote 23419196d8acSJiri Slaby * UART to respond. IOW, at least 32 bytes of FIFO. 23429196d8acSJiri Slaby */ 23439196d8acSJiri Slaby if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) { 23449196d8acSJiri Slaby up->mcr &= ~UART_MCR_AFE; 23459196d8acSJiri Slaby if (termios->c_cflag & CRTSCTS) 23469196d8acSJiri Slaby up->mcr |= UART_MCR_AFE; 23479196d8acSJiri Slaby } 23489196d8acSJiri Slaby 23499196d8acSJiri Slaby /* 23509196d8acSJiri Slaby * Ok, we're now changing the port state. Do it with 23519196d8acSJiri Slaby * interrupts disabled. 23529196d8acSJiri Slaby */ 23539196d8acSJiri Slaby spin_lock_irqsave(&port->lock, flags); 23549196d8acSJiri Slaby 23559196d8acSJiri Slaby /* 23569196d8acSJiri Slaby * Update the per-port timeout. 23579196d8acSJiri Slaby */ 23589196d8acSJiri Slaby uart_update_timeout(port, termios->c_cflag, baud); 23599196d8acSJiri Slaby 23609196d8acSJiri Slaby port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 23619196d8acSJiri Slaby if (termios->c_iflag & INPCK) 23629196d8acSJiri Slaby port->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 23639196d8acSJiri Slaby if (termios->c_iflag & (BRKINT | PARMRK)) 23649196d8acSJiri Slaby port->read_status_mask |= UART_LSR_BI; 23659196d8acSJiri Slaby 23669196d8acSJiri Slaby /* 23679196d8acSJiri Slaby * Characteres to ignore 23689196d8acSJiri Slaby */ 23699196d8acSJiri Slaby port->ignore_status_mask = 0; 23709196d8acSJiri Slaby if (termios->c_iflag & IGNPAR) 23719196d8acSJiri Slaby port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 23729196d8acSJiri Slaby if (termios->c_iflag & IGNBRK) { 23739196d8acSJiri Slaby port->ignore_status_mask |= UART_LSR_BI; 23749196d8acSJiri Slaby /* 23759196d8acSJiri Slaby * If we're ignoring parity and break indicators, 23769196d8acSJiri Slaby * ignore overruns too (for real raw support). 23779196d8acSJiri Slaby */ 23789196d8acSJiri Slaby if (termios->c_iflag & IGNPAR) 23799196d8acSJiri Slaby port->ignore_status_mask |= UART_LSR_OE; 23809196d8acSJiri Slaby } 23819196d8acSJiri Slaby 23829196d8acSJiri Slaby /* 23839196d8acSJiri Slaby * ignore all characters if CREAD is not set 23849196d8acSJiri Slaby */ 23859196d8acSJiri Slaby if ((termios->c_cflag & CREAD) == 0) 23869196d8acSJiri Slaby port->ignore_status_mask |= UART_LSR_DR; 23879196d8acSJiri Slaby 23889196d8acSJiri Slaby /* 23899196d8acSJiri Slaby * CTS flow control flag and modem status interrupts 23909196d8acSJiri Slaby */ 23919196d8acSJiri Slaby up->ier &= ~UART_IER_MSI; 23929196d8acSJiri Slaby if (!(up->bugs & UART_BUG_NOMSR) && 23939196d8acSJiri Slaby UART_ENABLE_MS(&up->port, termios->c_cflag)) 23949196d8acSJiri Slaby up->ier |= UART_IER_MSI; 23959196d8acSJiri Slaby if (up->capabilities & UART_CAP_UUE) 23969196d8acSJiri Slaby up->ier |= UART_IER_UUE; 23979196d8acSJiri Slaby if (up->capabilities & UART_CAP_RTOIE) 23989196d8acSJiri Slaby up->ier |= UART_IER_RTOIE; 23999196d8acSJiri Slaby 24009196d8acSJiri Slaby serial_port_out(port, UART_IER, up->ier); 24019196d8acSJiri Slaby 24029196d8acSJiri Slaby if (up->capabilities & UART_CAP_EFR) { 24039196d8acSJiri Slaby unsigned char efr = 0; 24049196d8acSJiri Slaby /* 24059196d8acSJiri Slaby * TI16C752/Startech hardware flow control. FIXME: 24069196d8acSJiri Slaby * - TI16C752 requires control thresholds to be set. 24079196d8acSJiri Slaby * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled. 24089196d8acSJiri Slaby */ 24099196d8acSJiri Slaby if (termios->c_cflag & CRTSCTS) 24109196d8acSJiri Slaby efr |= UART_EFR_CTS; 24119196d8acSJiri Slaby 24129196d8acSJiri Slaby serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B); 24139196d8acSJiri Slaby if (port->flags & UPF_EXAR_EFR) 24149196d8acSJiri Slaby serial_port_out(port, UART_XR_EFR, efr); 24159196d8acSJiri Slaby else 24169196d8acSJiri Slaby serial_port_out(port, UART_EFR, efr); 24179196d8acSJiri Slaby } 24189196d8acSJiri Slaby 24199196d8acSJiri Slaby /* Workaround to enable 115200 baud on OMAP1510 internal ports */ 24209196d8acSJiri Slaby if (is_omap1510_8250(up)) { 24219196d8acSJiri Slaby if (baud == 115200) { 24229196d8acSJiri Slaby quot = 1; 24239196d8acSJiri Slaby serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1); 24249196d8acSJiri Slaby } else 24259196d8acSJiri Slaby serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0); 24269196d8acSJiri Slaby } 24279196d8acSJiri Slaby 24289196d8acSJiri Slaby /* 24299196d8acSJiri Slaby * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2, 24309196d8acSJiri Slaby * otherwise just set DLAB 24319196d8acSJiri Slaby */ 24329196d8acSJiri Slaby if (up->capabilities & UART_NATSEMI) 24339196d8acSJiri Slaby serial_port_out(port, UART_LCR, 0xe0); 24349196d8acSJiri Slaby else 24359196d8acSJiri Slaby serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB); 24369196d8acSJiri Slaby 24379196d8acSJiri Slaby serial_dl_write(up, quot); 24389196d8acSJiri Slaby 24399196d8acSJiri Slaby /* 244045a7bd63SJoe Schultz * XR17V35x UARTs have an extra fractional divisor register (DLD) 244145a7bd63SJoe Schultz * 244245a7bd63SJoe Schultz * We need to recalculate all of the registers, because DLM and DLL 244345a7bd63SJoe Schultz * are already rounded to a whole integer. 244445a7bd63SJoe Schultz * 244545a7bd63SJoe Schultz * When recalculating we use a 32x clock instead of a 16x clock to 244645a7bd63SJoe Schultz * allow 1-bit for rounding in the fractional part. 244745a7bd63SJoe Schultz */ 244845a7bd63SJoe Schultz if (up->port.type == PORT_XR17V35X) { 244945a7bd63SJoe Schultz unsigned int baud_x32 = (port->uartclk * 2) / baud; 245045a7bd63SJoe Schultz u16 quot = baud_x32 / 32; 245145a7bd63SJoe Schultz u8 quot_frac = DIV_ROUND_CLOSEST(baud_x32 % 32, 2); 245245a7bd63SJoe Schultz 245345a7bd63SJoe Schultz serial_dl_write(up, quot); 245445a7bd63SJoe Schultz serial_port_out(port, 0x2, quot_frac & 0xf); 245545a7bd63SJoe Schultz } 245645a7bd63SJoe Schultz 245745a7bd63SJoe Schultz /* 24589196d8acSJiri Slaby * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR 24599196d8acSJiri Slaby * is written without DLAB set, this mode will be disabled. 24609196d8acSJiri Slaby */ 24619196d8acSJiri Slaby if (port->type == PORT_16750) 24629196d8acSJiri Slaby serial_port_out(port, UART_FCR, fcr); 24639196d8acSJiri Slaby 24649196d8acSJiri Slaby serial_port_out(port, UART_LCR, cval); /* reset DLAB */ 24659196d8acSJiri Slaby up->lcr = cval; /* Save LCR */ 24669196d8acSJiri Slaby if (port->type != PORT_16750) { 24679196d8acSJiri Slaby /* emulated UARTs (Lucent Venus 167x) need two steps */ 24689196d8acSJiri Slaby if (fcr & UART_FCR_ENABLE_FIFO) 24699196d8acSJiri Slaby serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO); 24709196d8acSJiri Slaby serial_port_out(port, UART_FCR, fcr); /* set fcr */ 24719196d8acSJiri Slaby } 24729196d8acSJiri Slaby serial8250_set_mctrl(port, port->mctrl); 24739196d8acSJiri Slaby spin_unlock_irqrestore(&port->lock, flags); 24749196d8acSJiri Slaby /* Don't rewrite B0 */ 24759196d8acSJiri Slaby if (tty_termios_baud_rate(termios)) 24769196d8acSJiri Slaby tty_termios_encode_baud_rate(termios, baud, baud); 24779196d8acSJiri Slaby } 24789196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_do_set_termios); 24799196d8acSJiri Slaby 24809196d8acSJiri Slaby static void 24819196d8acSJiri Slaby serial8250_set_termios(struct uart_port *port, struct ktermios *termios, 24829196d8acSJiri Slaby struct ktermios *old) 24839196d8acSJiri Slaby { 24849196d8acSJiri Slaby if (port->set_termios) 24859196d8acSJiri Slaby port->set_termios(port, termios, old); 24869196d8acSJiri Slaby else 24879196d8acSJiri Slaby serial8250_do_set_termios(port, termios, old); 24889196d8acSJiri Slaby } 24899196d8acSJiri Slaby 24909196d8acSJiri Slaby static void 24919196d8acSJiri Slaby serial8250_set_ldisc(struct uart_port *port, int new) 24929196d8acSJiri Slaby { 24939196d8acSJiri Slaby if (new == N_PPS) { 24949196d8acSJiri Slaby port->flags |= UPF_HARDPPS_CD; 24959196d8acSJiri Slaby serial8250_enable_ms(port); 24969196d8acSJiri Slaby } else 24979196d8acSJiri Slaby port->flags &= ~UPF_HARDPPS_CD; 24989196d8acSJiri Slaby } 24999196d8acSJiri Slaby 25009196d8acSJiri Slaby 25019196d8acSJiri Slaby void serial8250_do_pm(struct uart_port *port, unsigned int state, 25029196d8acSJiri Slaby unsigned int oldstate) 25039196d8acSJiri Slaby { 25049196d8acSJiri Slaby struct uart_8250_port *p = 25059196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 25069196d8acSJiri Slaby 25079196d8acSJiri Slaby serial8250_set_sleep(p, state != 0); 25089196d8acSJiri Slaby } 25099196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_do_pm); 25109196d8acSJiri Slaby 25119196d8acSJiri Slaby static void 25129196d8acSJiri Slaby serial8250_pm(struct uart_port *port, unsigned int state, 25139196d8acSJiri Slaby unsigned int oldstate) 25149196d8acSJiri Slaby { 25159196d8acSJiri Slaby if (port->pm) 25169196d8acSJiri Slaby port->pm(port, state, oldstate); 25179196d8acSJiri Slaby else 25189196d8acSJiri Slaby serial8250_do_pm(port, state, oldstate); 25199196d8acSJiri Slaby } 25209196d8acSJiri Slaby 25219196d8acSJiri Slaby static unsigned int serial8250_port_size(struct uart_8250_port *pt) 25229196d8acSJiri Slaby { 25239196d8acSJiri Slaby if (pt->port.iotype == UPIO_AU) 25249196d8acSJiri Slaby return 0x1000; 25259196d8acSJiri Slaby if (is_omap1_8250(pt)) 25269196d8acSJiri Slaby return 0x16 << pt->port.regshift; 25279196d8acSJiri Slaby 25289196d8acSJiri Slaby return 8 << pt->port.regshift; 25299196d8acSJiri Slaby } 25309196d8acSJiri Slaby 25319196d8acSJiri Slaby /* 25329196d8acSJiri Slaby * Resource handling. 25339196d8acSJiri Slaby */ 25349196d8acSJiri Slaby static int serial8250_request_std_resource(struct uart_8250_port *up) 25359196d8acSJiri Slaby { 25369196d8acSJiri Slaby unsigned int size = serial8250_port_size(up); 25379196d8acSJiri Slaby struct uart_port *port = &up->port; 25389196d8acSJiri Slaby int ret = 0; 25399196d8acSJiri Slaby 25409196d8acSJiri Slaby switch (port->iotype) { 25419196d8acSJiri Slaby case UPIO_AU: 25429196d8acSJiri Slaby case UPIO_TSI: 25439196d8acSJiri Slaby case UPIO_MEM32: 25449196d8acSJiri Slaby case UPIO_MEM: 25459196d8acSJiri Slaby if (!port->mapbase) 25469196d8acSJiri Slaby break; 25479196d8acSJiri Slaby 25489196d8acSJiri Slaby if (!request_mem_region(port->mapbase, size, "serial")) { 25499196d8acSJiri Slaby ret = -EBUSY; 25509196d8acSJiri Slaby break; 25519196d8acSJiri Slaby } 25529196d8acSJiri Slaby 25539196d8acSJiri Slaby if (port->flags & UPF_IOREMAP) { 25549196d8acSJiri Slaby port->membase = ioremap_nocache(port->mapbase, size); 25559196d8acSJiri Slaby if (!port->membase) { 25569196d8acSJiri Slaby release_mem_region(port->mapbase, size); 25579196d8acSJiri Slaby ret = -ENOMEM; 25589196d8acSJiri Slaby } 25599196d8acSJiri Slaby } 25609196d8acSJiri Slaby break; 25619196d8acSJiri Slaby 25629196d8acSJiri Slaby case UPIO_HUB6: 25639196d8acSJiri Slaby case UPIO_PORT: 25649196d8acSJiri Slaby if (!request_region(port->iobase, size, "serial")) 25659196d8acSJiri Slaby ret = -EBUSY; 25669196d8acSJiri Slaby break; 25679196d8acSJiri Slaby } 25689196d8acSJiri Slaby return ret; 25699196d8acSJiri Slaby } 25709196d8acSJiri Slaby 25719196d8acSJiri Slaby static void serial8250_release_std_resource(struct uart_8250_port *up) 25729196d8acSJiri Slaby { 25739196d8acSJiri Slaby unsigned int size = serial8250_port_size(up); 25749196d8acSJiri Slaby struct uart_port *port = &up->port; 25759196d8acSJiri Slaby 25769196d8acSJiri Slaby switch (port->iotype) { 25779196d8acSJiri Slaby case UPIO_AU: 25789196d8acSJiri Slaby case UPIO_TSI: 25799196d8acSJiri Slaby case UPIO_MEM32: 25809196d8acSJiri Slaby case UPIO_MEM: 25819196d8acSJiri Slaby if (!port->mapbase) 25829196d8acSJiri Slaby break; 25839196d8acSJiri Slaby 25849196d8acSJiri Slaby if (port->flags & UPF_IOREMAP) { 25859196d8acSJiri Slaby iounmap(port->membase); 25869196d8acSJiri Slaby port->membase = NULL; 25879196d8acSJiri Slaby } 25889196d8acSJiri Slaby 25899196d8acSJiri Slaby release_mem_region(port->mapbase, size); 25909196d8acSJiri Slaby break; 25919196d8acSJiri Slaby 25929196d8acSJiri Slaby case UPIO_HUB6: 25939196d8acSJiri Slaby case UPIO_PORT: 25949196d8acSJiri Slaby release_region(port->iobase, size); 25959196d8acSJiri Slaby break; 25969196d8acSJiri Slaby } 25979196d8acSJiri Slaby } 25989196d8acSJiri Slaby 25999196d8acSJiri Slaby static int serial8250_request_rsa_resource(struct uart_8250_port *up) 26009196d8acSJiri Slaby { 26019196d8acSJiri Slaby unsigned long start = UART_RSA_BASE << up->port.regshift; 26029196d8acSJiri Slaby unsigned int size = 8 << up->port.regshift; 26039196d8acSJiri Slaby struct uart_port *port = &up->port; 26049196d8acSJiri Slaby int ret = -EINVAL; 26059196d8acSJiri Slaby 26069196d8acSJiri Slaby switch (port->iotype) { 26079196d8acSJiri Slaby case UPIO_HUB6: 26089196d8acSJiri Slaby case UPIO_PORT: 26099196d8acSJiri Slaby start += port->iobase; 26109196d8acSJiri Slaby if (request_region(start, size, "serial-rsa")) 26119196d8acSJiri Slaby ret = 0; 26129196d8acSJiri Slaby else 26139196d8acSJiri Slaby ret = -EBUSY; 26149196d8acSJiri Slaby break; 26159196d8acSJiri Slaby } 26169196d8acSJiri Slaby 26179196d8acSJiri Slaby return ret; 26189196d8acSJiri Slaby } 26199196d8acSJiri Slaby 26209196d8acSJiri Slaby static void serial8250_release_rsa_resource(struct uart_8250_port *up) 26219196d8acSJiri Slaby { 26229196d8acSJiri Slaby unsigned long offset = UART_RSA_BASE << up->port.regshift; 26239196d8acSJiri Slaby unsigned int size = 8 << up->port.regshift; 26249196d8acSJiri Slaby struct uart_port *port = &up->port; 26259196d8acSJiri Slaby 26269196d8acSJiri Slaby switch (port->iotype) { 26279196d8acSJiri Slaby case UPIO_HUB6: 26289196d8acSJiri Slaby case UPIO_PORT: 26299196d8acSJiri Slaby release_region(port->iobase + offset, size); 26309196d8acSJiri Slaby break; 26319196d8acSJiri Slaby } 26329196d8acSJiri Slaby } 26339196d8acSJiri Slaby 26349196d8acSJiri Slaby static void serial8250_release_port(struct uart_port *port) 26359196d8acSJiri Slaby { 26369196d8acSJiri Slaby struct uart_8250_port *up = 26379196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 26389196d8acSJiri Slaby 26399196d8acSJiri Slaby serial8250_release_std_resource(up); 26409196d8acSJiri Slaby if (port->type == PORT_RSA) 26419196d8acSJiri Slaby serial8250_release_rsa_resource(up); 26429196d8acSJiri Slaby } 26439196d8acSJiri Slaby 26449196d8acSJiri Slaby static int serial8250_request_port(struct uart_port *port) 26459196d8acSJiri Slaby { 26469196d8acSJiri Slaby struct uart_8250_port *up = 26479196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 26489196d8acSJiri Slaby int ret; 26499196d8acSJiri Slaby 26509196d8acSJiri Slaby if (port->type == PORT_8250_CIR) 26519196d8acSJiri Slaby return -ENODEV; 26529196d8acSJiri Slaby 26539196d8acSJiri Slaby ret = serial8250_request_std_resource(up); 26549196d8acSJiri Slaby if (ret == 0 && port->type == PORT_RSA) { 26559196d8acSJiri Slaby ret = serial8250_request_rsa_resource(up); 26569196d8acSJiri Slaby if (ret < 0) 26579196d8acSJiri Slaby serial8250_release_std_resource(up); 26589196d8acSJiri Slaby } 26599196d8acSJiri Slaby 26609196d8acSJiri Slaby return ret; 26619196d8acSJiri Slaby } 26629196d8acSJiri Slaby 26639196d8acSJiri Slaby static void serial8250_config_port(struct uart_port *port, int flags) 26649196d8acSJiri Slaby { 26659196d8acSJiri Slaby struct uart_8250_port *up = 26669196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 26679196d8acSJiri Slaby int probeflags = PROBE_ANY; 26689196d8acSJiri Slaby int ret; 26699196d8acSJiri Slaby 26709196d8acSJiri Slaby if (port->type == PORT_8250_CIR) 26719196d8acSJiri Slaby return; 26729196d8acSJiri Slaby 26739196d8acSJiri Slaby /* 26749196d8acSJiri Slaby * Find the region that we can probe for. This in turn 26759196d8acSJiri Slaby * tells us whether we can probe for the type of port. 26769196d8acSJiri Slaby */ 26779196d8acSJiri Slaby ret = serial8250_request_std_resource(up); 26789196d8acSJiri Slaby if (ret < 0) 26799196d8acSJiri Slaby return; 26809196d8acSJiri Slaby 26819196d8acSJiri Slaby ret = serial8250_request_rsa_resource(up); 26829196d8acSJiri Slaby if (ret < 0) 26839196d8acSJiri Slaby probeflags &= ~PROBE_RSA; 26849196d8acSJiri Slaby 26859196d8acSJiri Slaby if (port->iotype != up->cur_iotype) 26869196d8acSJiri Slaby set_io_from_upio(port); 26879196d8acSJiri Slaby 26889196d8acSJiri Slaby if (flags & UART_CONFIG_TYPE) 26899196d8acSJiri Slaby autoconfig(up, probeflags); 26909196d8acSJiri Slaby 26919196d8acSJiri Slaby /* if access method is AU, it is a 16550 with a quirk */ 26929196d8acSJiri Slaby if (port->type == PORT_16550A && port->iotype == UPIO_AU) 26939196d8acSJiri Slaby up->bugs |= UART_BUG_NOMSR; 26949196d8acSJiri Slaby 26953685f19eSStephen Warren /* HW bugs may trigger IRQ while IIR == NO_INT */ 26963685f19eSStephen Warren if (port->type == PORT_TEGRA) 26973685f19eSStephen Warren up->bugs |= UART_BUG_NOMSR; 26983685f19eSStephen Warren 26999196d8acSJiri Slaby if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) 27009196d8acSJiri Slaby autoconfig_irq(up); 27019196d8acSJiri Slaby 27029196d8acSJiri Slaby if (port->type != PORT_RSA && probeflags & PROBE_RSA) 27039196d8acSJiri Slaby serial8250_release_rsa_resource(up); 27049196d8acSJiri Slaby if (port->type == PORT_UNKNOWN) 27059196d8acSJiri Slaby serial8250_release_std_resource(up); 27069196d8acSJiri Slaby 27079196d8acSJiri Slaby /* Fixme: probably not the best place for this */ 27089196d8acSJiri Slaby if ((port->type == PORT_XR17V35X) || 27099196d8acSJiri Slaby (port->type == PORT_XR17D15X)) 27109196d8acSJiri Slaby port->handle_irq = exar_handle_irq; 27119196d8acSJiri Slaby } 27129196d8acSJiri Slaby 27139196d8acSJiri Slaby static int 27149196d8acSJiri Slaby serial8250_verify_port(struct uart_port *port, struct serial_struct *ser) 27159196d8acSJiri Slaby { 27169196d8acSJiri Slaby if (ser->irq >= nr_irqs || ser->irq < 0 || 27179196d8acSJiri Slaby ser->baud_base < 9600 || ser->type < PORT_UNKNOWN || 27189196d8acSJiri Slaby ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS || 27199196d8acSJiri Slaby ser->type == PORT_STARTECH) 27209196d8acSJiri Slaby return -EINVAL; 27219196d8acSJiri Slaby return 0; 27229196d8acSJiri Slaby } 27239196d8acSJiri Slaby 27249196d8acSJiri Slaby static const char * 27259196d8acSJiri Slaby serial8250_type(struct uart_port *port) 27269196d8acSJiri Slaby { 27279196d8acSJiri Slaby int type = port->type; 27289196d8acSJiri Slaby 27299196d8acSJiri Slaby if (type >= ARRAY_SIZE(uart_config)) 27309196d8acSJiri Slaby type = 0; 27319196d8acSJiri Slaby return uart_config[type].name; 27329196d8acSJiri Slaby } 27339196d8acSJiri Slaby 27349196d8acSJiri Slaby static struct uart_ops serial8250_pops = { 27359196d8acSJiri Slaby .tx_empty = serial8250_tx_empty, 27369196d8acSJiri Slaby .set_mctrl = serial8250_set_mctrl, 27379196d8acSJiri Slaby .get_mctrl = serial8250_get_mctrl, 27389196d8acSJiri Slaby .stop_tx = serial8250_stop_tx, 27399196d8acSJiri Slaby .start_tx = serial8250_start_tx, 27409196d8acSJiri Slaby .stop_rx = serial8250_stop_rx, 27419196d8acSJiri Slaby .enable_ms = serial8250_enable_ms, 27429196d8acSJiri Slaby .break_ctl = serial8250_break_ctl, 27439196d8acSJiri Slaby .startup = serial8250_startup, 27449196d8acSJiri Slaby .shutdown = serial8250_shutdown, 27459196d8acSJiri Slaby .set_termios = serial8250_set_termios, 27469196d8acSJiri Slaby .set_ldisc = serial8250_set_ldisc, 27479196d8acSJiri Slaby .pm = serial8250_pm, 27489196d8acSJiri Slaby .type = serial8250_type, 27499196d8acSJiri Slaby .release_port = serial8250_release_port, 27509196d8acSJiri Slaby .request_port = serial8250_request_port, 27519196d8acSJiri Slaby .config_port = serial8250_config_port, 27529196d8acSJiri Slaby .verify_port = serial8250_verify_port, 27539196d8acSJiri Slaby #ifdef CONFIG_CONSOLE_POLL 27549196d8acSJiri Slaby .poll_get_char = serial8250_get_poll_char, 27559196d8acSJiri Slaby .poll_put_char = serial8250_put_poll_char, 27569196d8acSJiri Slaby #endif 27579196d8acSJiri Slaby }; 27589196d8acSJiri Slaby 27599196d8acSJiri Slaby static struct uart_8250_port serial8250_ports[UART_NR]; 27609196d8acSJiri Slaby 27619196d8acSJiri Slaby static void (*serial8250_isa_config)(int port, struct uart_port *up, 27629196d8acSJiri Slaby unsigned short *capabilities); 27639196d8acSJiri Slaby 27649196d8acSJiri Slaby void serial8250_set_isa_configurator( 27659196d8acSJiri Slaby void (*v)(int port, struct uart_port *up, unsigned short *capabilities)) 27669196d8acSJiri Slaby { 27679196d8acSJiri Slaby serial8250_isa_config = v; 27689196d8acSJiri Slaby } 27699196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_set_isa_configurator); 27709196d8acSJiri Slaby 27719196d8acSJiri Slaby static void __init serial8250_isa_init_ports(void) 27729196d8acSJiri Slaby { 27739196d8acSJiri Slaby struct uart_8250_port *up; 27749196d8acSJiri Slaby static int first = 1; 27759196d8acSJiri Slaby int i, irqflag = 0; 27769196d8acSJiri Slaby 27779196d8acSJiri Slaby if (!first) 27789196d8acSJiri Slaby return; 27799196d8acSJiri Slaby first = 0; 27809196d8acSJiri Slaby 27819196d8acSJiri Slaby if (nr_uarts > UART_NR) 27829196d8acSJiri Slaby nr_uarts = UART_NR; 27839196d8acSJiri Slaby 2784317a6842SKyle McMartin for (i = 0; i < nr_uarts; i++) { 27859196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[i]; 27869196d8acSJiri Slaby struct uart_port *port = &up->port; 27879196d8acSJiri Slaby 27889196d8acSJiri Slaby port->line = i; 27899196d8acSJiri Slaby spin_lock_init(&port->lock); 27909196d8acSJiri Slaby 27919196d8acSJiri Slaby init_timer(&up->timer); 27929196d8acSJiri Slaby up->timer.function = serial8250_timeout; 27939196d8acSJiri Slaby up->cur_iotype = 0xFF; 27949196d8acSJiri Slaby 27959196d8acSJiri Slaby /* 27969196d8acSJiri Slaby * ALPHA_KLUDGE_MCR needs to be killed. 27979196d8acSJiri Slaby */ 27989196d8acSJiri Slaby up->mcr_mask = ~ALPHA_KLUDGE_MCR; 27999196d8acSJiri Slaby up->mcr_force = ALPHA_KLUDGE_MCR; 28009196d8acSJiri Slaby 28019196d8acSJiri Slaby port->ops = &serial8250_pops; 28029196d8acSJiri Slaby } 28039196d8acSJiri Slaby 28049196d8acSJiri Slaby if (share_irqs) 28059196d8acSJiri Slaby irqflag = IRQF_SHARED; 28069196d8acSJiri Slaby 28079196d8acSJiri Slaby for (i = 0, up = serial8250_ports; 28089196d8acSJiri Slaby i < ARRAY_SIZE(old_serial_port) && i < nr_uarts; 28099196d8acSJiri Slaby i++, up++) { 28109196d8acSJiri Slaby struct uart_port *port = &up->port; 28119196d8acSJiri Slaby 28129196d8acSJiri Slaby port->iobase = old_serial_port[i].port; 28139196d8acSJiri Slaby port->irq = irq_canonicalize(old_serial_port[i].irq); 28149196d8acSJiri Slaby port->irqflags = old_serial_port[i].irqflags; 28159196d8acSJiri Slaby port->uartclk = old_serial_port[i].baud_base * 16; 28169196d8acSJiri Slaby port->flags = old_serial_port[i].flags; 28179196d8acSJiri Slaby port->hub6 = old_serial_port[i].hub6; 28189196d8acSJiri Slaby port->membase = old_serial_port[i].iomem_base; 28199196d8acSJiri Slaby port->iotype = old_serial_port[i].io_type; 28209196d8acSJiri Slaby port->regshift = old_serial_port[i].iomem_reg_shift; 28219196d8acSJiri Slaby set_io_from_upio(port); 28229196d8acSJiri Slaby port->irqflags |= irqflag; 28239196d8acSJiri Slaby if (serial8250_isa_config != NULL) 28249196d8acSJiri Slaby serial8250_isa_config(i, &up->port, &up->capabilities); 28259196d8acSJiri Slaby 28269196d8acSJiri Slaby } 28279196d8acSJiri Slaby } 28289196d8acSJiri Slaby 28299196d8acSJiri Slaby static void 28309196d8acSJiri Slaby serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type) 28319196d8acSJiri Slaby { 28329196d8acSJiri Slaby up->port.type = type; 28339196d8acSJiri Slaby if (!up->port.fifosize) 28349196d8acSJiri Slaby up->port.fifosize = uart_config[type].fifo_size; 28359196d8acSJiri Slaby if (!up->tx_loadsz) 28369196d8acSJiri Slaby up->tx_loadsz = uart_config[type].tx_loadsz; 28379196d8acSJiri Slaby if (!up->capabilities) 28389196d8acSJiri Slaby up->capabilities = uart_config[type].flags; 28399196d8acSJiri Slaby } 28409196d8acSJiri Slaby 28419196d8acSJiri Slaby static void __init 28429196d8acSJiri Slaby serial8250_register_ports(struct uart_driver *drv, struct device *dev) 28439196d8acSJiri Slaby { 28449196d8acSJiri Slaby int i; 28459196d8acSJiri Slaby 28469196d8acSJiri Slaby for (i = 0; i < nr_uarts; i++) { 28479196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[i]; 28489196d8acSJiri Slaby 28499196d8acSJiri Slaby if (up->port.dev) 28509196d8acSJiri Slaby continue; 28519196d8acSJiri Slaby 28529196d8acSJiri Slaby up->port.dev = dev; 28539196d8acSJiri Slaby 28549196d8acSJiri Slaby if (up->port.flags & UPF_FIXED_TYPE) 28559196d8acSJiri Slaby serial8250_init_fixed_type_port(up, up->port.type); 28569196d8acSJiri Slaby 28579196d8acSJiri Slaby uart_add_one_port(drv, &up->port); 28589196d8acSJiri Slaby } 28599196d8acSJiri Slaby } 28609196d8acSJiri Slaby 28619196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_CONSOLE 28629196d8acSJiri Slaby 28639196d8acSJiri Slaby static void serial8250_console_putchar(struct uart_port *port, int ch) 28649196d8acSJiri Slaby { 28659196d8acSJiri Slaby struct uart_8250_port *up = 28669196d8acSJiri Slaby container_of(port, struct uart_8250_port, port); 28679196d8acSJiri Slaby 28689196d8acSJiri Slaby wait_for_xmitr(up, UART_LSR_THRE); 28699196d8acSJiri Slaby serial_port_out(port, UART_TX, ch); 28709196d8acSJiri Slaby } 28719196d8acSJiri Slaby 28729196d8acSJiri Slaby /* 28739196d8acSJiri Slaby * Print a string to the serial port trying not to disturb 28749196d8acSJiri Slaby * any possible real use of the port... 28759196d8acSJiri Slaby * 28769196d8acSJiri Slaby * The console_lock must be held when we get here. 28779196d8acSJiri Slaby */ 28789196d8acSJiri Slaby static void 28799196d8acSJiri Slaby serial8250_console_write(struct console *co, const char *s, unsigned int count) 28809196d8acSJiri Slaby { 28819196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[co->index]; 28829196d8acSJiri Slaby struct uart_port *port = &up->port; 28839196d8acSJiri Slaby unsigned long flags; 28849196d8acSJiri Slaby unsigned int ier; 28859196d8acSJiri Slaby int locked = 1; 28869196d8acSJiri Slaby 28879196d8acSJiri Slaby touch_nmi_watchdog(); 28889196d8acSJiri Slaby 28899196d8acSJiri Slaby local_irq_save(flags); 28909196d8acSJiri Slaby if (port->sysrq) { 28919196d8acSJiri Slaby /* serial8250_handle_irq() already took the lock */ 28929196d8acSJiri Slaby locked = 0; 28939196d8acSJiri Slaby } else if (oops_in_progress) { 28949196d8acSJiri Slaby locked = spin_trylock(&port->lock); 28959196d8acSJiri Slaby } else 28969196d8acSJiri Slaby spin_lock(&port->lock); 28979196d8acSJiri Slaby 28989196d8acSJiri Slaby /* 28999196d8acSJiri Slaby * First save the IER then disable the interrupts 29009196d8acSJiri Slaby */ 29019196d8acSJiri Slaby ier = serial_port_in(port, UART_IER); 29029196d8acSJiri Slaby 29039196d8acSJiri Slaby if (up->capabilities & UART_CAP_UUE) 29049196d8acSJiri Slaby serial_port_out(port, UART_IER, UART_IER_UUE); 29059196d8acSJiri Slaby else 29069196d8acSJiri Slaby serial_port_out(port, UART_IER, 0); 29079196d8acSJiri Slaby 29089196d8acSJiri Slaby uart_console_write(port, s, count, serial8250_console_putchar); 29099196d8acSJiri Slaby 29109196d8acSJiri Slaby /* 29119196d8acSJiri Slaby * Finally, wait for transmitter to become empty 29129196d8acSJiri Slaby * and restore the IER 29139196d8acSJiri Slaby */ 29149196d8acSJiri Slaby wait_for_xmitr(up, BOTH_EMPTY); 29159196d8acSJiri Slaby serial_port_out(port, UART_IER, ier); 29169196d8acSJiri Slaby 29179196d8acSJiri Slaby /* 29189196d8acSJiri Slaby * The receive handling will happen properly because the 29199196d8acSJiri Slaby * receive ready bit will still be set; it is not cleared 29209196d8acSJiri Slaby * on read. However, modem control will not, we must 29219196d8acSJiri Slaby * call it if we have saved something in the saved flags 29229196d8acSJiri Slaby * while processing with interrupts off. 29239196d8acSJiri Slaby */ 29249196d8acSJiri Slaby if (up->msr_saved_flags) 29259196d8acSJiri Slaby serial8250_modem_status(up); 29269196d8acSJiri Slaby 29279196d8acSJiri Slaby if (locked) 29289196d8acSJiri Slaby spin_unlock(&port->lock); 29299196d8acSJiri Slaby local_irq_restore(flags); 29309196d8acSJiri Slaby } 29319196d8acSJiri Slaby 29329196d8acSJiri Slaby static int __init serial8250_console_setup(struct console *co, char *options) 29339196d8acSJiri Slaby { 29349196d8acSJiri Slaby struct uart_port *port; 29359196d8acSJiri Slaby int baud = 9600; 29369196d8acSJiri Slaby int bits = 8; 29379196d8acSJiri Slaby int parity = 'n'; 29389196d8acSJiri Slaby int flow = 'n'; 29399196d8acSJiri Slaby 29409196d8acSJiri Slaby /* 29419196d8acSJiri Slaby * Check whether an invalid uart number has been specified, and 29429196d8acSJiri Slaby * if so, search for the first available port that does have 29439196d8acSJiri Slaby * console support. 29449196d8acSJiri Slaby */ 2945317a6842SKyle McMartin if (co->index >= nr_uarts) 29469196d8acSJiri Slaby co->index = 0; 29479196d8acSJiri Slaby port = &serial8250_ports[co->index].port; 29489196d8acSJiri Slaby if (!port->iobase && !port->membase) 29499196d8acSJiri Slaby return -ENODEV; 29509196d8acSJiri Slaby 29519196d8acSJiri Slaby if (options) 29529196d8acSJiri Slaby uart_parse_options(options, &baud, &parity, &bits, &flow); 29539196d8acSJiri Slaby 29549196d8acSJiri Slaby return uart_set_options(port, co, baud, parity, bits, flow); 29559196d8acSJiri Slaby } 29569196d8acSJiri Slaby 29579196d8acSJiri Slaby static int serial8250_console_early_setup(void) 29589196d8acSJiri Slaby { 29599196d8acSJiri Slaby return serial8250_find_port_for_earlycon(); 29609196d8acSJiri Slaby } 29619196d8acSJiri Slaby 29629196d8acSJiri Slaby static struct console serial8250_console = { 29639196d8acSJiri Slaby .name = "ttyS", 29649196d8acSJiri Slaby .write = serial8250_console_write, 29659196d8acSJiri Slaby .device = uart_console_device, 29669196d8acSJiri Slaby .setup = serial8250_console_setup, 29679196d8acSJiri Slaby .early_setup = serial8250_console_early_setup, 29689196d8acSJiri Slaby .flags = CON_PRINTBUFFER | CON_ANYTIME, 29699196d8acSJiri Slaby .index = -1, 29709196d8acSJiri Slaby .data = &serial8250_reg, 29719196d8acSJiri Slaby }; 29729196d8acSJiri Slaby 29739196d8acSJiri Slaby static int __init serial8250_console_init(void) 29749196d8acSJiri Slaby { 29759196d8acSJiri Slaby serial8250_isa_init_ports(); 29769196d8acSJiri Slaby register_console(&serial8250_console); 29779196d8acSJiri Slaby return 0; 29789196d8acSJiri Slaby } 29799196d8acSJiri Slaby console_initcall(serial8250_console_init); 29809196d8acSJiri Slaby 29819196d8acSJiri Slaby int serial8250_find_port(struct uart_port *p) 29829196d8acSJiri Slaby { 29839196d8acSJiri Slaby int line; 29849196d8acSJiri Slaby struct uart_port *port; 29859196d8acSJiri Slaby 2986317a6842SKyle McMartin for (line = 0; line < nr_uarts; line++) { 29879196d8acSJiri Slaby port = &serial8250_ports[line].port; 29889196d8acSJiri Slaby if (uart_match_port(p, port)) 29899196d8acSJiri Slaby return line; 29909196d8acSJiri Slaby } 29919196d8acSJiri Slaby return -ENODEV; 29929196d8acSJiri Slaby } 29939196d8acSJiri Slaby 29949196d8acSJiri Slaby #define SERIAL8250_CONSOLE &serial8250_console 29959196d8acSJiri Slaby #else 29969196d8acSJiri Slaby #define SERIAL8250_CONSOLE NULL 29979196d8acSJiri Slaby #endif 29989196d8acSJiri Slaby 29999196d8acSJiri Slaby static struct uart_driver serial8250_reg = { 30009196d8acSJiri Slaby .owner = THIS_MODULE, 30019196d8acSJiri Slaby .driver_name = "serial", 30029196d8acSJiri Slaby .dev_name = "ttyS", 30039196d8acSJiri Slaby .major = TTY_MAJOR, 30049196d8acSJiri Slaby .minor = 64, 30059196d8acSJiri Slaby .cons = SERIAL8250_CONSOLE, 30069196d8acSJiri Slaby }; 30079196d8acSJiri Slaby 30089196d8acSJiri Slaby /* 30099196d8acSJiri Slaby * early_serial_setup - early registration for 8250 ports 30109196d8acSJiri Slaby * 30119196d8acSJiri Slaby * Setup an 8250 port structure prior to console initialisation. Use 30129196d8acSJiri Slaby * after console initialisation will cause undefined behaviour. 30139196d8acSJiri Slaby */ 30149196d8acSJiri Slaby int __init early_serial_setup(struct uart_port *port) 30159196d8acSJiri Slaby { 30169196d8acSJiri Slaby struct uart_port *p; 30179196d8acSJiri Slaby 30189196d8acSJiri Slaby if (port->line >= ARRAY_SIZE(serial8250_ports)) 30199196d8acSJiri Slaby return -ENODEV; 30209196d8acSJiri Slaby 30219196d8acSJiri Slaby serial8250_isa_init_ports(); 30229196d8acSJiri Slaby p = &serial8250_ports[port->line].port; 30239196d8acSJiri Slaby p->iobase = port->iobase; 30249196d8acSJiri Slaby p->membase = port->membase; 30259196d8acSJiri Slaby p->irq = port->irq; 30269196d8acSJiri Slaby p->irqflags = port->irqflags; 30279196d8acSJiri Slaby p->uartclk = port->uartclk; 30289196d8acSJiri Slaby p->fifosize = port->fifosize; 30299196d8acSJiri Slaby p->regshift = port->regshift; 30309196d8acSJiri Slaby p->iotype = port->iotype; 30319196d8acSJiri Slaby p->flags = port->flags; 30329196d8acSJiri Slaby p->mapbase = port->mapbase; 30339196d8acSJiri Slaby p->private_data = port->private_data; 30349196d8acSJiri Slaby p->type = port->type; 30359196d8acSJiri Slaby p->line = port->line; 30369196d8acSJiri Slaby 30379196d8acSJiri Slaby set_io_from_upio(p); 30389196d8acSJiri Slaby if (port->serial_in) 30399196d8acSJiri Slaby p->serial_in = port->serial_in; 30409196d8acSJiri Slaby if (port->serial_out) 30419196d8acSJiri Slaby p->serial_out = port->serial_out; 30429196d8acSJiri Slaby if (port->handle_irq) 30439196d8acSJiri Slaby p->handle_irq = port->handle_irq; 30449196d8acSJiri Slaby else 30459196d8acSJiri Slaby p->handle_irq = serial8250_default_handle_irq; 30469196d8acSJiri Slaby 30479196d8acSJiri Slaby return 0; 30489196d8acSJiri Slaby } 30499196d8acSJiri Slaby 30509196d8acSJiri Slaby /** 30519196d8acSJiri Slaby * serial8250_suspend_port - suspend one serial port 30529196d8acSJiri Slaby * @line: serial line number 30539196d8acSJiri Slaby * 30549196d8acSJiri Slaby * Suspend one serial port. 30559196d8acSJiri Slaby */ 30569196d8acSJiri Slaby void serial8250_suspend_port(int line) 30579196d8acSJiri Slaby { 30589196d8acSJiri Slaby uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port); 30599196d8acSJiri Slaby } 30609196d8acSJiri Slaby 30619196d8acSJiri Slaby /** 30629196d8acSJiri Slaby * serial8250_resume_port - resume one serial port 30639196d8acSJiri Slaby * @line: serial line number 30649196d8acSJiri Slaby * 30659196d8acSJiri Slaby * Resume one serial port. 30669196d8acSJiri Slaby */ 30679196d8acSJiri Slaby void serial8250_resume_port(int line) 30689196d8acSJiri Slaby { 30699196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[line]; 30709196d8acSJiri Slaby struct uart_port *port = &up->port; 30719196d8acSJiri Slaby 30729196d8acSJiri Slaby if (up->capabilities & UART_NATSEMI) { 30739196d8acSJiri Slaby /* Ensure it's still in high speed mode */ 30749196d8acSJiri Slaby serial_port_out(port, UART_LCR, 0xE0); 30759196d8acSJiri Slaby 30769196d8acSJiri Slaby ns16550a_goto_highspeed(up); 30779196d8acSJiri Slaby 30789196d8acSJiri Slaby serial_port_out(port, UART_LCR, 0); 30799196d8acSJiri Slaby port->uartclk = 921600*16; 30809196d8acSJiri Slaby } 30819196d8acSJiri Slaby uart_resume_port(&serial8250_reg, port); 30829196d8acSJiri Slaby } 30839196d8acSJiri Slaby 30849196d8acSJiri Slaby /* 30859196d8acSJiri Slaby * Register a set of serial devices attached to a platform device. The 30869196d8acSJiri Slaby * list is terminated with a zero flags entry, which means we expect 30879196d8acSJiri Slaby * all entries to have at least UPF_BOOT_AUTOCONF set. 30889196d8acSJiri Slaby */ 30899196d8acSJiri Slaby static int serial8250_probe(struct platform_device *dev) 30909196d8acSJiri Slaby { 3091574de559SJingoo Han struct plat_serial8250_port *p = dev_get_platdata(&dev->dev); 30929196d8acSJiri Slaby struct uart_8250_port uart; 30939196d8acSJiri Slaby int ret, i, irqflag = 0; 30949196d8acSJiri Slaby 30959196d8acSJiri Slaby memset(&uart, 0, sizeof(uart)); 30969196d8acSJiri Slaby 30979196d8acSJiri Slaby if (share_irqs) 30989196d8acSJiri Slaby irqflag = IRQF_SHARED; 30999196d8acSJiri Slaby 31009196d8acSJiri Slaby for (i = 0; p && p->flags != 0; p++, i++) { 31019196d8acSJiri Slaby uart.port.iobase = p->iobase; 31029196d8acSJiri Slaby uart.port.membase = p->membase; 31039196d8acSJiri Slaby uart.port.irq = p->irq; 31049196d8acSJiri Slaby uart.port.irqflags = p->irqflags; 31059196d8acSJiri Slaby uart.port.uartclk = p->uartclk; 31069196d8acSJiri Slaby uart.port.regshift = p->regshift; 31079196d8acSJiri Slaby uart.port.iotype = p->iotype; 31089196d8acSJiri Slaby uart.port.flags = p->flags; 31099196d8acSJiri Slaby uart.port.mapbase = p->mapbase; 31109196d8acSJiri Slaby uart.port.hub6 = p->hub6; 31119196d8acSJiri Slaby uart.port.private_data = p->private_data; 31129196d8acSJiri Slaby uart.port.type = p->type; 31139196d8acSJiri Slaby uart.port.serial_in = p->serial_in; 31149196d8acSJiri Slaby uart.port.serial_out = p->serial_out; 31159196d8acSJiri Slaby uart.port.handle_irq = p->handle_irq; 31169196d8acSJiri Slaby uart.port.handle_break = p->handle_break; 31179196d8acSJiri Slaby uart.port.set_termios = p->set_termios; 31189196d8acSJiri Slaby uart.port.pm = p->pm; 31199196d8acSJiri Slaby uart.port.dev = &dev->dev; 31209196d8acSJiri Slaby uart.port.irqflags |= irqflag; 31219196d8acSJiri Slaby ret = serial8250_register_8250_port(&uart); 31229196d8acSJiri Slaby if (ret < 0) { 31239196d8acSJiri Slaby dev_err(&dev->dev, "unable to register port at index %d " 31249196d8acSJiri Slaby "(IO%lx MEM%llx IRQ%d): %d\n", i, 31259196d8acSJiri Slaby p->iobase, (unsigned long long)p->mapbase, 31269196d8acSJiri Slaby p->irq, ret); 31279196d8acSJiri Slaby } 31289196d8acSJiri Slaby } 31299196d8acSJiri Slaby return 0; 31309196d8acSJiri Slaby } 31319196d8acSJiri Slaby 31329196d8acSJiri Slaby /* 31339196d8acSJiri Slaby * Remove serial ports registered against a platform device. 31349196d8acSJiri Slaby */ 31359196d8acSJiri Slaby static int serial8250_remove(struct platform_device *dev) 31369196d8acSJiri Slaby { 31379196d8acSJiri Slaby int i; 31389196d8acSJiri Slaby 3139317a6842SKyle McMartin for (i = 0; i < nr_uarts; i++) { 31409196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[i]; 31419196d8acSJiri Slaby 31429196d8acSJiri Slaby if (up->port.dev == &dev->dev) 31439196d8acSJiri Slaby serial8250_unregister_port(i); 31449196d8acSJiri Slaby } 31459196d8acSJiri Slaby return 0; 31469196d8acSJiri Slaby } 31479196d8acSJiri Slaby 31489196d8acSJiri Slaby static int serial8250_suspend(struct platform_device *dev, pm_message_t state) 31499196d8acSJiri Slaby { 31509196d8acSJiri Slaby int i; 31519196d8acSJiri Slaby 31529196d8acSJiri Slaby for (i = 0; i < UART_NR; i++) { 31539196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[i]; 31549196d8acSJiri Slaby 31559196d8acSJiri Slaby if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) 31569196d8acSJiri Slaby uart_suspend_port(&serial8250_reg, &up->port); 31579196d8acSJiri Slaby } 31589196d8acSJiri Slaby 31599196d8acSJiri Slaby return 0; 31609196d8acSJiri Slaby } 31619196d8acSJiri Slaby 31629196d8acSJiri Slaby static int serial8250_resume(struct platform_device *dev) 31639196d8acSJiri Slaby { 31649196d8acSJiri Slaby int i; 31659196d8acSJiri Slaby 31669196d8acSJiri Slaby for (i = 0; i < UART_NR; i++) { 31679196d8acSJiri Slaby struct uart_8250_port *up = &serial8250_ports[i]; 31689196d8acSJiri Slaby 31699196d8acSJiri Slaby if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) 31709196d8acSJiri Slaby serial8250_resume_port(i); 31719196d8acSJiri Slaby } 31729196d8acSJiri Slaby 31739196d8acSJiri Slaby return 0; 31749196d8acSJiri Slaby } 31759196d8acSJiri Slaby 31769196d8acSJiri Slaby static struct platform_driver serial8250_isa_driver = { 31779196d8acSJiri Slaby .probe = serial8250_probe, 31789196d8acSJiri Slaby .remove = serial8250_remove, 31799196d8acSJiri Slaby .suspend = serial8250_suspend, 31809196d8acSJiri Slaby .resume = serial8250_resume, 31819196d8acSJiri Slaby .driver = { 31829196d8acSJiri Slaby .name = "serial8250", 31839196d8acSJiri Slaby .owner = THIS_MODULE, 31849196d8acSJiri Slaby }, 31859196d8acSJiri Slaby }; 31869196d8acSJiri Slaby 31879196d8acSJiri Slaby /* 31889196d8acSJiri Slaby * This "device" covers _all_ ISA 8250-compatible serial devices listed 31899196d8acSJiri Slaby * in the table in include/asm/serial.h 31909196d8acSJiri Slaby */ 31919196d8acSJiri Slaby static struct platform_device *serial8250_isa_devs; 31929196d8acSJiri Slaby 31939196d8acSJiri Slaby /* 31949196d8acSJiri Slaby * serial8250_register_8250_port and serial8250_unregister_port allows for 31959196d8acSJiri Slaby * 16x50 serial ports to be configured at run-time, to support PCMCIA 31969196d8acSJiri Slaby * modems and PCI multiport cards. 31979196d8acSJiri Slaby */ 31989196d8acSJiri Slaby static DEFINE_MUTEX(serial_mutex); 31999196d8acSJiri Slaby 32009196d8acSJiri Slaby static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port) 32019196d8acSJiri Slaby { 32029196d8acSJiri Slaby int i; 32039196d8acSJiri Slaby 32049196d8acSJiri Slaby /* 32059196d8acSJiri Slaby * First, find a port entry which matches. 32069196d8acSJiri Slaby */ 3207317a6842SKyle McMartin for (i = 0; i < nr_uarts; i++) 32089196d8acSJiri Slaby if (uart_match_port(&serial8250_ports[i].port, port)) 32099196d8acSJiri Slaby return &serial8250_ports[i]; 32109196d8acSJiri Slaby 32119196d8acSJiri Slaby /* 32129196d8acSJiri Slaby * We didn't find a matching entry, so look for the first 32139196d8acSJiri Slaby * free entry. We look for one which hasn't been previously 32149196d8acSJiri Slaby * used (indicated by zero iobase). 32159196d8acSJiri Slaby */ 3216317a6842SKyle McMartin for (i = 0; i < nr_uarts; i++) 32179196d8acSJiri Slaby if (serial8250_ports[i].port.type == PORT_UNKNOWN && 32189196d8acSJiri Slaby serial8250_ports[i].port.iobase == 0) 32199196d8acSJiri Slaby return &serial8250_ports[i]; 32209196d8acSJiri Slaby 32219196d8acSJiri Slaby /* 32229196d8acSJiri Slaby * That also failed. Last resort is to find any entry which 32239196d8acSJiri Slaby * doesn't have a real port associated with it. 32249196d8acSJiri Slaby */ 3225317a6842SKyle McMartin for (i = 0; i < nr_uarts; i++) 32269196d8acSJiri Slaby if (serial8250_ports[i].port.type == PORT_UNKNOWN) 32279196d8acSJiri Slaby return &serial8250_ports[i]; 32289196d8acSJiri Slaby 32299196d8acSJiri Slaby return NULL; 32309196d8acSJiri Slaby } 32319196d8acSJiri Slaby 32329196d8acSJiri Slaby /** 32339196d8acSJiri Slaby * serial8250_register_8250_port - register a serial port 32349196d8acSJiri Slaby * @up: serial port template 32359196d8acSJiri Slaby * 32369196d8acSJiri Slaby * Configure the serial port specified by the request. If the 32379196d8acSJiri Slaby * port exists and is in use, it is hung up and unregistered 32389196d8acSJiri Slaby * first. 32399196d8acSJiri Slaby * 32409196d8acSJiri Slaby * The port is then probed and if necessary the IRQ is autodetected 32419196d8acSJiri Slaby * If this fails an error is returned. 32429196d8acSJiri Slaby * 32439196d8acSJiri Slaby * On success the port is ready to use and the line number is returned. 32449196d8acSJiri Slaby */ 32459196d8acSJiri Slaby int serial8250_register_8250_port(struct uart_8250_port *up) 32469196d8acSJiri Slaby { 32479196d8acSJiri Slaby struct uart_8250_port *uart; 32489196d8acSJiri Slaby int ret = -ENOSPC; 32499196d8acSJiri Slaby 32509196d8acSJiri Slaby if (up->port.uartclk == 0) 32519196d8acSJiri Slaby return -EINVAL; 32529196d8acSJiri Slaby 32539196d8acSJiri Slaby mutex_lock(&serial_mutex); 32549196d8acSJiri Slaby 32559196d8acSJiri Slaby uart = serial8250_find_match_or_unused(&up->port); 32569196d8acSJiri Slaby if (uart && uart->port.type != PORT_8250_CIR) { 32579196d8acSJiri Slaby if (uart->port.dev) 32589196d8acSJiri Slaby uart_remove_one_port(&serial8250_reg, &uart->port); 32599196d8acSJiri Slaby 32609196d8acSJiri Slaby uart->port.iobase = up->port.iobase; 32619196d8acSJiri Slaby uart->port.membase = up->port.membase; 32629196d8acSJiri Slaby uart->port.irq = up->port.irq; 32639196d8acSJiri Slaby uart->port.irqflags = up->port.irqflags; 32649196d8acSJiri Slaby uart->port.uartclk = up->port.uartclk; 32659196d8acSJiri Slaby uart->port.fifosize = up->port.fifosize; 32669196d8acSJiri Slaby uart->port.regshift = up->port.regshift; 32679196d8acSJiri Slaby uart->port.iotype = up->port.iotype; 32689196d8acSJiri Slaby uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF; 32699196d8acSJiri Slaby uart->bugs = up->bugs; 32709196d8acSJiri Slaby uart->port.mapbase = up->port.mapbase; 32719196d8acSJiri Slaby uart->port.private_data = up->port.private_data; 32729196d8acSJiri Slaby uart->port.fifosize = up->port.fifosize; 32739196d8acSJiri Slaby uart->tx_loadsz = up->tx_loadsz; 32749196d8acSJiri Slaby uart->capabilities = up->capabilities; 32759196d8acSJiri Slaby 3276ef99f3aeSGreg Kroah-Hartman /* Take tx_loadsz from fifosize if it wasn't set separately */ 3277ef99f3aeSGreg Kroah-Hartman if (uart->port.fifosize && !uart->tx_loadsz) 3278ef99f3aeSGreg Kroah-Hartman uart->tx_loadsz = uart->port.fifosize; 3279ef99f3aeSGreg Kroah-Hartman 32809196d8acSJiri Slaby if (up->port.dev) 32819196d8acSJiri Slaby uart->port.dev = up->port.dev; 32829196d8acSJiri Slaby 32839196d8acSJiri Slaby if (up->port.flags & UPF_FIXED_TYPE) 32849196d8acSJiri Slaby serial8250_init_fixed_type_port(uart, up->port.type); 32859196d8acSJiri Slaby 32869196d8acSJiri Slaby set_io_from_upio(&uart->port); 32879196d8acSJiri Slaby /* Possibly override default I/O functions. */ 32889196d8acSJiri Slaby if (up->port.serial_in) 32899196d8acSJiri Slaby uart->port.serial_in = up->port.serial_in; 32909196d8acSJiri Slaby if (up->port.serial_out) 32919196d8acSJiri Slaby uart->port.serial_out = up->port.serial_out; 32929196d8acSJiri Slaby if (up->port.handle_irq) 32939196d8acSJiri Slaby uart->port.handle_irq = up->port.handle_irq; 32949196d8acSJiri Slaby /* Possibly override set_termios call */ 32959196d8acSJiri Slaby if (up->port.set_termios) 32969196d8acSJiri Slaby uart->port.set_termios = up->port.set_termios; 32979196d8acSJiri Slaby if (up->port.pm) 32989196d8acSJiri Slaby uart->port.pm = up->port.pm; 32999196d8acSJiri Slaby if (up->port.handle_break) 33009196d8acSJiri Slaby uart->port.handle_break = up->port.handle_break; 33019196d8acSJiri Slaby if (up->dl_read) 33029196d8acSJiri Slaby uart->dl_read = up->dl_read; 33039196d8acSJiri Slaby if (up->dl_write) 33049196d8acSJiri Slaby uart->dl_write = up->dl_write; 33059196d8acSJiri Slaby if (up->dma) 33069196d8acSJiri Slaby uart->dma = up->dma; 33079196d8acSJiri Slaby 33089196d8acSJiri Slaby if (serial8250_isa_config != NULL) 33099196d8acSJiri Slaby serial8250_isa_config(0, &uart->port, 33109196d8acSJiri Slaby &uart->capabilities); 33119196d8acSJiri Slaby 33129196d8acSJiri Slaby ret = uart_add_one_port(&serial8250_reg, &uart->port); 33139196d8acSJiri Slaby if (ret == 0) 33149196d8acSJiri Slaby ret = uart->port.line; 33159196d8acSJiri Slaby } 33169196d8acSJiri Slaby mutex_unlock(&serial_mutex); 33179196d8acSJiri Slaby 33189196d8acSJiri Slaby return ret; 33199196d8acSJiri Slaby } 33209196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_register_8250_port); 33219196d8acSJiri Slaby 33229196d8acSJiri Slaby /** 33239196d8acSJiri Slaby * serial8250_unregister_port - remove a 16x50 serial port at runtime 33249196d8acSJiri Slaby * @line: serial line number 33259196d8acSJiri Slaby * 33269196d8acSJiri Slaby * Remove one serial port. This may not be called from interrupt 33279196d8acSJiri Slaby * context. We hand the port back to the our control. 33289196d8acSJiri Slaby */ 33299196d8acSJiri Slaby void serial8250_unregister_port(int line) 33309196d8acSJiri Slaby { 33319196d8acSJiri Slaby struct uart_8250_port *uart = &serial8250_ports[line]; 33329196d8acSJiri Slaby 33339196d8acSJiri Slaby mutex_lock(&serial_mutex); 33349196d8acSJiri Slaby uart_remove_one_port(&serial8250_reg, &uart->port); 33359196d8acSJiri Slaby if (serial8250_isa_devs) { 33369196d8acSJiri Slaby uart->port.flags &= ~UPF_BOOT_AUTOCONF; 33379196d8acSJiri Slaby uart->port.type = PORT_UNKNOWN; 33389196d8acSJiri Slaby uart->port.dev = &serial8250_isa_devs->dev; 33399196d8acSJiri Slaby uart->capabilities = uart_config[uart->port.type].flags; 33409196d8acSJiri Slaby uart_add_one_port(&serial8250_reg, &uart->port); 33419196d8acSJiri Slaby } else { 33429196d8acSJiri Slaby uart->port.dev = NULL; 33439196d8acSJiri Slaby } 33449196d8acSJiri Slaby mutex_unlock(&serial_mutex); 33459196d8acSJiri Slaby } 33469196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_unregister_port); 33479196d8acSJiri Slaby 33489196d8acSJiri Slaby static int __init serial8250_init(void) 33499196d8acSJiri Slaby { 33509196d8acSJiri Slaby int ret; 33519196d8acSJiri Slaby 33529196d8acSJiri Slaby serial8250_isa_init_ports(); 33539196d8acSJiri Slaby 33549196d8acSJiri Slaby printk(KERN_INFO "Serial: 8250/16550 driver, " 33559196d8acSJiri Slaby "%d ports, IRQ sharing %sabled\n", nr_uarts, 33569196d8acSJiri Slaby share_irqs ? "en" : "dis"); 33579196d8acSJiri Slaby 33589196d8acSJiri Slaby #ifdef CONFIG_SPARC 33599196d8acSJiri Slaby ret = sunserial_register_minors(&serial8250_reg, UART_NR); 33609196d8acSJiri Slaby #else 33619196d8acSJiri Slaby serial8250_reg.nr = UART_NR; 33629196d8acSJiri Slaby ret = uart_register_driver(&serial8250_reg); 33639196d8acSJiri Slaby #endif 33649196d8acSJiri Slaby if (ret) 33659196d8acSJiri Slaby goto out; 33669196d8acSJiri Slaby 33679196d8acSJiri Slaby ret = serial8250_pnp_init(); 33689196d8acSJiri Slaby if (ret) 33699196d8acSJiri Slaby goto unreg_uart_drv; 33709196d8acSJiri Slaby 33719196d8acSJiri Slaby serial8250_isa_devs = platform_device_alloc("serial8250", 33729196d8acSJiri Slaby PLAT8250_DEV_LEGACY); 33739196d8acSJiri Slaby if (!serial8250_isa_devs) { 33749196d8acSJiri Slaby ret = -ENOMEM; 33759196d8acSJiri Slaby goto unreg_pnp; 33769196d8acSJiri Slaby } 33779196d8acSJiri Slaby 33789196d8acSJiri Slaby ret = platform_device_add(serial8250_isa_devs); 33799196d8acSJiri Slaby if (ret) 33809196d8acSJiri Slaby goto put_dev; 33819196d8acSJiri Slaby 33829196d8acSJiri Slaby serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev); 33839196d8acSJiri Slaby 33849196d8acSJiri Slaby ret = platform_driver_register(&serial8250_isa_driver); 33859196d8acSJiri Slaby if (ret == 0) 33869196d8acSJiri Slaby goto out; 33879196d8acSJiri Slaby 33889196d8acSJiri Slaby platform_device_del(serial8250_isa_devs); 33899196d8acSJiri Slaby put_dev: 33909196d8acSJiri Slaby platform_device_put(serial8250_isa_devs); 33919196d8acSJiri Slaby unreg_pnp: 33929196d8acSJiri Slaby serial8250_pnp_exit(); 33939196d8acSJiri Slaby unreg_uart_drv: 33949196d8acSJiri Slaby #ifdef CONFIG_SPARC 33959196d8acSJiri Slaby sunserial_unregister_minors(&serial8250_reg, UART_NR); 33969196d8acSJiri Slaby #else 33979196d8acSJiri Slaby uart_unregister_driver(&serial8250_reg); 33989196d8acSJiri Slaby #endif 33999196d8acSJiri Slaby out: 34009196d8acSJiri Slaby return ret; 34019196d8acSJiri Slaby } 34029196d8acSJiri Slaby 34039196d8acSJiri Slaby static void __exit serial8250_exit(void) 34049196d8acSJiri Slaby { 34059196d8acSJiri Slaby struct platform_device *isa_dev = serial8250_isa_devs; 34069196d8acSJiri Slaby 34079196d8acSJiri Slaby /* 34089196d8acSJiri Slaby * This tells serial8250_unregister_port() not to re-register 34099196d8acSJiri Slaby * the ports (thereby making serial8250_isa_driver permanently 34109196d8acSJiri Slaby * in use.) 34119196d8acSJiri Slaby */ 34129196d8acSJiri Slaby serial8250_isa_devs = NULL; 34139196d8acSJiri Slaby 34149196d8acSJiri Slaby platform_driver_unregister(&serial8250_isa_driver); 34159196d8acSJiri Slaby platform_device_unregister(isa_dev); 34169196d8acSJiri Slaby 34179196d8acSJiri Slaby serial8250_pnp_exit(); 34189196d8acSJiri Slaby 34199196d8acSJiri Slaby #ifdef CONFIG_SPARC 34209196d8acSJiri Slaby sunserial_unregister_minors(&serial8250_reg, UART_NR); 34219196d8acSJiri Slaby #else 34229196d8acSJiri Slaby uart_unregister_driver(&serial8250_reg); 34239196d8acSJiri Slaby #endif 34249196d8acSJiri Slaby } 34259196d8acSJiri Slaby 34269196d8acSJiri Slaby module_init(serial8250_init); 34279196d8acSJiri Slaby module_exit(serial8250_exit); 34289196d8acSJiri Slaby 34299196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_suspend_port); 34309196d8acSJiri Slaby EXPORT_SYMBOL(serial8250_resume_port); 34319196d8acSJiri Slaby 34329196d8acSJiri Slaby MODULE_LICENSE("GPL"); 34339196d8acSJiri Slaby MODULE_DESCRIPTION("Generic 8250/16x50 serial driver"); 34349196d8acSJiri Slaby 34359196d8acSJiri Slaby module_param(share_irqs, uint, 0644); 34369196d8acSJiri Slaby MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices" 34379196d8acSJiri Slaby " (unsafe)"); 34389196d8acSJiri Slaby 34399196d8acSJiri Slaby module_param(nr_uarts, uint, 0644); 34409196d8acSJiri Slaby MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")"); 34419196d8acSJiri Slaby 34429196d8acSJiri Slaby module_param(skip_txen_test, uint, 0644); 34439196d8acSJiri Slaby MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time"); 34449196d8acSJiri Slaby 34459196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 34469196d8acSJiri Slaby module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444); 34479196d8acSJiri Slaby MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA"); 34489196d8acSJiri Slaby #endif 34499196d8acSJiri Slaby MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR); 34509196d8acSJiri Slaby 34519326b047SJiri Slaby #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS 34529196d8acSJiri Slaby #ifndef MODULE 34539196d8acSJiri Slaby /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name 34549196d8acSJiri Slaby * working as well for the module options so we don't break people. We 34559196d8acSJiri Slaby * need to keep the names identical and the convenient macros will happily 34569196d8acSJiri Slaby * refuse to let us do that by failing the build with redefinition errors 34579196d8acSJiri Slaby * of global variables. So we stick them inside a dummy function to avoid 34589196d8acSJiri Slaby * those conflicts. The options still get parsed, and the redefined 34599196d8acSJiri Slaby * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive. 34609196d8acSJiri Slaby * 34619196d8acSJiri Slaby * This is hacky. I'm sorry. 34629196d8acSJiri Slaby */ 34639196d8acSJiri Slaby static void __used s8250_options(void) 34649196d8acSJiri Slaby { 34659196d8acSJiri Slaby #undef MODULE_PARAM_PREFIX 34669196d8acSJiri Slaby #define MODULE_PARAM_PREFIX "8250_core." 34679196d8acSJiri Slaby 34689196d8acSJiri Slaby module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644); 34699196d8acSJiri Slaby module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644); 34709196d8acSJiri Slaby module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644); 34719196d8acSJiri Slaby #ifdef CONFIG_SERIAL_8250_RSA 34729196d8acSJiri Slaby __module_param_call(MODULE_PARAM_PREFIX, probe_rsa, 34739196d8acSJiri Slaby ¶m_array_ops, .arr = &__param_arr_probe_rsa, 34749196d8acSJiri Slaby 0444, -1); 34759196d8acSJiri Slaby #endif 34769196d8acSJiri Slaby } 34779196d8acSJiri Slaby #else 34789196d8acSJiri Slaby MODULE_ALIAS("8250_core"); 34799196d8acSJiri Slaby #endif 34809326b047SJiri Slaby #endif 3481