xref: /openbmc/linux/drivers/tty/serial/8250/8250.h (revision de2bdb3d)
1 /*
2  *  Driver for 8250/16550-type serial ports
3  *
4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5  *
6  *  Copyright (C) 2001 Russell King.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13 
14 #include <linux/serial_8250.h>
15 #include <linux/serial_reg.h>
16 #include <linux/dmaengine.h>
17 
18 struct uart_8250_dma {
19 	int (*tx_dma)(struct uart_8250_port *p);
20 	int (*rx_dma)(struct uart_8250_port *p);
21 
22 	/* Filter function */
23 	dma_filter_fn		fn;
24 	/* Parameter to the filter function */
25 	void			*rx_param;
26 	void			*tx_param;
27 
28 	struct dma_slave_config	rxconf;
29 	struct dma_slave_config	txconf;
30 
31 	struct dma_chan		*rxchan;
32 	struct dma_chan		*txchan;
33 
34 	/* Device address base for DMA operations */
35 	phys_addr_t		rx_dma_addr;
36 	phys_addr_t		tx_dma_addr;
37 
38 	/* DMA address of the buffer in memory */
39 	dma_addr_t		rx_addr;
40 	dma_addr_t		tx_addr;
41 
42 	dma_cookie_t		rx_cookie;
43 	dma_cookie_t		tx_cookie;
44 
45 	void			*rx_buf;
46 
47 	size_t			rx_size;
48 	size_t			tx_size;
49 
50 	unsigned char		tx_running;
51 	unsigned char		tx_err;
52 	unsigned char		rx_running;
53 };
54 
55 struct old_serial_port {
56 	unsigned int uart;
57 	unsigned int baud_base;
58 	unsigned int port;
59 	unsigned int irq;
60 	upf_t        flags;
61 	unsigned char io_type;
62 	unsigned char __iomem *iomem_base;
63 	unsigned short iomem_reg_shift;
64 };
65 
66 struct serial8250_config {
67 	const char	*name;
68 	unsigned short	fifo_size;
69 	unsigned short	tx_loadsz;
70 	unsigned char	fcr;
71 	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
72 	unsigned int	flags;
73 };
74 
75 #define UART_CAP_FIFO	(1 << 8)	/* UART has FIFO */
76 #define UART_CAP_EFR	(1 << 9)	/* UART has EFR */
77 #define UART_CAP_SLEEP	(1 << 10)	/* UART has IER sleep */
78 #define UART_CAP_AFE	(1 << 11)	/* MCR-based hw flow control */
79 #define UART_CAP_UUE	(1 << 12)	/* UART needs IER bit 6 set (Xscale) */
80 #define UART_CAP_RTOIE	(1 << 13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
81 #define UART_CAP_HFIFO	(1 << 14)	/* UART has a "hidden" FIFO */
82 #define UART_CAP_RPM	(1 << 15)	/* Runtime PM is active while idle */
83 
84 #define UART_BUG_QUOT	(1 << 0)	/* UART has buggy quot LSB */
85 #define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */
86 #define UART_BUG_NOMSR	(1 << 2)	/* UART has buggy MSR status bits (Au1x00) */
87 #define UART_BUG_THRE	(1 << 3)	/* UART has buggy THRE reassertion */
88 #define UART_BUG_PARITY	(1 << 4)	/* UART mishandles parity if FIFO enabled */
89 
90 
91 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
92 #define SERIAL8250_SHARE_IRQS 1
93 #else
94 #define SERIAL8250_SHARE_IRQS 0
95 #endif
96 
97 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\
98 	{							\
99 		.iobase		= _base,			\
100 		.irq		= _irq,				\
101 		.uartclk	= 1843200,			\
102 		.iotype		= UPIO_PORT,			\
103 		.flags		= UPF_BOOT_AUTOCONF | (_flags),	\
104 	}
105 
106 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
107 
108 
109 static inline int serial_in(struct uart_8250_port *up, int offset)
110 {
111 	return up->port.serial_in(&up->port, offset);
112 }
113 
114 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
115 {
116 	up->port.serial_out(&up->port, offset, value);
117 }
118 
119 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
120 
121 static inline int serial_dl_read(struct uart_8250_port *up)
122 {
123 	return up->dl_read(up);
124 }
125 
126 static inline void serial_dl_write(struct uart_8250_port *up, int value)
127 {
128 	up->dl_write(up, value);
129 }
130 
131 struct uart_8250_port *serial8250_get_port(int line);
132 void serial8250_rpm_get(struct uart_8250_port *p);
133 void serial8250_rpm_put(struct uart_8250_port *p);
134 int serial8250_em485_init(struct uart_8250_port *p);
135 void serial8250_em485_destroy(struct uart_8250_port *p);
136 
137 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
138 {
139 	serial_out(up, UART_MCR, value);
140 }
141 
142 static inline int serial8250_in_MCR(struct uart_8250_port *up)
143 {
144 	return serial_in(up, UART_MCR);
145 }
146 
147 #if defined(__alpha__) && !defined(CONFIG_PCI)
148 /*
149  * Digital did something really horribly wrong with the OUT1 and OUT2
150  * lines on at least some ALPHA's.  The failure mode is that if either
151  * is cleared, the machine locks up with endless interrupts.
152  */
153 #define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
154 #else
155 #define ALPHA_KLUDGE_MCR 0
156 #endif
157 
158 #ifdef CONFIG_SERIAL_8250_PNP
159 int serial8250_pnp_init(void);
160 void serial8250_pnp_exit(void);
161 #else
162 static inline int serial8250_pnp_init(void) { return 0; }
163 static inline void serial8250_pnp_exit(void) { }
164 #endif
165 
166 #ifdef CONFIG_SERIAL_8250_FINTEK
167 int fintek_8250_probe(struct uart_8250_port *uart);
168 #else
169 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
170 #endif
171 
172 #ifdef CONFIG_ARCH_OMAP1
173 static inline int is_omap1_8250(struct uart_8250_port *pt)
174 {
175 	int res;
176 
177 	switch (pt->port.mapbase) {
178 	case OMAP1_UART1_BASE:
179 	case OMAP1_UART2_BASE:
180 	case OMAP1_UART3_BASE:
181 		res = 1;
182 		break;
183 	default:
184 		res = 0;
185 		break;
186 	}
187 
188 	return res;
189 }
190 
191 static inline int is_omap1510_8250(struct uart_8250_port *pt)
192 {
193 	if (!cpu_is_omap1510())
194 		return 0;
195 
196 	return is_omap1_8250(pt);
197 }
198 #else
199 static inline int is_omap1_8250(struct uart_8250_port *pt)
200 {
201 	return 0;
202 }
203 static inline int is_omap1510_8250(struct uart_8250_port *pt)
204 {
205 	return 0;
206 }
207 #endif
208 
209 #ifdef CONFIG_SERIAL_8250_DMA
210 extern int serial8250_tx_dma(struct uart_8250_port *);
211 extern int serial8250_rx_dma(struct uart_8250_port *);
212 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
213 extern int serial8250_request_dma(struct uart_8250_port *);
214 extern void serial8250_release_dma(struct uart_8250_port *);
215 #else
216 static inline int serial8250_tx_dma(struct uart_8250_port *p)
217 {
218 	return -1;
219 }
220 static inline int serial8250_rx_dma(struct uart_8250_port *p)
221 {
222 	return -1;
223 }
224 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
225 static inline int serial8250_request_dma(struct uart_8250_port *p)
226 {
227 	return -1;
228 }
229 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
230 #endif
231 
232 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
233 {
234 	unsigned char status;
235 
236 	status = serial_in(up, 0x04); /* EXCR2 */
237 #define PRESL(x) ((x) & 0x30)
238 	if (PRESL(status) == 0x10) {
239 		/* already in high speed mode */
240 		return 0;
241 	} else {
242 		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
243 		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
244 		serial_out(up, 0x04, status);
245 	}
246 	return 1;
247 }
248 
249 static inline int serial_index(struct uart_port *port)
250 {
251 	return port->minor - 64;
252 }
253