1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Driver for 8250/16550-type serial ports 4 * 5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 6 * 7 * Copyright (C) 2001 Russell King. 8 */ 9 10 #include <linux/serial_8250.h> 11 #include <linux/serial_reg.h> 12 #include <linux/dmaengine.h> 13 14 struct uart_8250_dma { 15 int (*tx_dma)(struct uart_8250_port *p); 16 int (*rx_dma)(struct uart_8250_port *p); 17 18 /* Filter function */ 19 dma_filter_fn fn; 20 /* Parameter to the filter function */ 21 void *rx_param; 22 void *tx_param; 23 24 struct dma_slave_config rxconf; 25 struct dma_slave_config txconf; 26 27 struct dma_chan *rxchan; 28 struct dma_chan *txchan; 29 30 /* Device address base for DMA operations */ 31 phys_addr_t rx_dma_addr; 32 phys_addr_t tx_dma_addr; 33 34 /* DMA address of the buffer in memory */ 35 dma_addr_t rx_addr; 36 dma_addr_t tx_addr; 37 38 dma_cookie_t rx_cookie; 39 dma_cookie_t tx_cookie; 40 41 void *rx_buf; 42 43 size_t rx_size; 44 size_t tx_size; 45 46 unsigned char tx_running; 47 unsigned char tx_err; 48 unsigned char rx_running; 49 }; 50 51 struct old_serial_port { 52 unsigned int uart; 53 unsigned int baud_base; 54 unsigned int port; 55 unsigned int irq; 56 upf_t flags; 57 unsigned char io_type; 58 unsigned char __iomem *iomem_base; 59 unsigned short iomem_reg_shift; 60 }; 61 62 struct serial8250_config { 63 const char *name; 64 unsigned short fifo_size; 65 unsigned short tx_loadsz; 66 unsigned char fcr; 67 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE]; 68 unsigned int flags; 69 }; 70 71 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */ 72 #define UART_CAP_EFR (1 << 9) /* UART has EFR */ 73 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */ 74 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */ 75 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */ 76 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */ 77 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */ 78 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */ 79 #define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */ 80 #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks: 81 * STOP PARITY EPAR SPAR WLEN5 WLEN6 82 */ 83 84 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */ 85 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ 86 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */ 87 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */ 88 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */ 89 90 91 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ 92 #define SERIAL8250_SHARE_IRQS 1 93 #else 94 #define SERIAL8250_SHARE_IRQS 0 95 #endif 96 97 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ 98 { \ 99 .iobase = _base, \ 100 .irq = _irq, \ 101 .uartclk = 1843200, \ 102 .iotype = UPIO_PORT, \ 103 .flags = UPF_BOOT_AUTOCONF | (_flags), \ 104 } 105 106 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) 107 108 109 static inline int serial_in(struct uart_8250_port *up, int offset) 110 { 111 return up->port.serial_in(&up->port, offset); 112 } 113 114 static inline void serial_out(struct uart_8250_port *up, int offset, int value) 115 { 116 up->port.serial_out(&up->port, offset, value); 117 } 118 119 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); 120 121 static inline int serial_dl_read(struct uart_8250_port *up) 122 { 123 return up->dl_read(up); 124 } 125 126 static inline void serial_dl_write(struct uart_8250_port *up, int value) 127 { 128 up->dl_write(up, value); 129 } 130 131 struct uart_8250_port *serial8250_get_port(int line); 132 133 void serial8250_rpm_get(struct uart_8250_port *p); 134 void serial8250_rpm_put(struct uart_8250_port *p); 135 136 void serial8250_rpm_get_tx(struct uart_8250_port *p); 137 void serial8250_rpm_put_tx(struct uart_8250_port *p); 138 139 int serial8250_em485_init(struct uart_8250_port *p); 140 void serial8250_em485_destroy(struct uart_8250_port *p); 141 142 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) 143 { 144 serial_out(up, UART_MCR, value); 145 } 146 147 static inline int serial8250_in_MCR(struct uart_8250_port *up) 148 { 149 return serial_in(up, UART_MCR); 150 } 151 152 #if defined(__alpha__) && !defined(CONFIG_PCI) 153 /* 154 * Digital did something really horribly wrong with the OUT1 and OUT2 155 * lines on at least some ALPHA's. The failure mode is that if either 156 * is cleared, the machine locks up with endless interrupts. 157 */ 158 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1) 159 #else 160 #define ALPHA_KLUDGE_MCR 0 161 #endif 162 163 #ifdef CONFIG_SERIAL_8250_PNP 164 int serial8250_pnp_init(void); 165 void serial8250_pnp_exit(void); 166 #else 167 static inline int serial8250_pnp_init(void) { return 0; } 168 static inline void serial8250_pnp_exit(void) { } 169 #endif 170 171 #ifdef CONFIG_SERIAL_8250_FINTEK 172 int fintek_8250_probe(struct uart_8250_port *uart); 173 #else 174 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; } 175 #endif 176 177 #ifdef CONFIG_ARCH_OMAP1 178 static inline int is_omap1_8250(struct uart_8250_port *pt) 179 { 180 int res; 181 182 switch (pt->port.mapbase) { 183 case OMAP1_UART1_BASE: 184 case OMAP1_UART2_BASE: 185 case OMAP1_UART3_BASE: 186 res = 1; 187 break; 188 default: 189 res = 0; 190 break; 191 } 192 193 return res; 194 } 195 196 static inline int is_omap1510_8250(struct uart_8250_port *pt) 197 { 198 if (!cpu_is_omap1510()) 199 return 0; 200 201 return is_omap1_8250(pt); 202 } 203 #else 204 static inline int is_omap1_8250(struct uart_8250_port *pt) 205 { 206 return 0; 207 } 208 static inline int is_omap1510_8250(struct uart_8250_port *pt) 209 { 210 return 0; 211 } 212 #endif 213 214 #ifdef CONFIG_SERIAL_8250_DMA 215 extern int serial8250_tx_dma(struct uart_8250_port *); 216 extern int serial8250_rx_dma(struct uart_8250_port *); 217 extern void serial8250_rx_dma_flush(struct uart_8250_port *); 218 extern int serial8250_request_dma(struct uart_8250_port *); 219 extern void serial8250_release_dma(struct uart_8250_port *); 220 #else 221 static inline int serial8250_tx_dma(struct uart_8250_port *p) 222 { 223 return -1; 224 } 225 static inline int serial8250_rx_dma(struct uart_8250_port *p) 226 { 227 return -1; 228 } 229 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { } 230 static inline int serial8250_request_dma(struct uart_8250_port *p) 231 { 232 return -1; 233 } 234 static inline void serial8250_release_dma(struct uart_8250_port *p) { } 235 #endif 236 237 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) 238 { 239 unsigned char status; 240 241 status = serial_in(up, 0x04); /* EXCR2 */ 242 #define PRESL(x) ((x) & 0x30) 243 if (PRESL(status) == 0x10) { 244 /* already in high speed mode */ 245 return 0; 246 } else { 247 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 248 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 249 serial_out(up, 0x04, status); 250 } 251 return 1; 252 } 253 254 static inline int serial_index(struct uart_port *port) 255 { 256 return port->minor - 64; 257 } 258