xref: /openbmc/linux/drivers/tty/serial/8250/8250.h (revision 6774def6)
1 /*
2  *  Driver for 8250/16550-type serial ports
3  *
4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5  *
6  *  Copyright (C) 2001 Russell King.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13 
14 #include <linux/serial_8250.h>
15 #include <linux/serial_reg.h>
16 #include <linux/dmaengine.h>
17 
18 struct uart_8250_dma {
19 	/* Filter function */
20 	dma_filter_fn		fn;
21 
22 	/* Parameter to the filter function */
23 	void			*rx_param;
24 	void			*tx_param;
25 
26 	struct dma_slave_config	rxconf;
27 	struct dma_slave_config	txconf;
28 
29 	struct dma_chan		*rxchan;
30 	struct dma_chan		*txchan;
31 
32 	dma_addr_t		rx_addr;
33 	dma_addr_t		tx_addr;
34 
35 	dma_cookie_t		rx_cookie;
36 	dma_cookie_t		tx_cookie;
37 
38 	void			*rx_buf;
39 
40 	size_t			rx_size;
41 	size_t			tx_size;
42 
43 	unsigned char		tx_running:1;
44 };
45 
46 struct old_serial_port {
47 	unsigned int uart;
48 	unsigned int baud_base;
49 	unsigned int port;
50 	unsigned int irq;
51 	unsigned int flags;
52 	unsigned char hub6;
53 	unsigned char io_type;
54 	unsigned char *iomem_base;
55 	unsigned short iomem_reg_shift;
56 	unsigned long irqflags;
57 };
58 
59 struct serial8250_config {
60 	const char	*name;
61 	unsigned short	fifo_size;
62 	unsigned short	tx_loadsz;
63 	unsigned char	fcr;
64 	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
65 	unsigned int	flags;
66 };
67 
68 #define UART_CAP_FIFO	(1 << 8)	/* UART has FIFO */
69 #define UART_CAP_EFR	(1 << 9)	/* UART has EFR */
70 #define UART_CAP_SLEEP	(1 << 10)	/* UART has IER sleep */
71 #define UART_CAP_AFE	(1 << 11)	/* MCR-based hw flow control */
72 #define UART_CAP_UUE	(1 << 12)	/* UART needs IER bit 6 set (Xscale) */
73 #define UART_CAP_RTOIE	(1 << 13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
74 #define UART_CAP_HFIFO	(1 << 14)	/* UART has a "hidden" FIFO */
75 #define UART_CAP_RPM	(1 << 15)	/* Runtime PM is active while idle */
76 
77 #define UART_BUG_QUOT	(1 << 0)	/* UART has buggy quot LSB */
78 #define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */
79 #define UART_BUG_NOMSR	(1 << 2)	/* UART has buggy MSR status bits (Au1x00) */
80 #define UART_BUG_THRE	(1 << 3)	/* UART has buggy THRE reassertion */
81 #define UART_BUG_PARITY	(1 << 4)	/* UART mishandles parity if FIFO enabled */
82 
83 #define PROBE_RSA	(1 << 0)
84 #define PROBE_ANY	(~0)
85 
86 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
87 
88 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
89 #define SERIAL8250_SHARE_IRQS 1
90 #else
91 #define SERIAL8250_SHARE_IRQS 0
92 #endif
93 
94 static inline int serial_in(struct uart_8250_port *up, int offset)
95 {
96 	return up->port.serial_in(&up->port, offset);
97 }
98 
99 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
100 {
101 	up->port.serial_out(&up->port, offset, value);
102 }
103 
104 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
105 
106 static inline int serial_dl_read(struct uart_8250_port *up)
107 {
108 	return up->dl_read(up);
109 }
110 
111 static inline void serial_dl_write(struct uart_8250_port *up, int value)
112 {
113 	up->dl_write(up, value);
114 }
115 
116 struct uart_8250_port *serial8250_get_port(int line);
117 
118 #if defined(__alpha__) && !defined(CONFIG_PCI)
119 /*
120  * Digital did something really horribly wrong with the OUT1 and OUT2
121  * lines on at least some ALPHA's.  The failure mode is that if either
122  * is cleared, the machine locks up with endless interrupts.
123  */
124 #define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
125 #else
126 #define ALPHA_KLUDGE_MCR 0
127 #endif
128 
129 #ifdef CONFIG_SERIAL_8250_PNP
130 int serial8250_pnp_init(void);
131 void serial8250_pnp_exit(void);
132 #else
133 static inline int serial8250_pnp_init(void) { return 0; }
134 static inline void serial8250_pnp_exit(void) { }
135 #endif
136 
137 #ifdef CONFIG_ARCH_OMAP1
138 static inline int is_omap1_8250(struct uart_8250_port *pt)
139 {
140 	int res;
141 
142 	switch (pt->port.mapbase) {
143 	case OMAP1_UART1_BASE:
144 	case OMAP1_UART2_BASE:
145 	case OMAP1_UART3_BASE:
146 		res = 1;
147 		break;
148 	default:
149 		res = 0;
150 		break;
151 	}
152 
153 	return res;
154 }
155 
156 static inline int is_omap1510_8250(struct uart_8250_port *pt)
157 {
158 	if (!cpu_is_omap1510())
159 		return 0;
160 
161 	return is_omap1_8250(pt);
162 }
163 #else
164 static inline int is_omap1_8250(struct uart_8250_port *pt)
165 {
166 	return 0;
167 }
168 static inline int is_omap1510_8250(struct uart_8250_port *pt)
169 {
170 	return 0;
171 }
172 #endif
173 
174 #ifdef CONFIG_SERIAL_8250_DMA
175 extern int serial8250_tx_dma(struct uart_8250_port *);
176 extern int serial8250_rx_dma(struct uart_8250_port *, unsigned int iir);
177 extern int serial8250_request_dma(struct uart_8250_port *);
178 extern void serial8250_release_dma(struct uart_8250_port *);
179 #else
180 static inline int serial8250_tx_dma(struct uart_8250_port *p)
181 {
182 	return -1;
183 }
184 static inline int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
185 {
186 	return -1;
187 }
188 static inline int serial8250_request_dma(struct uart_8250_port *p)
189 {
190 	return -1;
191 }
192 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
193 #endif
194