1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Driver for 8250/16550-type serial ports 4 * 5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 6 * 7 * Copyright (C) 2001 Russell King. 8 */ 9 10 #include <linux/bits.h> 11 #include <linux/serial_8250.h> 12 #include <linux/serial_reg.h> 13 #include <linux/dmaengine.h> 14 15 #include "../serial_mctrl_gpio.h" 16 17 struct uart_8250_dma { 18 int (*tx_dma)(struct uart_8250_port *p); 19 int (*rx_dma)(struct uart_8250_port *p); 20 21 /* Filter function */ 22 dma_filter_fn fn; 23 /* Parameter to the filter function */ 24 void *rx_param; 25 void *tx_param; 26 27 struct dma_slave_config rxconf; 28 struct dma_slave_config txconf; 29 30 struct dma_chan *rxchan; 31 struct dma_chan *txchan; 32 33 /* Device address base for DMA operations */ 34 phys_addr_t rx_dma_addr; 35 phys_addr_t tx_dma_addr; 36 37 /* DMA address of the buffer in memory */ 38 dma_addr_t rx_addr; 39 dma_addr_t tx_addr; 40 41 dma_cookie_t rx_cookie; 42 dma_cookie_t tx_cookie; 43 44 void *rx_buf; 45 46 size_t rx_size; 47 size_t tx_size; 48 49 unsigned char tx_running; 50 unsigned char tx_err; 51 unsigned char rx_running; 52 }; 53 54 struct old_serial_port { 55 unsigned int uart; 56 unsigned int baud_base; 57 unsigned int port; 58 unsigned int irq; 59 upf_t flags; 60 unsigned char io_type; 61 unsigned char __iomem *iomem_base; 62 unsigned short iomem_reg_shift; 63 }; 64 65 struct serial8250_config { 66 const char *name; 67 unsigned short fifo_size; 68 unsigned short tx_loadsz; 69 unsigned char fcr; 70 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE]; 71 unsigned int flags; 72 }; 73 74 #define UART_CAP_FIFO BIT(8) /* UART has FIFO */ 75 #define UART_CAP_EFR BIT(9) /* UART has EFR */ 76 #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */ 77 #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */ 78 #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */ 79 #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */ 80 #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */ 81 #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */ 82 #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */ 83 #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks: 84 * STOP PARITY EPAR SPAR WLEN5 WLEN6 85 */ 86 87 #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */ 88 #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */ 89 #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */ 90 #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */ 91 #define UART_BUG_PARITY BIT(4) /* UART mishandles parity if FIFO enabled */ 92 #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */ 93 94 95 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ 96 #define SERIAL8250_SHARE_IRQS 1 97 #else 98 #define SERIAL8250_SHARE_IRQS 0 99 #endif 100 101 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ 102 { \ 103 .iobase = _base, \ 104 .irq = _irq, \ 105 .uartclk = 1843200, \ 106 .iotype = UPIO_PORT, \ 107 .flags = UPF_BOOT_AUTOCONF | (_flags), \ 108 } 109 110 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) 111 112 113 static inline int serial_in(struct uart_8250_port *up, int offset) 114 { 115 return up->port.serial_in(&up->port, offset); 116 } 117 118 static inline void serial_out(struct uart_8250_port *up, int offset, int value) 119 { 120 up->port.serial_out(&up->port, offset, value); 121 } 122 123 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); 124 125 static inline int serial_dl_read(struct uart_8250_port *up) 126 { 127 return up->dl_read(up); 128 } 129 130 static inline void serial_dl_write(struct uart_8250_port *up, int value) 131 { 132 up->dl_write(up, value); 133 } 134 135 static inline bool serial8250_set_THRI(struct uart_8250_port *up) 136 { 137 if (up->ier & UART_IER_THRI) 138 return false; 139 up->ier |= UART_IER_THRI; 140 serial_out(up, UART_IER, up->ier); 141 return true; 142 } 143 144 static inline bool serial8250_clear_THRI(struct uart_8250_port *up) 145 { 146 if (!(up->ier & UART_IER_THRI)) 147 return false; 148 up->ier &= ~UART_IER_THRI; 149 serial_out(up, UART_IER, up->ier); 150 return true; 151 } 152 153 struct uart_8250_port *serial8250_get_port(int line); 154 155 void serial8250_rpm_get(struct uart_8250_port *p); 156 void serial8250_rpm_put(struct uart_8250_port *p); 157 158 void serial8250_rpm_get_tx(struct uart_8250_port *p); 159 void serial8250_rpm_put_tx(struct uart_8250_port *p); 160 161 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485); 162 void serial8250_em485_start_tx(struct uart_8250_port *p); 163 void serial8250_em485_stop_tx(struct uart_8250_port *p); 164 void serial8250_em485_destroy(struct uart_8250_port *p); 165 166 /* MCR <-> TIOCM conversion */ 167 static inline int serial8250_TIOCM_to_MCR(int tiocm) 168 { 169 int mcr = 0; 170 171 if (tiocm & TIOCM_RTS) 172 mcr |= UART_MCR_RTS; 173 if (tiocm & TIOCM_DTR) 174 mcr |= UART_MCR_DTR; 175 if (tiocm & TIOCM_OUT1) 176 mcr |= UART_MCR_OUT1; 177 if (tiocm & TIOCM_OUT2) 178 mcr |= UART_MCR_OUT2; 179 if (tiocm & TIOCM_LOOP) 180 mcr |= UART_MCR_LOOP; 181 182 return mcr; 183 } 184 185 static inline int serial8250_MCR_to_TIOCM(int mcr) 186 { 187 int tiocm = 0; 188 189 if (mcr & UART_MCR_RTS) 190 tiocm |= TIOCM_RTS; 191 if (mcr & UART_MCR_DTR) 192 tiocm |= TIOCM_DTR; 193 if (mcr & UART_MCR_OUT1) 194 tiocm |= TIOCM_OUT1; 195 if (mcr & UART_MCR_OUT2) 196 tiocm |= TIOCM_OUT2; 197 if (mcr & UART_MCR_LOOP) 198 tiocm |= TIOCM_LOOP; 199 200 return tiocm; 201 } 202 203 /* MSR <-> TIOCM conversion */ 204 static inline int serial8250_MSR_to_TIOCM(int msr) 205 { 206 int tiocm = 0; 207 208 if (msr & UART_MSR_DCD) 209 tiocm |= TIOCM_CAR; 210 if (msr & UART_MSR_RI) 211 tiocm |= TIOCM_RNG; 212 if (msr & UART_MSR_DSR) 213 tiocm |= TIOCM_DSR; 214 if (msr & UART_MSR_CTS) 215 tiocm |= TIOCM_CTS; 216 217 return tiocm; 218 } 219 220 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) 221 { 222 serial_out(up, UART_MCR, value); 223 224 if (up->gpios) 225 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value)); 226 } 227 228 static inline int serial8250_in_MCR(struct uart_8250_port *up) 229 { 230 int mctrl; 231 232 mctrl = serial_in(up, UART_MCR); 233 234 if (up->gpios) { 235 unsigned int mctrl_gpio = 0; 236 237 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio); 238 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio); 239 } 240 241 return mctrl; 242 } 243 244 #if defined(__alpha__) && !defined(CONFIG_PCI) 245 /* 246 * Digital did something really horribly wrong with the OUT1 and OUT2 247 * lines on at least some ALPHA's. The failure mode is that if either 248 * is cleared, the machine locks up with endless interrupts. 249 */ 250 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1) 251 #else 252 #define ALPHA_KLUDGE_MCR 0 253 #endif 254 255 #ifdef CONFIG_SERIAL_8250_PNP 256 int serial8250_pnp_init(void); 257 void serial8250_pnp_exit(void); 258 #else 259 static inline int serial8250_pnp_init(void) { return 0; } 260 static inline void serial8250_pnp_exit(void) { } 261 #endif 262 263 #ifdef CONFIG_SERIAL_8250_FINTEK 264 int fintek_8250_probe(struct uart_8250_port *uart); 265 #else 266 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; } 267 #endif 268 269 #ifdef CONFIG_ARCH_OMAP1 270 static inline int is_omap1_8250(struct uart_8250_port *pt) 271 { 272 int res; 273 274 switch (pt->port.mapbase) { 275 case OMAP1_UART1_BASE: 276 case OMAP1_UART2_BASE: 277 case OMAP1_UART3_BASE: 278 res = 1; 279 break; 280 default: 281 res = 0; 282 break; 283 } 284 285 return res; 286 } 287 288 static inline int is_omap1510_8250(struct uart_8250_port *pt) 289 { 290 if (!cpu_is_omap1510()) 291 return 0; 292 293 return is_omap1_8250(pt); 294 } 295 #else 296 static inline int is_omap1_8250(struct uart_8250_port *pt) 297 { 298 return 0; 299 } 300 static inline int is_omap1510_8250(struct uart_8250_port *pt) 301 { 302 return 0; 303 } 304 #endif 305 306 #ifdef CONFIG_SERIAL_8250_DMA 307 extern int serial8250_tx_dma(struct uart_8250_port *); 308 extern int serial8250_rx_dma(struct uart_8250_port *); 309 extern void serial8250_rx_dma_flush(struct uart_8250_port *); 310 extern int serial8250_request_dma(struct uart_8250_port *); 311 extern void serial8250_release_dma(struct uart_8250_port *); 312 #else 313 static inline int serial8250_tx_dma(struct uart_8250_port *p) 314 { 315 return -1; 316 } 317 static inline int serial8250_rx_dma(struct uart_8250_port *p) 318 { 319 return -1; 320 } 321 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { } 322 static inline int serial8250_request_dma(struct uart_8250_port *p) 323 { 324 return -1; 325 } 326 static inline void serial8250_release_dma(struct uart_8250_port *p) { } 327 #endif 328 329 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) 330 { 331 unsigned char status; 332 333 status = serial_in(up, 0x04); /* EXCR2 */ 334 #define PRESL(x) ((x) & 0x30) 335 if (PRESL(status) == 0x10) { 336 /* already in high speed mode */ 337 return 0; 338 } else { 339 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 340 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 341 serial_out(up, 0x04, status); 342 } 343 return 1; 344 } 345 346 static inline int serial_index(struct uart_port *port) 347 { 348 return port->minor - 64; 349 } 350