1 /* 2 * Driver for 8250/16550-type serial ports 3 * 4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 5 * 6 * Copyright (C) 2001 Russell King. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 */ 13 14 #include <linux/serial_8250.h> 15 #include <linux/dmaengine.h> 16 17 struct uart_8250_dma { 18 dma_filter_fn fn; 19 void *rx_param; 20 void *tx_param; 21 22 int rx_chan_id; 23 int tx_chan_id; 24 25 struct dma_slave_config rxconf; 26 struct dma_slave_config txconf; 27 28 struct dma_chan *rxchan; 29 struct dma_chan *txchan; 30 31 dma_addr_t rx_addr; 32 dma_addr_t tx_addr; 33 34 dma_cookie_t rx_cookie; 35 dma_cookie_t tx_cookie; 36 37 void *rx_buf; 38 39 size_t rx_size; 40 size_t tx_size; 41 42 unsigned char tx_running:1; 43 }; 44 45 struct old_serial_port { 46 unsigned int uart; 47 unsigned int baud_base; 48 unsigned int port; 49 unsigned int irq; 50 unsigned int flags; 51 unsigned char hub6; 52 unsigned char io_type; 53 unsigned char *iomem_base; 54 unsigned short iomem_reg_shift; 55 unsigned long irqflags; 56 }; 57 58 struct serial8250_config { 59 const char *name; 60 unsigned short fifo_size; 61 unsigned short tx_loadsz; 62 unsigned char fcr; 63 unsigned int flags; 64 }; 65 66 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */ 67 #define UART_CAP_EFR (1 << 9) /* UART has EFR */ 68 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */ 69 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */ 70 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */ 71 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */ 72 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */ 73 74 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */ 75 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ 76 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */ 77 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */ 78 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */ 79 80 #define PROBE_RSA (1 << 0) 81 #define PROBE_ANY (~0) 82 83 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 84 85 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ 86 #define SERIAL8250_SHARE_IRQS 1 87 #else 88 #define SERIAL8250_SHARE_IRQS 0 89 #endif 90 91 static inline int serial_in(struct uart_8250_port *up, int offset) 92 { 93 return up->port.serial_in(&up->port, offset); 94 } 95 96 static inline void serial_out(struct uart_8250_port *up, int offset, int value) 97 { 98 up->port.serial_out(&up->port, offset, value); 99 } 100 101 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); 102 103 static inline int serial_dl_read(struct uart_8250_port *up) 104 { 105 return up->dl_read(up); 106 } 107 108 static inline void serial_dl_write(struct uart_8250_port *up, int value) 109 { 110 up->dl_write(up, value); 111 } 112 113 #if defined(__alpha__) && !defined(CONFIG_PCI) 114 /* 115 * Digital did something really horribly wrong with the OUT1 and OUT2 116 * lines on at least some ALPHA's. The failure mode is that if either 117 * is cleared, the machine locks up with endless interrupts. 118 */ 119 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1) 120 #else 121 #define ALPHA_KLUDGE_MCR 0 122 #endif 123 124 #ifdef CONFIG_SERIAL_8250_PNP 125 int serial8250_pnp_init(void); 126 void serial8250_pnp_exit(void); 127 #else 128 static inline int serial8250_pnp_init(void) { return 0; } 129 static inline void serial8250_pnp_exit(void) { } 130 #endif 131 132 #ifdef CONFIG_ARCH_OMAP1 133 static inline int is_omap1_8250(struct uart_8250_port *pt) 134 { 135 int res; 136 137 switch (pt->port.mapbase) { 138 case OMAP1_UART1_BASE: 139 case OMAP1_UART2_BASE: 140 case OMAP1_UART3_BASE: 141 res = 1; 142 break; 143 default: 144 res = 0; 145 break; 146 } 147 148 return res; 149 } 150 151 static inline int is_omap1510_8250(struct uart_8250_port *pt) 152 { 153 if (!cpu_is_omap1510()) 154 return 0; 155 156 return is_omap1_8250(pt); 157 } 158 #else 159 static inline int is_omap1_8250(struct uart_8250_port *pt) 160 { 161 return 0; 162 } 163 static inline int is_omap1510_8250(struct uart_8250_port *pt) 164 { 165 return 0; 166 } 167 #endif 168 169 #ifdef CONFIG_SERIAL_8250_DMA 170 extern int serial8250_tx_dma(struct uart_8250_port *); 171 extern int serial8250_rx_dma(struct uart_8250_port *, unsigned int iir); 172 extern int serial8250_request_dma(struct uart_8250_port *); 173 extern void serial8250_release_dma(struct uart_8250_port *); 174 #else 175 static inline int serial8250_tx_dma(struct uart_8250_port *p) 176 { 177 return -1; 178 } 179 static inline int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 180 { 181 return -1; 182 } 183 static inline int serial8250_request_dma(struct uart_8250_port *p) 184 { 185 return -1; 186 } 187 static inline void serial8250_release_dma(struct uart_8250_port *p) { } 188 #endif 189