1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 4 * 5 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 6 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 7 * 8 * This code is loosely based on the 1.8 moxa driver which is based on 9 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 10 * others. 11 * 12 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 13 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 14 * www.moxa.com. 15 * - Fixed x86_64 cleanness 16 */ 17 18 #include <linux/module.h> 19 #include <linux/errno.h> 20 #include <linux/signal.h> 21 #include <linux/sched.h> 22 #include <linux/timer.h> 23 #include <linux/interrupt.h> 24 #include <linux/tty.h> 25 #include <linux/tty_flip.h> 26 #include <linux/serial.h> 27 #include <linux/serial_reg.h> 28 #include <linux/major.h> 29 #include <linux/string.h> 30 #include <linux/fcntl.h> 31 #include <linux/ptrace.h> 32 #include <linux/ioport.h> 33 #include <linux/mm.h> 34 #include <linux/delay.h> 35 #include <linux/pci.h> 36 #include <linux/bitops.h> 37 #include <linux/slab.h> 38 #include <linux/ratelimit.h> 39 40 #include <asm/io.h> 41 #include <asm/irq.h> 42 #include <linux/uaccess.h> 43 44 #include "mxser.h" 45 46 #define MXSER_VERSION "2.0.5" /* 1.14 */ 47 #define MXSERMAJOR 174 48 49 #define MXSER_BOARDS 4 /* Max. boards */ 50 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 51 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 52 #define MXSER_ISR_PASS_LIMIT 100 53 54 /*CheckIsMoxaMust return value*/ 55 #define MOXA_OTHER_UART 0x00 56 #define MOXA_MUST_MU150_HWID 0x01 57 #define MOXA_MUST_MU860_HWID 0x02 58 59 #define WAKEUP_CHARS 256 60 61 #define UART_MCR_AFE 0x20 62 #define UART_LSR_SPECIAL 0x1E 63 64 #define PCI_DEVICE_ID_POS104UL 0x1044 65 #define PCI_DEVICE_ID_CB108 0x1080 66 #define PCI_DEVICE_ID_CP102UF 0x1023 67 #define PCI_DEVICE_ID_CP112UL 0x1120 68 #define PCI_DEVICE_ID_CB114 0x1142 69 #define PCI_DEVICE_ID_CP114UL 0x1143 70 #define PCI_DEVICE_ID_CB134I 0x1341 71 #define PCI_DEVICE_ID_CP138U 0x1380 72 73 74 #define C168_ASIC_ID 1 75 #define C104_ASIC_ID 2 76 #define C102_ASIC_ID 0xB 77 #define CI132_ASIC_ID 4 78 #define CI134_ASIC_ID 3 79 #define CI104J_ASIC_ID 5 80 81 #define MXSER_HIGHBAUD 1 82 #define MXSER_HAS2 2 83 84 /* This is only for PCI */ 85 static const struct { 86 int type; 87 int tx_fifo; 88 int rx_fifo; 89 int xmit_fifo_size; 90 int rx_high_water; 91 int rx_trigger; 92 int rx_low_water; 93 long max_baud; 94 } Gpci_uart_info[] = { 95 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 96 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 97 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 98 }; 99 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 100 101 struct mxser_cardinfo { 102 char *name; 103 unsigned int nports; 104 unsigned int flags; 105 }; 106 107 static const struct mxser_cardinfo mxser_cards[] = { 108 /* 0*/ { "C168 series", 8, }, 109 { "C104 series", 4, }, 110 { "CI-104J series", 4, }, 111 { "C168H/PCI series", 8, }, 112 { "C104H/PCI series", 4, }, 113 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 114 { "CI-132 series", 4, MXSER_HAS2 }, 115 { "CI-134 series", 4, }, 116 { "CP-132 series", 2, }, 117 { "CP-114 series", 4, }, 118 /*10*/ { "CT-114 series", 4, }, 119 { "CP-102 series", 2, MXSER_HIGHBAUD }, 120 { "CP-104U series", 4, }, 121 { "CP-168U series", 8, }, 122 { "CP-132U series", 2, }, 123 /*15*/ { "CP-134U series", 4, }, 124 { "CP-104JU series", 4, }, 125 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 126 { "CP-118U series", 8, }, 127 { "CP-102UL series", 2, }, 128 /*20*/ { "CP-102U series", 2, }, 129 { "CP-118EL series", 8, }, 130 { "CP-168EL series", 8, }, 131 { "CP-104EL series", 4, }, 132 { "CB-108 series", 8, }, 133 /*25*/ { "CB-114 series", 4, }, 134 { "CB-134I series", 4, }, 135 { "CP-138U series", 8, }, 136 { "POS-104UL series", 4, }, 137 { "CP-114UL series", 4, }, 138 /*30*/ { "CP-102UF series", 2, }, 139 { "CP-112UL series", 2, }, 140 }; 141 142 /* driver_data correspond to the lines in the structure above 143 see also ISA probe function before you change something */ 144 static const struct pci_device_id mxser_pcibrds[] = { 145 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 146 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, 171 { } 172 }; 173 MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 174 175 static unsigned long ioaddr[MXSER_BOARDS]; 176 static int ttymajor = MXSERMAJOR; 177 178 /* Variables for insmod */ 179 180 MODULE_AUTHOR("Casper Yang"); 181 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 182 module_param_hw_array(ioaddr, ulong, ioport, NULL, 0); 183 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 184 module_param(ttymajor, int, 0); 185 MODULE_LICENSE("GPL"); 186 187 struct mxser_log { 188 int tick; 189 unsigned long rxcnt[MXSER_PORTS]; 190 unsigned long txcnt[MXSER_PORTS]; 191 }; 192 193 struct mxser_mon { 194 unsigned long rxcnt; 195 unsigned long txcnt; 196 unsigned long up_rxcnt; 197 unsigned long up_txcnt; 198 int modem_status; 199 unsigned char hold_reason; 200 }; 201 202 struct mxser_mon_ext { 203 unsigned long rx_cnt[32]; 204 unsigned long tx_cnt[32]; 205 unsigned long up_rxcnt[32]; 206 unsigned long up_txcnt[32]; 207 int modem_status[32]; 208 209 long baudrate[32]; 210 int databits[32]; 211 int stopbits[32]; 212 int parity[32]; 213 int flowctrl[32]; 214 int fifo[32]; 215 int iftype[32]; 216 }; 217 218 struct mxser_board; 219 220 struct mxser_port { 221 struct tty_port port; 222 struct mxser_board *board; 223 224 unsigned long ioaddr; 225 unsigned long opmode_ioaddr; 226 int max_baud; 227 228 int rx_high_water; 229 int rx_trigger; /* Rx fifo trigger level */ 230 int rx_low_water; 231 int baud_base; /* max. speed */ 232 int type; /* UART type */ 233 234 int x_char; /* xon/xoff character */ 235 int IER; /* Interrupt Enable Register */ 236 int MCR; /* Modem control register */ 237 238 unsigned char stop_rx; 239 unsigned char ldisc_stop_rx; 240 241 int custom_divisor; 242 unsigned char err_shadow; 243 244 struct async_icount icount; /* kernel counters for 4 input interrupts */ 245 unsigned int timeout; 246 247 int read_status_mask; 248 int ignore_status_mask; 249 unsigned int xmit_fifo_size; 250 int xmit_head; 251 int xmit_tail; 252 int xmit_cnt; 253 int closing; 254 255 struct ktermios normal_termios; 256 257 struct mxser_mon mon_data; 258 259 spinlock_t slock; 260 }; 261 262 struct mxser_board { 263 unsigned int idx; 264 int irq; 265 const struct mxser_cardinfo *info; 266 unsigned long vector; 267 unsigned long vector_mask; 268 269 int chip_flag; 270 int uart_type; 271 272 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 273 }; 274 275 struct mxser_mstatus { 276 tcflag_t cflag; 277 int cts; 278 int dsr; 279 int ri; 280 int dcd; 281 }; 282 283 static struct mxser_board mxser_boards[MXSER_BOARDS]; 284 static struct tty_driver *mxvar_sdriver; 285 static struct mxser_log mxvar_log; 286 static int mxser_set_baud_method[MXSER_PORTS + 1]; 287 288 static void mxser_enable_must_enchance_mode(unsigned long baseio) 289 { 290 u8 oldlcr; 291 u8 efr; 292 293 oldlcr = inb(baseio + UART_LCR); 294 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 295 296 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 297 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 298 299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 300 outb(oldlcr, baseio + UART_LCR); 301 } 302 303 #ifdef CONFIG_PCI 304 static void mxser_disable_must_enchance_mode(unsigned long baseio) 305 { 306 u8 oldlcr; 307 u8 efr; 308 309 oldlcr = inb(baseio + UART_LCR); 310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 311 312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 314 315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 316 outb(oldlcr, baseio + UART_LCR); 317 } 318 #endif 319 320 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 321 { 322 u8 oldlcr; 323 u8 efr; 324 325 oldlcr = inb(baseio + UART_LCR); 326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 327 328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 329 efr &= ~MOXA_MUST_EFR_BANK_MASK; 330 efr |= MOXA_MUST_EFR_BANK0; 331 332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 333 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 334 outb(oldlcr, baseio + UART_LCR); 335 } 336 337 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 338 { 339 u8 oldlcr; 340 u8 efr; 341 342 oldlcr = inb(baseio + UART_LCR); 343 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 344 345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 346 efr &= ~MOXA_MUST_EFR_BANK_MASK; 347 efr |= MOXA_MUST_EFR_BANK0; 348 349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 350 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 351 outb(oldlcr, baseio + UART_LCR); 352 } 353 354 static void mxser_set_must_fifo_value(struct mxser_port *info) 355 { 356 u8 oldlcr; 357 u8 efr; 358 359 oldlcr = inb(info->ioaddr + UART_LCR); 360 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 361 362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 363 efr &= ~MOXA_MUST_EFR_BANK_MASK; 364 efr |= MOXA_MUST_EFR_BANK1; 365 366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 367 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 368 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 369 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 370 outb(oldlcr, info->ioaddr + UART_LCR); 371 } 372 373 static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 374 { 375 u8 oldlcr; 376 u8 efr; 377 378 oldlcr = inb(baseio + UART_LCR); 379 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 380 381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 382 efr &= ~MOXA_MUST_EFR_BANK_MASK; 383 efr |= MOXA_MUST_EFR_BANK2; 384 385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 386 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 387 outb(oldlcr, baseio + UART_LCR); 388 } 389 390 #ifdef CONFIG_PCI 391 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 392 { 393 u8 oldlcr; 394 u8 efr; 395 396 oldlcr = inb(baseio + UART_LCR); 397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 398 399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 400 efr &= ~MOXA_MUST_EFR_BANK_MASK; 401 efr |= MOXA_MUST_EFR_BANK2; 402 403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 405 outb(oldlcr, baseio + UART_LCR); 406 } 407 #endif 408 409 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 410 { 411 u8 oldlcr; 412 u8 efr; 413 414 oldlcr = inb(baseio + UART_LCR); 415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 416 417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 418 efr &= ~MOXA_MUST_EFR_SF_MASK; 419 420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 421 outb(oldlcr, baseio + UART_LCR); 422 } 423 424 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 425 { 426 u8 oldlcr; 427 u8 efr; 428 429 oldlcr = inb(baseio + UART_LCR); 430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 431 432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 434 efr |= MOXA_MUST_EFR_SF_TX1; 435 436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 437 outb(oldlcr, baseio + UART_LCR); 438 } 439 440 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 441 { 442 u8 oldlcr; 443 u8 efr; 444 445 oldlcr = inb(baseio + UART_LCR); 446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 447 448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 450 451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 452 outb(oldlcr, baseio + UART_LCR); 453 } 454 455 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 456 { 457 u8 oldlcr; 458 u8 efr; 459 460 oldlcr = inb(baseio + UART_LCR); 461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 462 463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 465 efr |= MOXA_MUST_EFR_SF_RX1; 466 467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 468 outb(oldlcr, baseio + UART_LCR); 469 } 470 471 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 472 { 473 u8 oldlcr; 474 u8 efr; 475 476 oldlcr = inb(baseio + UART_LCR); 477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 478 479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 481 482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 483 outb(oldlcr, baseio + UART_LCR); 484 } 485 486 #ifdef CONFIG_PCI 487 static int CheckIsMoxaMust(unsigned long io) 488 { 489 u8 oldmcr, hwid; 490 int i; 491 492 outb(0, io + UART_LCR); 493 mxser_disable_must_enchance_mode(io); 494 oldmcr = inb(io + UART_MCR); 495 outb(0, io + UART_MCR); 496 mxser_set_must_xon1_value(io, 0x11); 497 if ((hwid = inb(io + UART_MCR)) != 0) { 498 outb(oldmcr, io + UART_MCR); 499 return MOXA_OTHER_UART; 500 } 501 502 mxser_get_must_hardware_id(io, &hwid); 503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 504 if (hwid == Gpci_uart_info[i].type) 505 return (int)hwid; 506 } 507 return MOXA_OTHER_UART; 508 } 509 #endif 510 511 static void process_txrx_fifo(struct mxser_port *info) 512 { 513 int i; 514 515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 516 info->rx_trigger = 1; 517 info->rx_high_water = 1; 518 info->rx_low_water = 1; 519 info->xmit_fifo_size = 1; 520 } else 521 for (i = 0; i < UART_INFO_NUM; i++) 522 if (info->board->chip_flag == Gpci_uart_info[i].type) { 523 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 524 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 525 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 527 break; 528 } 529 } 530 531 static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 532 { 533 static unsigned char mxser_msr[MXSER_PORTS + 1]; 534 unsigned char status = 0; 535 536 status = inb(baseaddr + UART_MSR); 537 538 mxser_msr[port] &= 0x0F; 539 mxser_msr[port] |= status; 540 status = mxser_msr[port]; 541 if (mode) 542 mxser_msr[port] = 0; 543 544 return status; 545 } 546 547 static int mxser_carrier_raised(struct tty_port *port) 548 { 549 struct mxser_port *mp = container_of(port, struct mxser_port, port); 550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; 551 } 552 553 static void mxser_dtr_rts(struct tty_port *port, int on) 554 { 555 struct mxser_port *mp = container_of(port, struct mxser_port, port); 556 unsigned long flags; 557 558 spin_lock_irqsave(&mp->slock, flags); 559 if (on) 560 outb(inb(mp->ioaddr + UART_MCR) | 561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); 562 else 563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), 564 mp->ioaddr + UART_MCR); 565 spin_unlock_irqrestore(&mp->slock, flags); 566 } 567 568 static int mxser_set_baud(struct tty_struct *tty, long newspd) 569 { 570 struct mxser_port *info = tty->driver_data; 571 unsigned int quot = 0, baud; 572 unsigned char cval; 573 u64 timeout; 574 575 if (!info->ioaddr) 576 return -1; 577 578 if (newspd > info->max_baud) 579 return -1; 580 581 if (newspd == 134) { 582 quot = 2 * info->baud_base / 269; 583 tty_encode_baud_rate(tty, 134, 134); 584 } else if (newspd) { 585 quot = info->baud_base / newspd; 586 if (quot == 0) 587 quot = 1; 588 baud = info->baud_base/quot; 589 tty_encode_baud_rate(tty, baud, baud); 590 } else { 591 quot = 0; 592 } 593 594 /* 595 * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the 596 * u64 domain 597 */ 598 timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot; 599 do_div(timeout, info->baud_base); 600 info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */ 601 602 if (quot) { 603 info->MCR |= UART_MCR_DTR; 604 outb(info->MCR, info->ioaddr + UART_MCR); 605 } else { 606 info->MCR &= ~UART_MCR_DTR; 607 outb(info->MCR, info->ioaddr + UART_MCR); 608 return 0; 609 } 610 611 cval = inb(info->ioaddr + UART_LCR); 612 613 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 614 615 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 616 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 617 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 618 619 #ifdef BOTHER 620 if (C_BAUD(tty) == BOTHER) { 621 quot = info->baud_base % newspd; 622 quot *= 8; 623 if (quot % newspd > newspd / 2) { 624 quot /= newspd; 625 quot++; 626 } else 627 quot /= newspd; 628 629 mxser_set_must_enum_value(info->ioaddr, quot); 630 } else 631 #endif 632 mxser_set_must_enum_value(info->ioaddr, 0); 633 634 return 0; 635 } 636 637 /* 638 * This routine is called to set the UART divisor registers to match 639 * the specified baud rate for a serial port. 640 */ 641 static void mxser_change_speed(struct tty_struct *tty) 642 { 643 struct mxser_port *info = tty->driver_data; 644 unsigned cflag, cval, fcr; 645 unsigned char status; 646 647 cflag = tty->termios.c_cflag; 648 if (!info->ioaddr) 649 return; 650 651 if (mxser_set_baud_method[tty->index] == 0) 652 mxser_set_baud(tty, tty_get_baud_rate(tty)); 653 654 /* byte size and parity */ 655 switch (cflag & CSIZE) { 656 case CS5: 657 cval = 0x00; 658 break; 659 case CS6: 660 cval = 0x01; 661 break; 662 case CS7: 663 cval = 0x02; 664 break; 665 case CS8: 666 cval = 0x03; 667 break; 668 default: 669 cval = 0x00; 670 break; /* too keep GCC shut... */ 671 } 672 if (cflag & CSTOPB) 673 cval |= 0x04; 674 if (cflag & PARENB) 675 cval |= UART_LCR_PARITY; 676 if (!(cflag & PARODD)) 677 cval |= UART_LCR_EPAR; 678 if (cflag & CMSPAR) 679 cval |= UART_LCR_SPAR; 680 681 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 682 if (info->board->chip_flag) { 683 fcr = UART_FCR_ENABLE_FIFO; 684 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 685 mxser_set_must_fifo_value(info); 686 } else 687 fcr = 0; 688 } else { 689 fcr = UART_FCR_ENABLE_FIFO; 690 if (info->board->chip_flag) { 691 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 692 mxser_set_must_fifo_value(info); 693 } else { 694 switch (info->rx_trigger) { 695 case 1: 696 fcr |= UART_FCR_TRIGGER_1; 697 break; 698 case 4: 699 fcr |= UART_FCR_TRIGGER_4; 700 break; 701 case 8: 702 fcr |= UART_FCR_TRIGGER_8; 703 break; 704 default: 705 fcr |= UART_FCR_TRIGGER_14; 706 break; 707 } 708 } 709 } 710 711 /* CTS flow control flag and modem status interrupts */ 712 info->IER &= ~UART_IER_MSI; 713 info->MCR &= ~UART_MCR_AFE; 714 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS); 715 if (cflag & CRTSCTS) { 716 info->IER |= UART_IER_MSI; 717 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 718 info->MCR |= UART_MCR_AFE; 719 } else { 720 status = inb(info->ioaddr + UART_MSR); 721 if (tty->hw_stopped) { 722 if (status & UART_MSR_CTS) { 723 tty->hw_stopped = 0; 724 if (info->type != PORT_16550A && 725 !info->board->chip_flag) { 726 outb(info->IER & ~UART_IER_THRI, 727 info->ioaddr + 728 UART_IER); 729 info->IER |= UART_IER_THRI; 730 outb(info->IER, info->ioaddr + 731 UART_IER); 732 } 733 tty_wakeup(tty); 734 } 735 } else { 736 if (!(status & UART_MSR_CTS)) { 737 tty->hw_stopped = 1; 738 if ((info->type != PORT_16550A) && 739 (!info->board->chip_flag)) { 740 info->IER &= ~UART_IER_THRI; 741 outb(info->IER, info->ioaddr + 742 UART_IER); 743 } 744 } 745 } 746 } 747 } 748 outb(info->MCR, info->ioaddr + UART_MCR); 749 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL); 750 if (~cflag & CLOCAL) 751 info->IER |= UART_IER_MSI; 752 outb(info->IER, info->ioaddr + UART_IER); 753 754 /* 755 * Set up parity check flag 756 */ 757 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 758 if (I_INPCK(tty)) 759 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 760 if (I_BRKINT(tty) || I_PARMRK(tty)) 761 info->read_status_mask |= UART_LSR_BI; 762 763 info->ignore_status_mask = 0; 764 765 if (I_IGNBRK(tty)) { 766 info->ignore_status_mask |= UART_LSR_BI; 767 info->read_status_mask |= UART_LSR_BI; 768 /* 769 * If we're ignore parity and break indicators, ignore 770 * overruns too. (For real raw support). 771 */ 772 if (I_IGNPAR(tty)) { 773 info->ignore_status_mask |= 774 UART_LSR_OE | 775 UART_LSR_PE | 776 UART_LSR_FE; 777 info->read_status_mask |= 778 UART_LSR_OE | 779 UART_LSR_PE | 780 UART_LSR_FE; 781 } 782 } 783 if (info->board->chip_flag) { 784 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 785 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 786 if (I_IXON(tty)) { 787 mxser_enable_must_rx_software_flow_control( 788 info->ioaddr); 789 } else { 790 mxser_disable_must_rx_software_flow_control( 791 info->ioaddr); 792 } 793 if (I_IXOFF(tty)) { 794 mxser_enable_must_tx_software_flow_control( 795 info->ioaddr); 796 } else { 797 mxser_disable_must_tx_software_flow_control( 798 info->ioaddr); 799 } 800 } 801 802 803 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 804 outb(cval, info->ioaddr + UART_LCR); 805 } 806 807 static void mxser_check_modem_status(struct tty_struct *tty, 808 struct mxser_port *port, int status) 809 { 810 /* update input line counters */ 811 if (status & UART_MSR_TERI) 812 port->icount.rng++; 813 if (status & UART_MSR_DDSR) 814 port->icount.dsr++; 815 if (status & UART_MSR_DDCD) 816 port->icount.dcd++; 817 if (status & UART_MSR_DCTS) 818 port->icount.cts++; 819 port->mon_data.modem_status = status; 820 wake_up_interruptible(&port->port.delta_msr_wait); 821 822 if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) { 823 if (status & UART_MSR_DCD) 824 wake_up_interruptible(&port->port.open_wait); 825 } 826 827 if (tty_port_cts_enabled(&port->port)) { 828 if (tty->hw_stopped) { 829 if (status & UART_MSR_CTS) { 830 tty->hw_stopped = 0; 831 832 if ((port->type != PORT_16550A) && 833 (!port->board->chip_flag)) { 834 outb(port->IER & ~UART_IER_THRI, 835 port->ioaddr + UART_IER); 836 port->IER |= UART_IER_THRI; 837 outb(port->IER, port->ioaddr + 838 UART_IER); 839 } 840 tty_wakeup(tty); 841 } 842 } else { 843 if (!(status & UART_MSR_CTS)) { 844 tty->hw_stopped = 1; 845 if (port->type != PORT_16550A && 846 !port->board->chip_flag) { 847 port->IER &= ~UART_IER_THRI; 848 outb(port->IER, port->ioaddr + 849 UART_IER); 850 } 851 } 852 } 853 } 854 } 855 856 static int mxser_activate(struct tty_port *port, struct tty_struct *tty) 857 { 858 struct mxser_port *info = container_of(port, struct mxser_port, port); 859 unsigned long page; 860 unsigned long flags; 861 862 page = __get_free_page(GFP_KERNEL); 863 if (!page) 864 return -ENOMEM; 865 866 spin_lock_irqsave(&info->slock, flags); 867 868 if (!info->ioaddr || !info->type) { 869 set_bit(TTY_IO_ERROR, &tty->flags); 870 free_page(page); 871 spin_unlock_irqrestore(&info->slock, flags); 872 return 0; 873 } 874 info->port.xmit_buf = (unsigned char *) page; 875 876 /* 877 * Clear the FIFO buffers and disable them 878 * (they will be reenabled in mxser_change_speed()) 879 */ 880 if (info->board->chip_flag) 881 outb((UART_FCR_CLEAR_RCVR | 882 UART_FCR_CLEAR_XMIT | 883 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 884 else 885 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 886 info->ioaddr + UART_FCR); 887 888 /* 889 * At this point there's no way the LSR could still be 0xFF; 890 * if it is, then bail out, because there's likely no UART 891 * here. 892 */ 893 if (inb(info->ioaddr + UART_LSR) == 0xff) { 894 spin_unlock_irqrestore(&info->slock, flags); 895 if (capable(CAP_SYS_ADMIN)) { 896 set_bit(TTY_IO_ERROR, &tty->flags); 897 return 0; 898 } else 899 return -ENODEV; 900 } 901 902 /* 903 * Clear the interrupt registers. 904 */ 905 (void) inb(info->ioaddr + UART_LSR); 906 (void) inb(info->ioaddr + UART_RX); 907 (void) inb(info->ioaddr + UART_IIR); 908 (void) inb(info->ioaddr + UART_MSR); 909 910 /* 911 * Now, initialize the UART 912 */ 913 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 914 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 915 outb(info->MCR, info->ioaddr + UART_MCR); 916 917 /* 918 * Finally, enable interrupts 919 */ 920 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 921 922 if (info->board->chip_flag) 923 info->IER |= MOXA_MUST_IER_EGDAI; 924 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 925 926 /* 927 * And clear the interrupt registers again for luck. 928 */ 929 (void) inb(info->ioaddr + UART_LSR); 930 (void) inb(info->ioaddr + UART_RX); 931 (void) inb(info->ioaddr + UART_IIR); 932 (void) inb(info->ioaddr + UART_MSR); 933 934 clear_bit(TTY_IO_ERROR, &tty->flags); 935 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 936 937 /* 938 * and set the speed of the serial port 939 */ 940 mxser_change_speed(tty); 941 spin_unlock_irqrestore(&info->slock, flags); 942 943 return 0; 944 } 945 946 /* 947 * This routine will shutdown a serial port 948 */ 949 static void mxser_shutdown_port(struct tty_port *port) 950 { 951 struct mxser_port *info = container_of(port, struct mxser_port, port); 952 unsigned long flags; 953 954 spin_lock_irqsave(&info->slock, flags); 955 956 /* 957 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 958 * here so the queue might never be waken up 959 */ 960 wake_up_interruptible(&info->port.delta_msr_wait); 961 962 /* 963 * Free the xmit buffer, if necessary 964 */ 965 if (info->port.xmit_buf) { 966 free_page((unsigned long) info->port.xmit_buf); 967 info->port.xmit_buf = NULL; 968 } 969 970 info->IER = 0; 971 outb(0x00, info->ioaddr + UART_IER); 972 973 /* clear Rx/Tx FIFO's */ 974 if (info->board->chip_flag) 975 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 976 MOXA_MUST_FCR_GDA_MODE_ENABLE, 977 info->ioaddr + UART_FCR); 978 else 979 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 980 info->ioaddr + UART_FCR); 981 982 /* read data port to reset things */ 983 (void) inb(info->ioaddr + UART_RX); 984 985 986 if (info->board->chip_flag) 987 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 988 989 spin_unlock_irqrestore(&info->slock, flags); 990 } 991 992 /* 993 * This routine is called whenever a serial port is opened. It 994 * enables interrupts for a serial port, linking in its async structure into 995 * the IRQ chain. It also performs the serial-specific 996 * initialization for the tty structure. 997 */ 998 static int mxser_open(struct tty_struct *tty, struct file *filp) 999 { 1000 struct mxser_port *info; 1001 int line; 1002 1003 line = tty->index; 1004 if (line == MXSER_PORTS) 1005 return 0; 1006 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1007 if (!info->ioaddr) 1008 return -ENODEV; 1009 1010 tty->driver_data = info; 1011 return tty_port_open(&info->port, tty, filp); 1012 } 1013 1014 static void mxser_flush_buffer(struct tty_struct *tty) 1015 { 1016 struct mxser_port *info = tty->driver_data; 1017 char fcr; 1018 unsigned long flags; 1019 1020 1021 spin_lock_irqsave(&info->slock, flags); 1022 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1023 1024 fcr = inb(info->ioaddr + UART_FCR); 1025 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1026 info->ioaddr + UART_FCR); 1027 outb(fcr, info->ioaddr + UART_FCR); 1028 1029 spin_unlock_irqrestore(&info->slock, flags); 1030 1031 tty_wakeup(tty); 1032 } 1033 1034 1035 static void mxser_close_port(struct tty_port *port) 1036 { 1037 struct mxser_port *info = container_of(port, struct mxser_port, port); 1038 unsigned long timeout; 1039 /* 1040 * At this point we stop accepting input. To do this, we 1041 * disable the receive line status interrupts, and tell the 1042 * interrupt driver to stop checking the data ready bit in the 1043 * line status register. 1044 */ 1045 info->IER &= ~UART_IER_RLSI; 1046 if (info->board->chip_flag) 1047 info->IER &= ~MOXA_MUST_RECV_ISR; 1048 1049 outb(info->IER, info->ioaddr + UART_IER); 1050 /* 1051 * Before we drop DTR, make sure the UART transmitter 1052 * has completely drained; this is especially 1053 * important if there is a transmit FIFO! 1054 */ 1055 timeout = jiffies + HZ; 1056 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1057 schedule_timeout_interruptible(5); 1058 if (time_after(jiffies, timeout)) 1059 break; 1060 } 1061 } 1062 1063 /* 1064 * This routine is called when the serial port gets closed. First, we 1065 * wait for the last remaining data to be sent. Then, we unlink its 1066 * async structure from the interrupt chain if necessary, and we free 1067 * that IRQ if nothing is left in the chain. 1068 */ 1069 static void mxser_close(struct tty_struct *tty, struct file *filp) 1070 { 1071 struct mxser_port *info = tty->driver_data; 1072 struct tty_port *port = &info->port; 1073 1074 if (tty->index == MXSER_PORTS || info == NULL) 1075 return; 1076 if (tty_port_close_start(port, tty, filp) == 0) 1077 return; 1078 info->closing = 1; 1079 mutex_lock(&port->mutex); 1080 mxser_close_port(port); 1081 mxser_flush_buffer(tty); 1082 if (tty_port_initialized(port) && C_HUPCL(tty)) 1083 tty_port_lower_dtr_rts(port); 1084 mxser_shutdown_port(port); 1085 tty_port_set_initialized(port, 0); 1086 mutex_unlock(&port->mutex); 1087 info->closing = 0; 1088 /* Right now the tty_port set is done outside of the close_end helper 1089 as we don't yet have everyone using refcounts */ 1090 tty_port_close_end(port, tty); 1091 tty_port_tty_set(port, NULL); 1092 } 1093 1094 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1095 { 1096 int c, total = 0; 1097 struct mxser_port *info = tty->driver_data; 1098 unsigned long flags; 1099 1100 if (!info->port.xmit_buf) 1101 return 0; 1102 1103 while (1) { 1104 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1105 SERIAL_XMIT_SIZE - info->xmit_head)); 1106 if (c <= 0) 1107 break; 1108 1109 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1110 spin_lock_irqsave(&info->slock, flags); 1111 info->xmit_head = (info->xmit_head + c) & 1112 (SERIAL_XMIT_SIZE - 1); 1113 info->xmit_cnt += c; 1114 spin_unlock_irqrestore(&info->slock, flags); 1115 1116 buf += c; 1117 count -= c; 1118 total += c; 1119 } 1120 1121 if (info->xmit_cnt && !tty->stopped) { 1122 if (!tty->hw_stopped || 1123 (info->type == PORT_16550A) || 1124 (info->board->chip_flag)) { 1125 spin_lock_irqsave(&info->slock, flags); 1126 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1127 UART_IER); 1128 info->IER |= UART_IER_THRI; 1129 outb(info->IER, info->ioaddr + UART_IER); 1130 spin_unlock_irqrestore(&info->slock, flags); 1131 } 1132 } 1133 return total; 1134 } 1135 1136 static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1137 { 1138 struct mxser_port *info = tty->driver_data; 1139 unsigned long flags; 1140 1141 if (!info->port.xmit_buf) 1142 return 0; 1143 1144 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1145 return 0; 1146 1147 spin_lock_irqsave(&info->slock, flags); 1148 info->port.xmit_buf[info->xmit_head++] = ch; 1149 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1150 info->xmit_cnt++; 1151 spin_unlock_irqrestore(&info->slock, flags); 1152 if (!tty->stopped) { 1153 if (!tty->hw_stopped || 1154 (info->type == PORT_16550A) || 1155 info->board->chip_flag) { 1156 spin_lock_irqsave(&info->slock, flags); 1157 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1158 info->IER |= UART_IER_THRI; 1159 outb(info->IER, info->ioaddr + UART_IER); 1160 spin_unlock_irqrestore(&info->slock, flags); 1161 } 1162 } 1163 return 1; 1164 } 1165 1166 1167 static void mxser_flush_chars(struct tty_struct *tty) 1168 { 1169 struct mxser_port *info = tty->driver_data; 1170 unsigned long flags; 1171 1172 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1173 (tty->hw_stopped && info->type != PORT_16550A && 1174 !info->board->chip_flag)) 1175 return; 1176 1177 spin_lock_irqsave(&info->slock, flags); 1178 1179 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1180 info->IER |= UART_IER_THRI; 1181 outb(info->IER, info->ioaddr + UART_IER); 1182 1183 spin_unlock_irqrestore(&info->slock, flags); 1184 } 1185 1186 static int mxser_write_room(struct tty_struct *tty) 1187 { 1188 struct mxser_port *info = tty->driver_data; 1189 int ret; 1190 1191 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1192 return ret < 0 ? 0 : ret; 1193 } 1194 1195 static int mxser_chars_in_buffer(struct tty_struct *tty) 1196 { 1197 struct mxser_port *info = tty->driver_data; 1198 return info->xmit_cnt; 1199 } 1200 1201 /* 1202 * ------------------------------------------------------------ 1203 * friends of mxser_ioctl() 1204 * ------------------------------------------------------------ 1205 */ 1206 static int mxser_get_serial_info(struct tty_struct *tty, 1207 struct serial_struct *ss) 1208 { 1209 struct mxser_port *info = tty->driver_data; 1210 struct tty_port *port = &info->port; 1211 1212 if (tty->index == MXSER_PORTS) 1213 return -ENOTTY; 1214 1215 mutex_lock(&port->mutex); 1216 ss->type = info->type, 1217 ss->line = tty->index, 1218 ss->port = info->ioaddr, 1219 ss->irq = info->board->irq, 1220 ss->flags = info->port.flags, 1221 ss->baud_base = info->baud_base, 1222 ss->close_delay = info->port.close_delay, 1223 ss->closing_wait = info->port.closing_wait, 1224 ss->custom_divisor = info->custom_divisor, 1225 mutex_unlock(&port->mutex); 1226 return 0; 1227 } 1228 1229 static int mxser_set_serial_info(struct tty_struct *tty, 1230 struct serial_struct *ss) 1231 { 1232 struct mxser_port *info = tty->driver_data; 1233 struct tty_port *port = &info->port; 1234 speed_t baud; 1235 unsigned long sl_flags; 1236 unsigned int flags; 1237 int retval = 0; 1238 1239 if (tty->index == MXSER_PORTS) 1240 return -ENOTTY; 1241 if (tty_io_error(tty)) 1242 return -EIO; 1243 1244 mutex_lock(&port->mutex); 1245 if (!info->ioaddr) { 1246 mutex_unlock(&port->mutex); 1247 return -ENODEV; 1248 } 1249 1250 if (ss->irq != info->board->irq || 1251 ss->port != info->ioaddr) { 1252 mutex_unlock(&port->mutex); 1253 return -EINVAL; 1254 } 1255 1256 flags = port->flags & ASYNC_SPD_MASK; 1257 1258 if (!capable(CAP_SYS_ADMIN)) { 1259 if ((ss->baud_base != info->baud_base) || 1260 (ss->close_delay != info->port.close_delay) || 1261 ((ss->flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) { 1262 mutex_unlock(&port->mutex); 1263 return -EPERM; 1264 } 1265 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1266 (ss->flags & ASYNC_USR_MASK)); 1267 } else { 1268 /* 1269 * OK, past this point, all the error checking has been done. 1270 * At this point, we start making changes..... 1271 */ 1272 port->flags = ((port->flags & ~ASYNC_FLAGS) | 1273 (ss->flags & ASYNC_FLAGS)); 1274 port->close_delay = ss->close_delay * HZ / 100; 1275 port->closing_wait = ss->closing_wait * HZ / 100; 1276 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1277 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1278 (ss->baud_base != info->baud_base || 1279 ss->custom_divisor != 1280 info->custom_divisor)) { 1281 if (ss->custom_divisor == 0) { 1282 mutex_unlock(&port->mutex); 1283 return -EINVAL; 1284 } 1285 baud = ss->baud_base / ss->custom_divisor; 1286 tty_encode_baud_rate(tty, baud, baud); 1287 } 1288 } 1289 1290 info->type = ss->type; 1291 1292 process_txrx_fifo(info); 1293 1294 if (tty_port_initialized(port)) { 1295 if (flags != (port->flags & ASYNC_SPD_MASK)) { 1296 spin_lock_irqsave(&info->slock, sl_flags); 1297 mxser_change_speed(tty); 1298 spin_unlock_irqrestore(&info->slock, sl_flags); 1299 } 1300 } else { 1301 retval = mxser_activate(port, tty); 1302 if (retval == 0) 1303 tty_port_set_initialized(port, 1); 1304 } 1305 mutex_unlock(&port->mutex); 1306 return retval; 1307 } 1308 1309 /* 1310 * mxser_get_lsr_info - get line status register info 1311 * 1312 * Purpose: Let user call ioctl() to get info when the UART physically 1313 * is emptied. On bus types like RS485, the transmitter must 1314 * release the bus after transmitting. This must be done when 1315 * the transmit shift register is empty, not be done when the 1316 * transmit holding register is empty. This functionality 1317 * allows an RS485 driver to be written in user space. 1318 */ 1319 static int mxser_get_lsr_info(struct mxser_port *info, 1320 unsigned int __user *value) 1321 { 1322 unsigned char status; 1323 unsigned int result; 1324 unsigned long flags; 1325 1326 spin_lock_irqsave(&info->slock, flags); 1327 status = inb(info->ioaddr + UART_LSR); 1328 spin_unlock_irqrestore(&info->slock, flags); 1329 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1330 return put_user(result, value); 1331 } 1332 1333 static int mxser_tiocmget(struct tty_struct *tty) 1334 { 1335 struct mxser_port *info = tty->driver_data; 1336 unsigned char control, status; 1337 unsigned long flags; 1338 1339 1340 if (tty->index == MXSER_PORTS) 1341 return -ENOIOCTLCMD; 1342 if (tty_io_error(tty)) 1343 return -EIO; 1344 1345 control = info->MCR; 1346 1347 spin_lock_irqsave(&info->slock, flags); 1348 status = inb(info->ioaddr + UART_MSR); 1349 if (status & UART_MSR_ANY_DELTA) 1350 mxser_check_modem_status(tty, info, status); 1351 spin_unlock_irqrestore(&info->slock, flags); 1352 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1353 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1354 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1355 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1356 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1357 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1358 } 1359 1360 static int mxser_tiocmset(struct tty_struct *tty, 1361 unsigned int set, unsigned int clear) 1362 { 1363 struct mxser_port *info = tty->driver_data; 1364 unsigned long flags; 1365 1366 1367 if (tty->index == MXSER_PORTS) 1368 return -ENOIOCTLCMD; 1369 if (tty_io_error(tty)) 1370 return -EIO; 1371 1372 spin_lock_irqsave(&info->slock, flags); 1373 1374 if (set & TIOCM_RTS) 1375 info->MCR |= UART_MCR_RTS; 1376 if (set & TIOCM_DTR) 1377 info->MCR |= UART_MCR_DTR; 1378 1379 if (clear & TIOCM_RTS) 1380 info->MCR &= ~UART_MCR_RTS; 1381 if (clear & TIOCM_DTR) 1382 info->MCR &= ~UART_MCR_DTR; 1383 1384 outb(info->MCR, info->ioaddr + UART_MCR); 1385 spin_unlock_irqrestore(&info->slock, flags); 1386 return 0; 1387 } 1388 1389 static int __init mxser_program_mode(int port) 1390 { 1391 int id, i, j, n; 1392 1393 outb(0, port); 1394 outb(0, port); 1395 outb(0, port); 1396 (void)inb(port); 1397 (void)inb(port); 1398 outb(0, port); 1399 (void)inb(port); 1400 1401 id = inb(port + 1) & 0x1F; 1402 if ((id != C168_ASIC_ID) && 1403 (id != C104_ASIC_ID) && 1404 (id != C102_ASIC_ID) && 1405 (id != CI132_ASIC_ID) && 1406 (id != CI134_ASIC_ID) && 1407 (id != CI104J_ASIC_ID)) 1408 return -1; 1409 for (i = 0, j = 0; i < 4; i++) { 1410 n = inb(port + 2); 1411 if (n == 'M') { 1412 j = 1; 1413 } else if ((j == 1) && (n == 1)) { 1414 j = 2; 1415 break; 1416 } else 1417 j = 0; 1418 } 1419 if (j != 2) 1420 id = -2; 1421 return id; 1422 } 1423 1424 static void __init mxser_normal_mode(int port) 1425 { 1426 int i, n; 1427 1428 outb(0xA5, port + 1); 1429 outb(0x80, port + 3); 1430 outb(12, port + 0); /* 9600 bps */ 1431 outb(0, port + 1); 1432 outb(0x03, port + 3); /* 8 data bits */ 1433 outb(0x13, port + 4); /* loop back mode */ 1434 for (i = 0; i < 16; i++) { 1435 n = inb(port + 5); 1436 if ((n & 0x61) == 0x60) 1437 break; 1438 if ((n & 1) == 1) 1439 (void)inb(port); 1440 } 1441 outb(0x00, port + 4); 1442 } 1443 1444 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1445 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1446 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1447 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1448 #define EN_CCMD 0x000 /* Chip's command register */ 1449 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1450 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1451 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1452 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1453 #define EN0_DCFG 0x00E /* Data configuration reg WR */ 1454 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1455 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1456 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1457 static int __init mxser_read_register(int port, unsigned short *regs) 1458 { 1459 int i, k, value, id; 1460 unsigned int j; 1461 1462 id = mxser_program_mode(port); 1463 if (id < 0) 1464 return id; 1465 for (i = 0; i < 14; i++) { 1466 k = (i & 0x3F) | 0x180; 1467 for (j = 0x100; j > 0; j >>= 1) { 1468 outb(CHIP_CS, port); 1469 if (k & j) { 1470 outb(CHIP_CS | CHIP_DO, port); 1471 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1472 } else { 1473 outb(CHIP_CS, port); 1474 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1475 } 1476 } 1477 (void)inb(port); 1478 value = 0; 1479 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1480 outb(CHIP_CS, port); 1481 outb(CHIP_CS | CHIP_SK, port); 1482 if (inb(port) & CHIP_DI) 1483 value |= j; 1484 } 1485 regs[i] = value; 1486 outb(0, port); 1487 } 1488 mxser_normal_mode(port); 1489 return id; 1490 } 1491 1492 static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1493 { 1494 struct mxser_port *ip; 1495 struct tty_port *port; 1496 struct tty_struct *tty; 1497 int result, status; 1498 unsigned int i, j; 1499 int ret = 0; 1500 1501 switch (cmd) { 1502 case MOXA_GET_MAJOR: 1503 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1504 "%x (GET_MAJOR), fix your userspace\n", 1505 current->comm, cmd); 1506 return put_user(ttymajor, (int __user *)argp); 1507 1508 case MOXA_CHKPORTENABLE: 1509 result = 0; 1510 for (i = 0; i < MXSER_BOARDS; i++) 1511 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1512 if (mxser_boards[i].ports[j].ioaddr) 1513 result |= (1 << i); 1514 return put_user(result, (unsigned long __user *)argp); 1515 case MOXA_GETDATACOUNT: 1516 /* The receive side is locked by port->slock but it isn't 1517 clear that an exact snapshot is worth copying here */ 1518 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1519 ret = -EFAULT; 1520 return ret; 1521 case MOXA_GETMSTATUS: { 1522 struct mxser_mstatus ms, __user *msu = argp; 1523 for (i = 0; i < MXSER_BOARDS; i++) 1524 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1525 ip = &mxser_boards[i].ports[j]; 1526 port = &ip->port; 1527 memset(&ms, 0, sizeof(ms)); 1528 1529 mutex_lock(&port->mutex); 1530 if (!ip->ioaddr) 1531 goto copy; 1532 1533 tty = tty_port_tty_get(port); 1534 1535 if (!tty) 1536 ms.cflag = ip->normal_termios.c_cflag; 1537 else 1538 ms.cflag = tty->termios.c_cflag; 1539 tty_kref_put(tty); 1540 spin_lock_irq(&ip->slock); 1541 status = inb(ip->ioaddr + UART_MSR); 1542 spin_unlock_irq(&ip->slock); 1543 if (status & UART_MSR_DCD) 1544 ms.dcd = 1; 1545 if (status & UART_MSR_DSR) 1546 ms.dsr = 1; 1547 if (status & UART_MSR_CTS) 1548 ms.cts = 1; 1549 copy: 1550 mutex_unlock(&port->mutex); 1551 if (copy_to_user(msu, &ms, sizeof(ms))) 1552 return -EFAULT; 1553 msu++; 1554 } 1555 return 0; 1556 } 1557 case MOXA_ASPP_MON_EXT: { 1558 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1559 unsigned int cflag, iflag, p; 1560 u8 opmode; 1561 1562 me = kzalloc(sizeof(*me), GFP_KERNEL); 1563 if (!me) 1564 return -ENOMEM; 1565 1566 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1567 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1568 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1569 i = MXSER_BOARDS; 1570 break; 1571 } 1572 ip = &mxser_boards[i].ports[j]; 1573 port = &ip->port; 1574 1575 mutex_lock(&port->mutex); 1576 if (!ip->ioaddr) { 1577 mutex_unlock(&port->mutex); 1578 continue; 1579 } 1580 1581 spin_lock_irq(&ip->slock); 1582 status = mxser_get_msr(ip->ioaddr, 0, p); 1583 1584 if (status & UART_MSR_TERI) 1585 ip->icount.rng++; 1586 if (status & UART_MSR_DDSR) 1587 ip->icount.dsr++; 1588 if (status & UART_MSR_DDCD) 1589 ip->icount.dcd++; 1590 if (status & UART_MSR_DCTS) 1591 ip->icount.cts++; 1592 1593 ip->mon_data.modem_status = status; 1594 me->rx_cnt[p] = ip->mon_data.rxcnt; 1595 me->tx_cnt[p] = ip->mon_data.txcnt; 1596 me->up_rxcnt[p] = ip->mon_data.up_rxcnt; 1597 me->up_txcnt[p] = ip->mon_data.up_txcnt; 1598 me->modem_status[p] = 1599 ip->mon_data.modem_status; 1600 spin_unlock_irq(&ip->slock); 1601 1602 tty = tty_port_tty_get(&ip->port); 1603 1604 if (!tty) { 1605 cflag = ip->normal_termios.c_cflag; 1606 iflag = ip->normal_termios.c_iflag; 1607 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); 1608 } else { 1609 cflag = tty->termios.c_cflag; 1610 iflag = tty->termios.c_iflag; 1611 me->baudrate[p] = tty_get_baud_rate(tty); 1612 } 1613 tty_kref_put(tty); 1614 1615 me->databits[p] = cflag & CSIZE; 1616 me->stopbits[p] = cflag & CSTOPB; 1617 me->parity[p] = cflag & (PARENB | PARODD | 1618 CMSPAR); 1619 1620 if (cflag & CRTSCTS) 1621 me->flowctrl[p] |= 0x03; 1622 1623 if (iflag & (IXON | IXOFF)) 1624 me->flowctrl[p] |= 0x0C; 1625 1626 if (ip->type == PORT_16550A) 1627 me->fifo[p] = 1; 1628 1629 if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) { 1630 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); 1631 opmode &= OP_MODE_MASK; 1632 } else { 1633 opmode = RS232_MODE; 1634 } 1635 me->iftype[p] = opmode; 1636 mutex_unlock(&port->mutex); 1637 } 1638 } 1639 if (copy_to_user(argp, me, sizeof(*me))) 1640 ret = -EFAULT; 1641 kfree(me); 1642 return ret; 1643 } 1644 default: 1645 return -ENOIOCTLCMD; 1646 } 1647 return 0; 1648 } 1649 1650 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1651 struct async_icount *cprev) 1652 { 1653 struct async_icount cnow; 1654 unsigned long flags; 1655 int ret; 1656 1657 spin_lock_irqsave(&info->slock, flags); 1658 cnow = info->icount; /* atomic copy */ 1659 spin_unlock_irqrestore(&info->slock, flags); 1660 1661 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1662 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1663 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1664 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1665 1666 *cprev = cnow; 1667 1668 return ret; 1669 } 1670 1671 static int mxser_ioctl(struct tty_struct *tty, 1672 unsigned int cmd, unsigned long arg) 1673 { 1674 struct mxser_port *info = tty->driver_data; 1675 struct async_icount cnow; 1676 unsigned long flags; 1677 void __user *argp = (void __user *)arg; 1678 1679 if (tty->index == MXSER_PORTS) 1680 return mxser_ioctl_special(cmd, argp); 1681 1682 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1683 int p; 1684 unsigned long opmode; 1685 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1686 int shiftbit; 1687 unsigned char val, mask; 1688 1689 if (info->board->chip_flag != MOXA_MUST_MU860_HWID) 1690 return -EFAULT; 1691 1692 p = tty->index % 4; 1693 if (cmd == MOXA_SET_OP_MODE) { 1694 if (get_user(opmode, (int __user *) argp)) 1695 return -EFAULT; 1696 if (opmode != RS232_MODE && 1697 opmode != RS485_2WIRE_MODE && 1698 opmode != RS422_MODE && 1699 opmode != RS485_4WIRE_MODE) 1700 return -EFAULT; 1701 mask = ModeMask[p]; 1702 shiftbit = p * 2; 1703 spin_lock_irq(&info->slock); 1704 val = inb(info->opmode_ioaddr); 1705 val &= mask; 1706 val |= (opmode << shiftbit); 1707 outb(val, info->opmode_ioaddr); 1708 spin_unlock_irq(&info->slock); 1709 } else { 1710 shiftbit = p * 2; 1711 spin_lock_irq(&info->slock); 1712 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1713 spin_unlock_irq(&info->slock); 1714 opmode &= OP_MODE_MASK; 1715 if (put_user(opmode, (int __user *)argp)) 1716 return -EFAULT; 1717 } 1718 return 0; 1719 } 1720 1721 if (cmd != TIOCMIWAIT && tty_io_error(tty)) 1722 return -EIO; 1723 1724 switch (cmd) { 1725 case TIOCSERGETLSR: /* Get line status register */ 1726 return mxser_get_lsr_info(info, argp); 1727 /* 1728 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1729 * - mask passed in arg for lines of interest 1730 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1731 * Caller should use TIOCGICOUNT to see which one it was 1732 */ 1733 case TIOCMIWAIT: 1734 spin_lock_irqsave(&info->slock, flags); 1735 cnow = info->icount; /* note the counters on entry */ 1736 spin_unlock_irqrestore(&info->slock, flags); 1737 1738 return wait_event_interruptible(info->port.delta_msr_wait, 1739 mxser_cflags_changed(info, arg, &cnow)); 1740 case MOXA_HighSpeedOn: 1741 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1742 case MOXA_SDS_RSTICOUNTER: 1743 spin_lock_irq(&info->slock); 1744 info->mon_data.rxcnt = 0; 1745 info->mon_data.txcnt = 0; 1746 spin_unlock_irq(&info->slock); 1747 return 0; 1748 1749 case MOXA_ASPP_OQUEUE:{ 1750 int len, lsr; 1751 1752 len = mxser_chars_in_buffer(tty); 1753 spin_lock_irq(&info->slock); 1754 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; 1755 spin_unlock_irq(&info->slock); 1756 len += (lsr ? 0 : 1); 1757 1758 return put_user(len, (int __user *)argp); 1759 } 1760 case MOXA_ASPP_MON: { 1761 int mcr, status; 1762 1763 spin_lock_irq(&info->slock); 1764 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1765 mxser_check_modem_status(tty, info, status); 1766 1767 mcr = inb(info->ioaddr + UART_MCR); 1768 spin_unlock_irq(&info->slock); 1769 1770 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1771 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1772 else 1773 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1774 1775 if (mcr & MOXA_MUST_MCR_TX_XON) 1776 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1777 else 1778 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1779 1780 if (tty->hw_stopped) 1781 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1782 else 1783 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1784 1785 if (copy_to_user(argp, &info->mon_data, 1786 sizeof(struct mxser_mon))) 1787 return -EFAULT; 1788 1789 return 0; 1790 } 1791 case MOXA_ASPP_LSTATUS: { 1792 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1793 return -EFAULT; 1794 1795 info->err_shadow = 0; 1796 return 0; 1797 } 1798 case MOXA_SET_BAUD_METHOD: { 1799 int method; 1800 1801 if (get_user(method, (int __user *)argp)) 1802 return -EFAULT; 1803 mxser_set_baud_method[tty->index] = method; 1804 return put_user(method, (int __user *)argp); 1805 } 1806 default: 1807 return -ENOIOCTLCMD; 1808 } 1809 return 0; 1810 } 1811 1812 /* 1813 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1814 * Return: write counters to the user passed counter struct 1815 * NB: both 1->0 and 0->1 transitions are counted except for 1816 * RI where only 0->1 is counted. 1817 */ 1818 1819 static int mxser_get_icount(struct tty_struct *tty, 1820 struct serial_icounter_struct *icount) 1821 1822 { 1823 struct mxser_port *info = tty->driver_data; 1824 struct async_icount cnow; 1825 unsigned long flags; 1826 1827 spin_lock_irqsave(&info->slock, flags); 1828 cnow = info->icount; 1829 spin_unlock_irqrestore(&info->slock, flags); 1830 1831 icount->frame = cnow.frame; 1832 icount->brk = cnow.brk; 1833 icount->overrun = cnow.overrun; 1834 icount->buf_overrun = cnow.buf_overrun; 1835 icount->parity = cnow.parity; 1836 icount->rx = cnow.rx; 1837 icount->tx = cnow.tx; 1838 icount->cts = cnow.cts; 1839 icount->dsr = cnow.dsr; 1840 icount->rng = cnow.rng; 1841 icount->dcd = cnow.dcd; 1842 return 0; 1843 } 1844 1845 static void mxser_stoprx(struct tty_struct *tty) 1846 { 1847 struct mxser_port *info = tty->driver_data; 1848 1849 info->ldisc_stop_rx = 1; 1850 if (I_IXOFF(tty)) { 1851 if (info->board->chip_flag) { 1852 info->IER &= ~MOXA_MUST_RECV_ISR; 1853 outb(info->IER, info->ioaddr + UART_IER); 1854 } else { 1855 info->x_char = STOP_CHAR(tty); 1856 outb(0, info->ioaddr + UART_IER); 1857 info->IER |= UART_IER_THRI; 1858 outb(info->IER, info->ioaddr + UART_IER); 1859 } 1860 } 1861 1862 if (C_CRTSCTS(tty)) { 1863 info->MCR &= ~UART_MCR_RTS; 1864 outb(info->MCR, info->ioaddr + UART_MCR); 1865 } 1866 } 1867 1868 /* 1869 * This routine is called by the upper-layer tty layer to signal that 1870 * incoming characters should be throttled. 1871 */ 1872 static void mxser_throttle(struct tty_struct *tty) 1873 { 1874 mxser_stoprx(tty); 1875 } 1876 1877 static void mxser_unthrottle(struct tty_struct *tty) 1878 { 1879 struct mxser_port *info = tty->driver_data; 1880 1881 /* startrx */ 1882 info->ldisc_stop_rx = 0; 1883 if (I_IXOFF(tty)) { 1884 if (info->x_char) 1885 info->x_char = 0; 1886 else { 1887 if (info->board->chip_flag) { 1888 info->IER |= MOXA_MUST_RECV_ISR; 1889 outb(info->IER, info->ioaddr + UART_IER); 1890 } else { 1891 info->x_char = START_CHAR(tty); 1892 outb(0, info->ioaddr + UART_IER); 1893 info->IER |= UART_IER_THRI; 1894 outb(info->IER, info->ioaddr + UART_IER); 1895 } 1896 } 1897 } 1898 1899 if (C_CRTSCTS(tty)) { 1900 info->MCR |= UART_MCR_RTS; 1901 outb(info->MCR, info->ioaddr + UART_MCR); 1902 } 1903 } 1904 1905 /* 1906 * mxser_stop() and mxser_start() 1907 * 1908 * This routines are called before setting or resetting tty->stopped. 1909 * They enable or disable transmitter interrupts, as necessary. 1910 */ 1911 static void mxser_stop(struct tty_struct *tty) 1912 { 1913 struct mxser_port *info = tty->driver_data; 1914 unsigned long flags; 1915 1916 spin_lock_irqsave(&info->slock, flags); 1917 if (info->IER & UART_IER_THRI) { 1918 info->IER &= ~UART_IER_THRI; 1919 outb(info->IER, info->ioaddr + UART_IER); 1920 } 1921 spin_unlock_irqrestore(&info->slock, flags); 1922 } 1923 1924 static void mxser_start(struct tty_struct *tty) 1925 { 1926 struct mxser_port *info = tty->driver_data; 1927 unsigned long flags; 1928 1929 spin_lock_irqsave(&info->slock, flags); 1930 if (info->xmit_cnt && info->port.xmit_buf) { 1931 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1932 info->IER |= UART_IER_THRI; 1933 outb(info->IER, info->ioaddr + UART_IER); 1934 } 1935 spin_unlock_irqrestore(&info->slock, flags); 1936 } 1937 1938 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1939 { 1940 struct mxser_port *info = tty->driver_data; 1941 unsigned long flags; 1942 1943 spin_lock_irqsave(&info->slock, flags); 1944 mxser_change_speed(tty); 1945 spin_unlock_irqrestore(&info->slock, flags); 1946 1947 if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) { 1948 tty->hw_stopped = 0; 1949 mxser_start(tty); 1950 } 1951 1952 /* Handle sw stopped */ 1953 if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) { 1954 tty->stopped = 0; 1955 1956 if (info->board->chip_flag) { 1957 spin_lock_irqsave(&info->slock, flags); 1958 mxser_disable_must_rx_software_flow_control( 1959 info->ioaddr); 1960 spin_unlock_irqrestore(&info->slock, flags); 1961 } 1962 1963 mxser_start(tty); 1964 } 1965 } 1966 1967 /* 1968 * mxser_wait_until_sent() --- wait until the transmitter is empty 1969 */ 1970 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) 1971 { 1972 struct mxser_port *info = tty->driver_data; 1973 unsigned long orig_jiffies, char_time; 1974 unsigned long flags; 1975 int lsr; 1976 1977 if (info->type == PORT_UNKNOWN) 1978 return; 1979 1980 if (info->xmit_fifo_size == 0) 1981 return; /* Just in case.... */ 1982 1983 orig_jiffies = jiffies; 1984 /* 1985 * Set the check interval to be 1/5 of the estimated time to 1986 * send a single character, and make it at least 1. The check 1987 * interval should also be less than the timeout. 1988 * 1989 * Note: we have to use pretty tight timings here to satisfy 1990 * the NIST-PCTS. 1991 */ 1992 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; 1993 char_time = char_time / 5; 1994 if (char_time == 0) 1995 char_time = 1; 1996 if (timeout && timeout < char_time) 1997 char_time = timeout; 1998 /* 1999 * If the transmitter hasn't cleared in twice the approximate 2000 * amount of time to send the entire FIFO, it probably won't 2001 * ever clear. This assumes the UART isn't doing flow 2002 * control, which is currently the case. Hence, if it ever 2003 * takes longer than info->timeout, this is probably due to a 2004 * UART bug of some kind. So, we clamp the timeout parameter at 2005 * 2*info->timeout. 2006 */ 2007 if (!timeout || timeout > 2 * info->timeout) 2008 timeout = 2 * info->timeout; 2009 2010 spin_lock_irqsave(&info->slock, flags); 2011 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { 2012 spin_unlock_irqrestore(&info->slock, flags); 2013 schedule_timeout_interruptible(char_time); 2014 spin_lock_irqsave(&info->slock, flags); 2015 if (signal_pending(current)) 2016 break; 2017 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2018 break; 2019 } 2020 spin_unlock_irqrestore(&info->slock, flags); 2021 set_current_state(TASK_RUNNING); 2022 } 2023 2024 /* 2025 * This routine is called by tty_hangup() when a hangup is signaled. 2026 */ 2027 static void mxser_hangup(struct tty_struct *tty) 2028 { 2029 struct mxser_port *info = tty->driver_data; 2030 2031 mxser_flush_buffer(tty); 2032 tty_port_hangup(&info->port); 2033 } 2034 2035 /* 2036 * mxser_rs_break() --- routine which turns the break handling on or off 2037 */ 2038 static int mxser_rs_break(struct tty_struct *tty, int break_state) 2039 { 2040 struct mxser_port *info = tty->driver_data; 2041 unsigned long flags; 2042 2043 spin_lock_irqsave(&info->slock, flags); 2044 if (break_state == -1) 2045 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, 2046 info->ioaddr + UART_LCR); 2047 else 2048 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, 2049 info->ioaddr + UART_LCR); 2050 spin_unlock_irqrestore(&info->slock, flags); 2051 return 0; 2052 } 2053 2054 static void mxser_receive_chars(struct tty_struct *tty, 2055 struct mxser_port *port, int *status) 2056 { 2057 unsigned char ch, gdl; 2058 int ignored = 0; 2059 int cnt = 0; 2060 int recv_room; 2061 int max = 256; 2062 2063 recv_room = tty->receive_room; 2064 if (recv_room == 0 && !port->ldisc_stop_rx) 2065 mxser_stoprx(tty); 2066 if (port->board->chip_flag != MOXA_OTHER_UART) { 2067 2068 if (*status & UART_LSR_SPECIAL) 2069 goto intr_old; 2070 if (port->board->chip_flag == MOXA_MUST_MU860_HWID && 2071 (*status & MOXA_MUST_LSR_RERR)) 2072 goto intr_old; 2073 if (*status & MOXA_MUST_LSR_RERR) 2074 goto intr_old; 2075 2076 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); 2077 2078 if (port->board->chip_flag == MOXA_MUST_MU150_HWID) 2079 gdl &= MOXA_MUST_GDL_MASK; 2080 if (gdl >= recv_room) { 2081 if (!port->ldisc_stop_rx) 2082 mxser_stoprx(tty); 2083 } 2084 while (gdl--) { 2085 ch = inb(port->ioaddr + UART_RX); 2086 tty_insert_flip_char(&port->port, ch, 0); 2087 cnt++; 2088 } 2089 goto end_intr; 2090 } 2091 intr_old: 2092 2093 do { 2094 if (max-- < 0) 2095 break; 2096 2097 ch = inb(port->ioaddr + UART_RX); 2098 if (port->board->chip_flag && (*status & UART_LSR_OE)) 2099 outb(0x23, port->ioaddr + UART_FCR); 2100 *status &= port->read_status_mask; 2101 if (*status & port->ignore_status_mask) { 2102 if (++ignored > 100) 2103 break; 2104 } else { 2105 char flag = 0; 2106 if (*status & UART_LSR_SPECIAL) { 2107 if (*status & UART_LSR_BI) { 2108 flag = TTY_BREAK; 2109 port->icount.brk++; 2110 2111 if (port->port.flags & ASYNC_SAK) 2112 do_SAK(tty); 2113 } else if (*status & UART_LSR_PE) { 2114 flag = TTY_PARITY; 2115 port->icount.parity++; 2116 } else if (*status & UART_LSR_FE) { 2117 flag = TTY_FRAME; 2118 port->icount.frame++; 2119 } else if (*status & UART_LSR_OE) { 2120 flag = TTY_OVERRUN; 2121 port->icount.overrun++; 2122 } else 2123 flag = TTY_BREAK; 2124 } 2125 tty_insert_flip_char(&port->port, ch, flag); 2126 cnt++; 2127 if (cnt >= recv_room) { 2128 if (!port->ldisc_stop_rx) 2129 mxser_stoprx(tty); 2130 break; 2131 } 2132 2133 } 2134 2135 if (port->board->chip_flag) 2136 break; 2137 2138 *status = inb(port->ioaddr + UART_LSR); 2139 } while (*status & UART_LSR_DR); 2140 2141 end_intr: 2142 mxvar_log.rxcnt[tty->index] += cnt; 2143 port->mon_data.rxcnt += cnt; 2144 port->mon_data.up_rxcnt += cnt; 2145 2146 /* 2147 * We are called from an interrupt context with &port->slock 2148 * being held. Drop it temporarily in order to prevent 2149 * recursive locking. 2150 */ 2151 spin_unlock(&port->slock); 2152 tty_flip_buffer_push(&port->port); 2153 spin_lock(&port->slock); 2154 } 2155 2156 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) 2157 { 2158 int count, cnt; 2159 2160 if (port->x_char) { 2161 outb(port->x_char, port->ioaddr + UART_TX); 2162 port->x_char = 0; 2163 mxvar_log.txcnt[tty->index]++; 2164 port->mon_data.txcnt++; 2165 port->mon_data.up_txcnt++; 2166 port->icount.tx++; 2167 return; 2168 } 2169 2170 if (port->port.xmit_buf == NULL) 2171 return; 2172 2173 if (port->xmit_cnt <= 0 || tty->stopped || 2174 (tty->hw_stopped && 2175 (port->type != PORT_16550A) && 2176 (!port->board->chip_flag))) { 2177 port->IER &= ~UART_IER_THRI; 2178 outb(port->IER, port->ioaddr + UART_IER); 2179 return; 2180 } 2181 2182 cnt = port->xmit_cnt; 2183 count = port->xmit_fifo_size; 2184 do { 2185 outb(port->port.xmit_buf[port->xmit_tail++], 2186 port->ioaddr + UART_TX); 2187 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); 2188 if (--port->xmit_cnt <= 0) 2189 break; 2190 } while (--count > 0); 2191 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); 2192 2193 port->mon_data.txcnt += (cnt - port->xmit_cnt); 2194 port->mon_data.up_txcnt += (cnt - port->xmit_cnt); 2195 port->icount.tx += (cnt - port->xmit_cnt); 2196 2197 if (port->xmit_cnt < WAKEUP_CHARS) 2198 tty_wakeup(tty); 2199 2200 if (port->xmit_cnt <= 0) { 2201 port->IER &= ~UART_IER_THRI; 2202 outb(port->IER, port->ioaddr + UART_IER); 2203 } 2204 } 2205 2206 /* 2207 * This is the serial driver's generic interrupt routine 2208 */ 2209 static irqreturn_t mxser_interrupt(int irq, void *dev_id) 2210 { 2211 int status, iir, i; 2212 struct mxser_board *brd = NULL; 2213 struct mxser_port *port; 2214 int max, irqbits, bits, msr; 2215 unsigned int int_cnt, pass_counter = 0; 2216 int handled = IRQ_NONE; 2217 struct tty_struct *tty; 2218 2219 for (i = 0; i < MXSER_BOARDS; i++) 2220 if (dev_id == &mxser_boards[i]) { 2221 brd = dev_id; 2222 break; 2223 } 2224 2225 if (i == MXSER_BOARDS) 2226 goto irq_stop; 2227 if (brd == NULL) 2228 goto irq_stop; 2229 max = brd->info->nports; 2230 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { 2231 irqbits = inb(brd->vector) & brd->vector_mask; 2232 if (irqbits == brd->vector_mask) 2233 break; 2234 2235 handled = IRQ_HANDLED; 2236 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { 2237 if (irqbits == brd->vector_mask) 2238 break; 2239 if (bits & irqbits) 2240 continue; 2241 port = &brd->ports[i]; 2242 2243 int_cnt = 0; 2244 spin_lock(&port->slock); 2245 do { 2246 iir = inb(port->ioaddr + UART_IIR); 2247 if (iir & UART_IIR_NO_INT) 2248 break; 2249 iir &= MOXA_MUST_IIR_MASK; 2250 tty = tty_port_tty_get(&port->port); 2251 if (!tty || port->closing || 2252 !tty_port_initialized(&port->port)) { 2253 status = inb(port->ioaddr + UART_LSR); 2254 outb(0x27, port->ioaddr + UART_FCR); 2255 inb(port->ioaddr + UART_MSR); 2256 tty_kref_put(tty); 2257 break; 2258 } 2259 2260 status = inb(port->ioaddr + UART_LSR); 2261 2262 if (status & UART_LSR_PE) 2263 port->err_shadow |= NPPI_NOTIFY_PARITY; 2264 if (status & UART_LSR_FE) 2265 port->err_shadow |= NPPI_NOTIFY_FRAMING; 2266 if (status & UART_LSR_OE) 2267 port->err_shadow |= 2268 NPPI_NOTIFY_HW_OVERRUN; 2269 if (status & UART_LSR_BI) 2270 port->err_shadow |= NPPI_NOTIFY_BREAK; 2271 2272 if (port->board->chip_flag) { 2273 if (iir == MOXA_MUST_IIR_GDA || 2274 iir == MOXA_MUST_IIR_RDA || 2275 iir == MOXA_MUST_IIR_RTO || 2276 iir == MOXA_MUST_IIR_LSR) 2277 mxser_receive_chars(tty, port, 2278 &status); 2279 2280 } else { 2281 status &= port->read_status_mask; 2282 if (status & UART_LSR_DR) 2283 mxser_receive_chars(tty, port, 2284 &status); 2285 } 2286 msr = inb(port->ioaddr + UART_MSR); 2287 if (msr & UART_MSR_ANY_DELTA) 2288 mxser_check_modem_status(tty, port, msr); 2289 2290 if (port->board->chip_flag) { 2291 if (iir == 0x02 && (status & 2292 UART_LSR_THRE)) 2293 mxser_transmit_chars(tty, port); 2294 } else { 2295 if (status & UART_LSR_THRE) 2296 mxser_transmit_chars(tty, port); 2297 } 2298 tty_kref_put(tty); 2299 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); 2300 spin_unlock(&port->slock); 2301 } 2302 } 2303 2304 irq_stop: 2305 return handled; 2306 } 2307 2308 static const struct tty_operations mxser_ops = { 2309 .open = mxser_open, 2310 .close = mxser_close, 2311 .write = mxser_write, 2312 .put_char = mxser_put_char, 2313 .flush_chars = mxser_flush_chars, 2314 .write_room = mxser_write_room, 2315 .chars_in_buffer = mxser_chars_in_buffer, 2316 .flush_buffer = mxser_flush_buffer, 2317 .ioctl = mxser_ioctl, 2318 .throttle = mxser_throttle, 2319 .unthrottle = mxser_unthrottle, 2320 .set_termios = mxser_set_termios, 2321 .stop = mxser_stop, 2322 .start = mxser_start, 2323 .hangup = mxser_hangup, 2324 .break_ctl = mxser_rs_break, 2325 .wait_until_sent = mxser_wait_until_sent, 2326 .tiocmget = mxser_tiocmget, 2327 .tiocmset = mxser_tiocmset, 2328 .set_serial = mxser_set_serial_info, 2329 .get_serial = mxser_get_serial_info, 2330 .get_icount = mxser_get_icount, 2331 }; 2332 2333 static const struct tty_port_operations mxser_port_ops = { 2334 .carrier_raised = mxser_carrier_raised, 2335 .dtr_rts = mxser_dtr_rts, 2336 .activate = mxser_activate, 2337 .shutdown = mxser_shutdown_port, 2338 }; 2339 2340 /* 2341 * The MOXA Smartio/Industio serial driver boot-time initialization code! 2342 */ 2343 2344 static bool allow_overlapping_vector; 2345 module_param(allow_overlapping_vector, bool, S_IRUGO); 2346 MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)"); 2347 2348 static bool mxser_overlapping_vector(struct mxser_board *brd) 2349 { 2350 return allow_overlapping_vector && 2351 brd->vector >= brd->ports[0].ioaddr && 2352 brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports; 2353 } 2354 2355 static int mxser_request_vector(struct mxser_board *brd) 2356 { 2357 if (mxser_overlapping_vector(brd)) 2358 return 0; 2359 return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO; 2360 } 2361 2362 static void mxser_release_vector(struct mxser_board *brd) 2363 { 2364 if (mxser_overlapping_vector(brd)) 2365 return; 2366 release_region(brd->vector, 1); 2367 } 2368 2369 static void mxser_release_ISA_res(struct mxser_board *brd) 2370 { 2371 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2372 mxser_release_vector(brd); 2373 } 2374 2375 static int mxser_initbrd(struct mxser_board *brd) 2376 { 2377 struct mxser_port *info; 2378 unsigned int i; 2379 int retval; 2380 2381 printk(KERN_INFO "mxser: max. baud rate = %d bps\n", 2382 brd->ports[0].max_baud); 2383 2384 for (i = 0; i < brd->info->nports; i++) { 2385 info = &brd->ports[i]; 2386 tty_port_init(&info->port); 2387 info->port.ops = &mxser_port_ops; 2388 info->board = brd; 2389 info->stop_rx = 0; 2390 info->ldisc_stop_rx = 0; 2391 2392 /* Enhance mode enabled here */ 2393 if (brd->chip_flag != MOXA_OTHER_UART) 2394 mxser_enable_must_enchance_mode(info->ioaddr); 2395 2396 info->type = brd->uart_type; 2397 2398 process_txrx_fifo(info); 2399 2400 info->custom_divisor = info->baud_base * 16; 2401 info->port.close_delay = 5 * HZ / 10; 2402 info->port.closing_wait = 30 * HZ; 2403 info->normal_termios = mxvar_sdriver->init_termios; 2404 memset(&info->mon_data, 0, sizeof(struct mxser_mon)); 2405 info->err_shadow = 0; 2406 spin_lock_init(&info->slock); 2407 2408 /* before set INT ISR, disable all int */ 2409 outb(inb(info->ioaddr + UART_IER) & 0xf0, 2410 info->ioaddr + UART_IER); 2411 } 2412 2413 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", 2414 brd); 2415 if (retval) { 2416 for (i = 0; i < brd->info->nports; i++) 2417 tty_port_destroy(&brd->ports[i].port); 2418 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " 2419 "conflict with another device.\n", 2420 brd->info->name, brd->irq); 2421 } 2422 2423 return retval; 2424 } 2425 2426 static void mxser_board_remove(struct mxser_board *brd) 2427 { 2428 unsigned int i; 2429 2430 for (i = 0; i < brd->info->nports; i++) { 2431 tty_unregister_device(mxvar_sdriver, brd->idx + i); 2432 tty_port_destroy(&brd->ports[i].port); 2433 } 2434 free_irq(brd->irq, brd); 2435 } 2436 2437 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) 2438 { 2439 int id, i, bits, ret; 2440 unsigned short regs[16], irq; 2441 unsigned char scratch, scratch2; 2442 2443 brd->chip_flag = MOXA_OTHER_UART; 2444 2445 id = mxser_read_register(cap, regs); 2446 switch (id) { 2447 case C168_ASIC_ID: 2448 brd->info = &mxser_cards[0]; 2449 break; 2450 case C104_ASIC_ID: 2451 brd->info = &mxser_cards[1]; 2452 break; 2453 case CI104J_ASIC_ID: 2454 brd->info = &mxser_cards[2]; 2455 break; 2456 case C102_ASIC_ID: 2457 brd->info = &mxser_cards[5]; 2458 break; 2459 case CI132_ASIC_ID: 2460 brd->info = &mxser_cards[6]; 2461 break; 2462 case CI134_ASIC_ID: 2463 brd->info = &mxser_cards[7]; 2464 break; 2465 default: 2466 return 0; 2467 } 2468 2469 irq = 0; 2470 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) 2471 Flag-hack checks if configuration should be read as 2-port here. */ 2472 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { 2473 irq = regs[9] & 0xF000; 2474 irq = irq | (irq >> 4); 2475 if (irq != (regs[9] & 0xFF00)) 2476 goto err_irqconflict; 2477 } else if (brd->info->nports == 4) { 2478 irq = regs[9] & 0xF000; 2479 irq = irq | (irq >> 4); 2480 irq = irq | (irq >> 8); 2481 if (irq != regs[9]) 2482 goto err_irqconflict; 2483 } else if (brd->info->nports == 8) { 2484 irq = regs[9] & 0xF000; 2485 irq = irq | (irq >> 4); 2486 irq = irq | (irq >> 8); 2487 if ((irq != regs[9]) || (irq != regs[10])) 2488 goto err_irqconflict; 2489 } 2490 2491 if (!irq) { 2492 printk(KERN_ERR "mxser: interrupt number unset\n"); 2493 return -EIO; 2494 } 2495 brd->irq = ((int)(irq & 0xF000) >> 12); 2496 for (i = 0; i < 8; i++) 2497 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; 2498 if ((regs[12] & 0x80) == 0) { 2499 printk(KERN_ERR "mxser: invalid interrupt vector\n"); 2500 return -EIO; 2501 } 2502 brd->vector = (int)regs[11]; /* interrupt vector */ 2503 if (id == 1) 2504 brd->vector_mask = 0x00FF; 2505 else 2506 brd->vector_mask = 0x000F; 2507 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { 2508 if (regs[12] & bits) { 2509 brd->ports[i].baud_base = 921600; 2510 brd->ports[i].max_baud = 921600; 2511 } else { 2512 brd->ports[i].baud_base = 115200; 2513 brd->ports[i].max_baud = 115200; 2514 } 2515 } 2516 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); 2517 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); 2518 outb(0, cap + UART_EFR); /* EFR is the same as FCR */ 2519 outb(scratch2, cap + UART_LCR); 2520 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); 2521 scratch = inb(cap + UART_IIR); 2522 2523 if (scratch & 0xC0) 2524 brd->uart_type = PORT_16550A; 2525 else 2526 brd->uart_type = PORT_16450; 2527 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, 2528 "mxser(IO)")) { 2529 printk(KERN_ERR "mxser: can't request ports I/O region: " 2530 "0x%.8lx-0x%.8lx\n", 2531 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2532 8 * brd->info->nports - 1); 2533 return -EIO; 2534 } 2535 2536 ret = mxser_request_vector(brd); 2537 if (ret) { 2538 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2539 printk(KERN_ERR "mxser: can't request interrupt vector region: " 2540 "0x%.8lx-0x%.8lx\n", 2541 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2542 8 * brd->info->nports - 1); 2543 return ret; 2544 } 2545 return brd->info->nports; 2546 2547 err_irqconflict: 2548 printk(KERN_ERR "mxser: invalid interrupt number\n"); 2549 return -EIO; 2550 } 2551 2552 static int mxser_probe(struct pci_dev *pdev, 2553 const struct pci_device_id *ent) 2554 { 2555 #ifdef CONFIG_PCI 2556 struct mxser_board *brd; 2557 unsigned int i, j; 2558 unsigned long ioaddress; 2559 struct device *tty_dev; 2560 int retval = -EINVAL; 2561 2562 for (i = 0; i < MXSER_BOARDS; i++) 2563 if (mxser_boards[i].info == NULL) 2564 break; 2565 2566 if (i >= MXSER_BOARDS) { 2567 dev_err(&pdev->dev, "too many boards found (maximum %d), board " 2568 "not configured\n", MXSER_BOARDS); 2569 goto err; 2570 } 2571 2572 brd = &mxser_boards[i]; 2573 brd->idx = i * MXSER_PORTS_PER_BOARD; 2574 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", 2575 mxser_cards[ent->driver_data].name, 2576 pdev->bus->number, PCI_SLOT(pdev->devfn)); 2577 2578 retval = pci_enable_device(pdev); 2579 if (retval) { 2580 dev_err(&pdev->dev, "PCI enable failed\n"); 2581 goto err; 2582 } 2583 2584 /* io address */ 2585 ioaddress = pci_resource_start(pdev, 2); 2586 retval = pci_request_region(pdev, 2, "mxser(IO)"); 2587 if (retval) 2588 goto err_dis; 2589 2590 brd->info = &mxser_cards[ent->driver_data]; 2591 for (i = 0; i < brd->info->nports; i++) 2592 brd->ports[i].ioaddr = ioaddress + 8 * i; 2593 2594 /* vector */ 2595 ioaddress = pci_resource_start(pdev, 3); 2596 retval = pci_request_region(pdev, 3, "mxser(vector)"); 2597 if (retval) 2598 goto err_zero; 2599 brd->vector = ioaddress; 2600 2601 /* irq */ 2602 brd->irq = pdev->irq; 2603 2604 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); 2605 brd->uart_type = PORT_16550A; 2606 brd->vector_mask = 0; 2607 2608 for (i = 0; i < brd->info->nports; i++) { 2609 for (j = 0; j < UART_INFO_NUM; j++) { 2610 if (Gpci_uart_info[j].type == brd->chip_flag) { 2611 brd->ports[i].max_baud = 2612 Gpci_uart_info[j].max_baud; 2613 2614 /* exception....CP-102 */ 2615 if (brd->info->flags & MXSER_HIGHBAUD) 2616 brd->ports[i].max_baud = 921600; 2617 break; 2618 } 2619 } 2620 } 2621 2622 if (brd->chip_flag == MOXA_MUST_MU860_HWID) { 2623 for (i = 0; i < brd->info->nports; i++) { 2624 if (i < 4) 2625 brd->ports[i].opmode_ioaddr = ioaddress + 4; 2626 else 2627 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; 2628 } 2629 outb(0, ioaddress + 4); /* default set to RS232 mode */ 2630 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ 2631 } 2632 2633 for (i = 0; i < brd->info->nports; i++) { 2634 brd->vector_mask |= (1 << i); 2635 brd->ports[i].baud_base = 921600; 2636 } 2637 2638 /* mxser_initbrd will hook ISR. */ 2639 retval = mxser_initbrd(brd); 2640 if (retval) 2641 goto err_rel3; 2642 2643 for (i = 0; i < brd->info->nports; i++) { 2644 tty_dev = tty_port_register_device(&brd->ports[i].port, 2645 mxvar_sdriver, brd->idx + i, &pdev->dev); 2646 if (IS_ERR(tty_dev)) { 2647 retval = PTR_ERR(tty_dev); 2648 for (; i > 0; i--) 2649 tty_unregister_device(mxvar_sdriver, 2650 brd->idx + i - 1); 2651 goto err_relbrd; 2652 } 2653 } 2654 2655 pci_set_drvdata(pdev, brd); 2656 2657 return 0; 2658 err_relbrd: 2659 for (i = 0; i < brd->info->nports; i++) 2660 tty_port_destroy(&brd->ports[i].port); 2661 free_irq(brd->irq, brd); 2662 err_rel3: 2663 pci_release_region(pdev, 3); 2664 err_zero: 2665 brd->info = NULL; 2666 pci_release_region(pdev, 2); 2667 err_dis: 2668 pci_disable_device(pdev); 2669 err: 2670 return retval; 2671 #else 2672 return -ENODEV; 2673 #endif 2674 } 2675 2676 static void mxser_remove(struct pci_dev *pdev) 2677 { 2678 #ifdef CONFIG_PCI 2679 struct mxser_board *brd = pci_get_drvdata(pdev); 2680 2681 mxser_board_remove(brd); 2682 2683 pci_release_region(pdev, 2); 2684 pci_release_region(pdev, 3); 2685 pci_disable_device(pdev); 2686 brd->info = NULL; 2687 #endif 2688 } 2689 2690 static struct pci_driver mxser_driver = { 2691 .name = "mxser", 2692 .id_table = mxser_pcibrds, 2693 .probe = mxser_probe, 2694 .remove = mxser_remove 2695 }; 2696 2697 static int __init mxser_module_init(void) 2698 { 2699 struct mxser_board *brd; 2700 struct device *tty_dev; 2701 unsigned int b, i, m; 2702 int retval; 2703 2704 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); 2705 if (!mxvar_sdriver) 2706 return -ENOMEM; 2707 2708 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", 2709 MXSER_VERSION); 2710 2711 /* Initialize the tty_driver structure */ 2712 mxvar_sdriver->name = "ttyMI"; 2713 mxvar_sdriver->major = ttymajor; 2714 mxvar_sdriver->minor_start = 0; 2715 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; 2716 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; 2717 mxvar_sdriver->init_termios = tty_std_termios; 2718 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; 2719 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; 2720 tty_set_operations(mxvar_sdriver, &mxser_ops); 2721 2722 retval = tty_register_driver(mxvar_sdriver); 2723 if (retval) { 2724 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " 2725 "tty driver !\n"); 2726 goto err_put; 2727 } 2728 2729 /* Start finding ISA boards here */ 2730 for (m = 0, b = 0; b < MXSER_BOARDS; b++) { 2731 if (!ioaddr[b]) 2732 continue; 2733 2734 brd = &mxser_boards[m]; 2735 retval = mxser_get_ISA_conf(ioaddr[b], brd); 2736 if (retval <= 0) { 2737 brd->info = NULL; 2738 continue; 2739 } 2740 2741 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", 2742 brd->info->name, ioaddr[b]); 2743 2744 /* mxser_initbrd will hook ISR. */ 2745 if (mxser_initbrd(brd) < 0) { 2746 mxser_release_ISA_res(brd); 2747 brd->info = NULL; 2748 continue; 2749 } 2750 2751 brd->idx = m * MXSER_PORTS_PER_BOARD; 2752 for (i = 0; i < brd->info->nports; i++) { 2753 tty_dev = tty_port_register_device(&brd->ports[i].port, 2754 mxvar_sdriver, brd->idx + i, NULL); 2755 if (IS_ERR(tty_dev)) { 2756 for (; i > 0; i--) 2757 tty_unregister_device(mxvar_sdriver, 2758 brd->idx + i - 1); 2759 for (i = 0; i < brd->info->nports; i++) 2760 tty_port_destroy(&brd->ports[i].port); 2761 free_irq(brd->irq, brd); 2762 mxser_release_ISA_res(brd); 2763 brd->info = NULL; 2764 break; 2765 } 2766 } 2767 if (brd->info == NULL) 2768 continue; 2769 2770 m++; 2771 } 2772 2773 retval = pci_register_driver(&mxser_driver); 2774 if (retval) { 2775 printk(KERN_ERR "mxser: can't register pci driver\n"); 2776 if (!m) { 2777 retval = -ENODEV; 2778 goto err_unr; 2779 } /* else: we have some ISA cards under control */ 2780 } 2781 2782 return 0; 2783 err_unr: 2784 tty_unregister_driver(mxvar_sdriver); 2785 err_put: 2786 put_tty_driver(mxvar_sdriver); 2787 return retval; 2788 } 2789 2790 static void __exit mxser_module_exit(void) 2791 { 2792 unsigned int i; 2793 2794 pci_unregister_driver(&mxser_driver); 2795 2796 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ 2797 if (mxser_boards[i].info != NULL) 2798 mxser_board_remove(&mxser_boards[i]); 2799 tty_unregister_driver(mxvar_sdriver); 2800 put_tty_driver(mxvar_sdriver); 2801 2802 for (i = 0; i < MXSER_BOARDS; i++) 2803 if (mxser_boards[i].info != NULL) 2804 mxser_release_ISA_res(&mxser_boards[i]); 2805 } 2806 2807 module_init(mxser_module_init); 2808 module_exit(mxser_module_exit); 2809