1 /* 2 * Thunderbolt control channel messages 3 * 4 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com> 5 * Copyright (C) 2017, Intel Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #ifndef _TB_MSGS 13 #define _TB_MSGS 14 15 #include <linux/types.h> 16 #include <linux/uuid.h> 17 18 enum tb_cfg_space { 19 TB_CFG_HOPS = 0, 20 TB_CFG_PORT = 1, 21 TB_CFG_SWITCH = 2, 22 TB_CFG_COUNTERS = 3, 23 }; 24 25 enum tb_cfg_error { 26 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0, 27 TB_CFG_ERROR_LINK_ERROR = 1, 28 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2, 29 TB_CFG_ERROR_NO_SUCH_PORT = 4, 30 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */ 31 TB_CFG_ERROR_LOOP = 8, 32 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12, 33 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13, 34 }; 35 36 /* common header */ 37 struct tb_cfg_header { 38 u32 route_hi:22; 39 u32 unknown:10; /* highest order bit is set on replies */ 40 u32 route_lo; 41 } __packed; 42 43 /* additional header for read/write packets */ 44 struct tb_cfg_address { 45 u32 offset:13; /* in dwords */ 46 u32 length:6; /* in dwords */ 47 u32 port:6; 48 enum tb_cfg_space space:2; 49 u32 seq:2; /* sequence number */ 50 u32 zero:3; 51 } __packed; 52 53 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */ 54 struct cfg_read_pkg { 55 struct tb_cfg_header header; 56 struct tb_cfg_address addr; 57 } __packed; 58 59 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */ 60 struct cfg_write_pkg { 61 struct tb_cfg_header header; 62 struct tb_cfg_address addr; 63 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */ 64 } __packed; 65 66 /* TB_CFG_PKG_ERROR */ 67 struct cfg_error_pkg { 68 struct tb_cfg_header header; 69 enum tb_cfg_error error:4; 70 u32 zero1:4; 71 u32 port:6; 72 u32 zero2:2; /* Both should be zero, still they are different fields. */ 73 u32 zero3:16; 74 } __packed; 75 76 /* TB_CFG_PKG_EVENT */ 77 struct cfg_event_pkg { 78 struct tb_cfg_header header; 79 u32 port:6; 80 u32 zero:25; 81 bool unplug:1; 82 } __packed; 83 84 /* TB_CFG_PKG_RESET */ 85 struct cfg_reset_pkg { 86 struct tb_cfg_header header; 87 } __packed; 88 89 /* TB_CFG_PKG_PREPARE_TO_SLEEP */ 90 struct cfg_pts_pkg { 91 struct tb_cfg_header header; 92 u32 data; 93 } __packed; 94 95 /* ICM messages */ 96 97 enum icm_pkg_code { 98 ICM_GET_TOPOLOGY = 0x1, 99 ICM_DRIVER_READY = 0x3, 100 ICM_APPROVE_DEVICE = 0x4, 101 ICM_CHALLENGE_DEVICE = 0x5, 102 ICM_ADD_DEVICE_KEY = 0x6, 103 ICM_GET_ROUTE = 0xa, 104 ICM_APPROVE_XDOMAIN = 0x10, 105 ICM_DISCONNECT_XDOMAIN = 0x11, 106 ICM_PREBOOT_ACL = 0x18, 107 }; 108 109 enum icm_event_code { 110 ICM_EVENT_DEVICE_CONNECTED = 3, 111 ICM_EVENT_DEVICE_DISCONNECTED = 4, 112 ICM_EVENT_XDOMAIN_CONNECTED = 6, 113 ICM_EVENT_XDOMAIN_DISCONNECTED = 7, 114 }; 115 116 struct icm_pkg_header { 117 u8 code; 118 u8 flags; 119 u8 packet_id; 120 u8 total_packets; 121 }; 122 123 #define ICM_FLAGS_ERROR BIT(0) 124 #define ICM_FLAGS_NO_KEY BIT(1) 125 #define ICM_FLAGS_SLEVEL_SHIFT 3 126 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3) 127 #define ICM_FLAGS_WRITE BIT(7) 128 129 struct icm_pkg_driver_ready { 130 struct icm_pkg_header hdr; 131 }; 132 133 /* Falcon Ridge only messages */ 134 135 struct icm_fr_pkg_driver_ready_response { 136 struct icm_pkg_header hdr; 137 u8 romver; 138 u8 ramver; 139 u16 security_level; 140 }; 141 142 #define ICM_FR_SLEVEL_MASK 0xf 143 144 /* Falcon Ridge & Alpine Ridge common messages */ 145 146 struct icm_fr_pkg_get_topology { 147 struct icm_pkg_header hdr; 148 }; 149 150 #define ICM_GET_TOPOLOGY_PACKETS 14 151 152 struct icm_fr_pkg_get_topology_response { 153 struct icm_pkg_header hdr; 154 u32 route_lo; 155 u32 route_hi; 156 u8 first_data; 157 u8 second_data; 158 u8 drom_i2c_address_index; 159 u8 switch_index; 160 u32 reserved[2]; 161 u32 ports[16]; 162 u32 port_hop_info[16]; 163 }; 164 165 #define ICM_SWITCH_USED BIT(0) 166 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1) 167 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1 168 169 #define ICM_PORT_TYPE_MASK GENMASK(23, 0) 170 #define ICM_PORT_INDEX_SHIFT 24 171 #define ICM_PORT_INDEX_MASK GENMASK(31, 24) 172 173 struct icm_fr_event_device_connected { 174 struct icm_pkg_header hdr; 175 uuid_t ep_uuid; 176 u8 connection_key; 177 u8 connection_id; 178 u16 link_info; 179 u32 ep_name[55]; 180 }; 181 182 #define ICM_LINK_INFO_LINK_MASK 0x7 183 #define ICM_LINK_INFO_DEPTH_SHIFT 4 184 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4) 185 #define ICM_LINK_INFO_APPROVED BIT(8) 186 #define ICM_LINK_INFO_REJECTED BIT(9) 187 #define ICM_LINK_INFO_BOOT BIT(10) 188 189 struct icm_fr_pkg_approve_device { 190 struct icm_pkg_header hdr; 191 uuid_t ep_uuid; 192 u8 connection_key; 193 u8 connection_id; 194 u16 reserved; 195 }; 196 197 struct icm_fr_event_device_disconnected { 198 struct icm_pkg_header hdr; 199 u16 reserved; 200 u16 link_info; 201 }; 202 203 struct icm_fr_event_xdomain_connected { 204 struct icm_pkg_header hdr; 205 u16 reserved; 206 u16 link_info; 207 uuid_t remote_uuid; 208 uuid_t local_uuid; 209 u32 local_route_hi; 210 u32 local_route_lo; 211 u32 remote_route_hi; 212 u32 remote_route_lo; 213 }; 214 215 struct icm_fr_event_xdomain_disconnected { 216 struct icm_pkg_header hdr; 217 u16 reserved; 218 u16 link_info; 219 uuid_t remote_uuid; 220 }; 221 222 struct icm_fr_pkg_add_device_key { 223 struct icm_pkg_header hdr; 224 uuid_t ep_uuid; 225 u8 connection_key; 226 u8 connection_id; 227 u16 reserved; 228 u32 key[8]; 229 }; 230 231 struct icm_fr_pkg_add_device_key_response { 232 struct icm_pkg_header hdr; 233 uuid_t ep_uuid; 234 u8 connection_key; 235 u8 connection_id; 236 u16 reserved; 237 }; 238 239 struct icm_fr_pkg_challenge_device { 240 struct icm_pkg_header hdr; 241 uuid_t ep_uuid; 242 u8 connection_key; 243 u8 connection_id; 244 u16 reserved; 245 u32 challenge[8]; 246 }; 247 248 struct icm_fr_pkg_challenge_device_response { 249 struct icm_pkg_header hdr; 250 uuid_t ep_uuid; 251 u8 connection_key; 252 u8 connection_id; 253 u16 reserved; 254 u32 challenge[8]; 255 u32 response[8]; 256 }; 257 258 struct icm_fr_pkg_approve_xdomain { 259 struct icm_pkg_header hdr; 260 u16 reserved; 261 u16 link_info; 262 uuid_t remote_uuid; 263 u16 transmit_path; 264 u16 transmit_ring; 265 u16 receive_path; 266 u16 receive_ring; 267 }; 268 269 struct icm_fr_pkg_approve_xdomain_response { 270 struct icm_pkg_header hdr; 271 u16 reserved; 272 u16 link_info; 273 uuid_t remote_uuid; 274 u16 transmit_path; 275 u16 transmit_ring; 276 u16 receive_path; 277 u16 receive_ring; 278 }; 279 280 /* Alpine Ridge only messages */ 281 282 struct icm_ar_pkg_driver_ready_response { 283 struct icm_pkg_header hdr; 284 u8 romver; 285 u8 ramver; 286 u16 info; 287 }; 288 289 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0) 290 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7 291 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7) 292 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13) 293 294 struct icm_ar_pkg_get_route { 295 struct icm_pkg_header hdr; 296 u16 reserved; 297 u16 link_info; 298 }; 299 300 struct icm_ar_pkg_get_route_response { 301 struct icm_pkg_header hdr; 302 u16 reserved; 303 u16 link_info; 304 u32 route_hi; 305 u32 route_lo; 306 }; 307 308 struct icm_ar_boot_acl_entry { 309 u32 uuid_lo; 310 u32 uuid_hi; 311 }; 312 313 #define ICM_AR_PREBOOT_ACL_ENTRIES 16 314 315 struct icm_ar_pkg_preboot_acl { 316 struct icm_pkg_header hdr; 317 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 318 }; 319 320 struct icm_ar_pkg_preboot_acl_response { 321 struct icm_pkg_header hdr; 322 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 323 }; 324 325 /* Titan Ridge messages */ 326 327 struct icm_tr_pkg_driver_ready_response { 328 struct icm_pkg_header hdr; 329 u16 reserved1; 330 u16 info; 331 u32 nvm_version; 332 u16 device_id; 333 u16 reserved2; 334 }; 335 336 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0) 337 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7 338 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7) 339 340 struct icm_tr_event_device_connected { 341 struct icm_pkg_header hdr; 342 uuid_t ep_uuid; 343 u32 route_hi; 344 u32 route_lo; 345 u8 connection_id; 346 u8 reserved; 347 u16 link_info; 348 u32 ep_name[55]; 349 }; 350 351 struct icm_tr_event_device_disconnected { 352 struct icm_pkg_header hdr; 353 u32 route_hi; 354 u32 route_lo; 355 }; 356 357 struct icm_tr_event_xdomain_connected { 358 struct icm_pkg_header hdr; 359 u16 reserved; 360 u16 link_info; 361 uuid_t remote_uuid; 362 uuid_t local_uuid; 363 u32 local_route_hi; 364 u32 local_route_lo; 365 u32 remote_route_hi; 366 u32 remote_route_lo; 367 }; 368 369 struct icm_tr_event_xdomain_disconnected { 370 struct icm_pkg_header hdr; 371 u32 route_hi; 372 u32 route_lo; 373 uuid_t remote_uuid; 374 }; 375 376 struct icm_tr_pkg_approve_device { 377 struct icm_pkg_header hdr; 378 uuid_t ep_uuid; 379 u32 route_hi; 380 u32 route_lo; 381 u8 connection_id; 382 u8 reserved1[3]; 383 }; 384 385 struct icm_tr_pkg_add_device_key { 386 struct icm_pkg_header hdr; 387 uuid_t ep_uuid; 388 u32 route_hi; 389 u32 route_lo; 390 u8 connection_id; 391 u8 reserved[3]; 392 u32 key[8]; 393 }; 394 395 struct icm_tr_pkg_challenge_device { 396 struct icm_pkg_header hdr; 397 uuid_t ep_uuid; 398 u32 route_hi; 399 u32 route_lo; 400 u8 connection_id; 401 u8 reserved[3]; 402 u32 challenge[8]; 403 }; 404 405 struct icm_tr_pkg_approve_xdomain { 406 struct icm_pkg_header hdr; 407 u32 route_hi; 408 u32 route_lo; 409 uuid_t remote_uuid; 410 u16 transmit_path; 411 u16 transmit_ring; 412 u16 receive_path; 413 u16 receive_ring; 414 }; 415 416 struct icm_tr_pkg_disconnect_xdomain { 417 struct icm_pkg_header hdr; 418 u8 stage; 419 u8 reserved[3]; 420 u32 route_hi; 421 u32 route_lo; 422 uuid_t remote_uuid; 423 }; 424 425 struct icm_tr_pkg_challenge_device_response { 426 struct icm_pkg_header hdr; 427 uuid_t ep_uuid; 428 u32 route_hi; 429 u32 route_lo; 430 u8 connection_id; 431 u8 reserved[3]; 432 u32 challenge[8]; 433 u32 response[8]; 434 }; 435 436 struct icm_tr_pkg_add_device_key_response { 437 struct icm_pkg_header hdr; 438 uuid_t ep_uuid; 439 u32 route_hi; 440 u32 route_lo; 441 u8 connection_id; 442 u8 reserved[3]; 443 }; 444 445 struct icm_tr_pkg_approve_xdomain_response { 446 struct icm_pkg_header hdr; 447 u32 route_hi; 448 u32 route_lo; 449 uuid_t remote_uuid; 450 u16 transmit_path; 451 u16 transmit_ring; 452 u16 receive_path; 453 u16 receive_ring; 454 }; 455 456 struct icm_tr_pkg_disconnect_xdomain_response { 457 struct icm_pkg_header hdr; 458 u8 stage; 459 u8 reserved[3]; 460 u32 route_hi; 461 u32 route_lo; 462 uuid_t remote_uuid; 463 }; 464 465 /* XDomain messages */ 466 467 struct tb_xdomain_header { 468 u32 route_hi; 469 u32 route_lo; 470 u32 length_sn; 471 }; 472 473 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0) 474 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27) 475 #define TB_XDOMAIN_SN_SHIFT 27 476 477 enum tb_xdp_type { 478 UUID_REQUEST_OLD = 1, 479 UUID_RESPONSE = 2, 480 PROPERTIES_REQUEST, 481 PROPERTIES_RESPONSE, 482 PROPERTIES_CHANGED_REQUEST, 483 PROPERTIES_CHANGED_RESPONSE, 484 ERROR_RESPONSE, 485 UUID_REQUEST = 12, 486 }; 487 488 struct tb_xdp_header { 489 struct tb_xdomain_header xd_hdr; 490 uuid_t uuid; 491 u32 type; 492 }; 493 494 struct tb_xdp_properties { 495 struct tb_xdp_header hdr; 496 uuid_t src_uuid; 497 uuid_t dst_uuid; 498 u16 offset; 499 u16 reserved; 500 }; 501 502 struct tb_xdp_properties_response { 503 struct tb_xdp_header hdr; 504 uuid_t src_uuid; 505 uuid_t dst_uuid; 506 u16 offset; 507 u16 data_length; 508 u32 generation; 509 u32 data[0]; 510 }; 511 512 /* 513 * Max length of data array single XDomain property response is allowed 514 * to carry. 515 */ 516 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \ 517 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4) 518 519 /* Maximum size of the total property block in dwords we allow */ 520 #define TB_XDP_PROPERTIES_MAX_LENGTH 500 521 522 struct tb_xdp_properties_changed { 523 struct tb_xdp_header hdr; 524 uuid_t src_uuid; 525 }; 526 527 struct tb_xdp_properties_changed_response { 528 struct tb_xdp_header hdr; 529 }; 530 531 enum tb_xdp_error { 532 ERROR_SUCCESS, 533 ERROR_UNKNOWN_PACKET, 534 ERROR_UNKNOWN_DOMAIN, 535 ERROR_NOT_SUPPORTED, 536 ERROR_NOT_READY, 537 }; 538 539 struct tb_xdp_error_response { 540 struct tb_xdp_header hdr; 541 u32 error; 542 }; 543 544 #endif 545