1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Thunderbolt control channel messages 4 * 5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com> 6 * Copyright (C) 2017, Intel Corporation 7 */ 8 9 #ifndef _TB_MSGS 10 #define _TB_MSGS 11 12 #include <linux/types.h> 13 #include <linux/uuid.h> 14 15 enum tb_cfg_space { 16 TB_CFG_HOPS = 0, 17 TB_CFG_PORT = 1, 18 TB_CFG_SWITCH = 2, 19 TB_CFG_COUNTERS = 3, 20 }; 21 22 enum tb_cfg_error { 23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0, 24 TB_CFG_ERROR_LINK_ERROR = 1, 25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2, 26 TB_CFG_ERROR_NO_SUCH_PORT = 4, 27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */ 28 TB_CFG_ERROR_LOOP = 8, 29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12, 30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13, 31 TB_CFG_ERROR_LOCK = 15, 32 }; 33 34 /* common header */ 35 struct tb_cfg_header { 36 u32 route_hi:22; 37 u32 unknown:10; /* highest order bit is set on replies */ 38 u32 route_lo; 39 } __packed; 40 41 /* additional header for read/write packets */ 42 struct tb_cfg_address { 43 u32 offset:13; /* in dwords */ 44 u32 length:6; /* in dwords */ 45 u32 port:6; 46 enum tb_cfg_space space:2; 47 u32 seq:2; /* sequence number */ 48 u32 zero:3; 49 } __packed; 50 51 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */ 52 struct cfg_read_pkg { 53 struct tb_cfg_header header; 54 struct tb_cfg_address addr; 55 } __packed; 56 57 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */ 58 struct cfg_write_pkg { 59 struct tb_cfg_header header; 60 struct tb_cfg_address addr; 61 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */ 62 } __packed; 63 64 /* TB_CFG_PKG_ERROR */ 65 struct cfg_error_pkg { 66 struct tb_cfg_header header; 67 enum tb_cfg_error error:4; 68 u32 zero1:4; 69 u32 port:6; 70 u32 zero2:2; /* Both should be zero, still they are different fields. */ 71 u32 zero3:14; 72 u32 pg:2; 73 } __packed; 74 75 #define TB_CFG_ERROR_PG_HOT_PLUG 0x2 76 #define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3 77 78 /* TB_CFG_PKG_EVENT */ 79 struct cfg_event_pkg { 80 struct tb_cfg_header header; 81 u32 port:6; 82 u32 zero:25; 83 bool unplug:1; 84 } __packed; 85 86 /* TB_CFG_PKG_RESET */ 87 struct cfg_reset_pkg { 88 struct tb_cfg_header header; 89 } __packed; 90 91 /* TB_CFG_PKG_PREPARE_TO_SLEEP */ 92 struct cfg_pts_pkg { 93 struct tb_cfg_header header; 94 u32 data; 95 } __packed; 96 97 /* ICM messages */ 98 99 enum icm_pkg_code { 100 ICM_GET_TOPOLOGY = 0x1, 101 ICM_DRIVER_READY = 0x3, 102 ICM_APPROVE_DEVICE = 0x4, 103 ICM_CHALLENGE_DEVICE = 0x5, 104 ICM_ADD_DEVICE_KEY = 0x6, 105 ICM_GET_ROUTE = 0xa, 106 ICM_APPROVE_XDOMAIN = 0x10, 107 ICM_DISCONNECT_XDOMAIN = 0x11, 108 ICM_PREBOOT_ACL = 0x18, 109 }; 110 111 enum icm_event_code { 112 ICM_EVENT_DEVICE_CONNECTED = 0x3, 113 ICM_EVENT_DEVICE_DISCONNECTED = 0x4, 114 ICM_EVENT_XDOMAIN_CONNECTED = 0x6, 115 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7, 116 ICM_EVENT_RTD3_VETO = 0xa, 117 }; 118 119 struct icm_pkg_header { 120 u8 code; 121 u8 flags; 122 u8 packet_id; 123 u8 total_packets; 124 }; 125 126 #define ICM_FLAGS_ERROR BIT(0) 127 #define ICM_FLAGS_NO_KEY BIT(1) 128 #define ICM_FLAGS_SLEVEL_SHIFT 3 129 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3) 130 #define ICM_FLAGS_DUAL_LANE BIT(5) 131 #define ICM_FLAGS_SPEED_GEN3 BIT(7) 132 #define ICM_FLAGS_WRITE BIT(7) 133 134 struct icm_pkg_driver_ready { 135 struct icm_pkg_header hdr; 136 }; 137 138 /* Falcon Ridge only messages */ 139 140 struct icm_fr_pkg_driver_ready_response { 141 struct icm_pkg_header hdr; 142 u8 romver; 143 u8 ramver; 144 u16 security_level; 145 }; 146 147 #define ICM_FR_SLEVEL_MASK 0xf 148 149 /* Falcon Ridge & Alpine Ridge common messages */ 150 151 struct icm_fr_pkg_get_topology { 152 struct icm_pkg_header hdr; 153 }; 154 155 #define ICM_GET_TOPOLOGY_PACKETS 14 156 157 struct icm_fr_pkg_get_topology_response { 158 struct icm_pkg_header hdr; 159 u32 route_lo; 160 u32 route_hi; 161 u8 first_data; 162 u8 second_data; 163 u8 drom_i2c_address_index; 164 u8 switch_index; 165 u32 reserved[2]; 166 u32 ports[16]; 167 u32 port_hop_info[16]; 168 }; 169 170 #define ICM_SWITCH_USED BIT(0) 171 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1) 172 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1 173 174 #define ICM_PORT_TYPE_MASK GENMASK(23, 0) 175 #define ICM_PORT_INDEX_SHIFT 24 176 #define ICM_PORT_INDEX_MASK GENMASK(31, 24) 177 178 struct icm_fr_event_device_connected { 179 struct icm_pkg_header hdr; 180 uuid_t ep_uuid; 181 u8 connection_key; 182 u8 connection_id; 183 u16 link_info; 184 u32 ep_name[55]; 185 }; 186 187 #define ICM_LINK_INFO_LINK_MASK 0x7 188 #define ICM_LINK_INFO_DEPTH_SHIFT 4 189 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4) 190 #define ICM_LINK_INFO_APPROVED BIT(8) 191 #define ICM_LINK_INFO_REJECTED BIT(9) 192 #define ICM_LINK_INFO_BOOT BIT(10) 193 194 struct icm_fr_pkg_approve_device { 195 struct icm_pkg_header hdr; 196 uuid_t ep_uuid; 197 u8 connection_key; 198 u8 connection_id; 199 u16 reserved; 200 }; 201 202 struct icm_fr_event_device_disconnected { 203 struct icm_pkg_header hdr; 204 u16 reserved; 205 u16 link_info; 206 }; 207 208 struct icm_fr_event_xdomain_connected { 209 struct icm_pkg_header hdr; 210 u16 reserved; 211 u16 link_info; 212 uuid_t remote_uuid; 213 uuid_t local_uuid; 214 u32 local_route_hi; 215 u32 local_route_lo; 216 u32 remote_route_hi; 217 u32 remote_route_lo; 218 }; 219 220 struct icm_fr_event_xdomain_disconnected { 221 struct icm_pkg_header hdr; 222 u16 reserved; 223 u16 link_info; 224 uuid_t remote_uuid; 225 }; 226 227 struct icm_fr_pkg_add_device_key { 228 struct icm_pkg_header hdr; 229 uuid_t ep_uuid; 230 u8 connection_key; 231 u8 connection_id; 232 u16 reserved; 233 u32 key[8]; 234 }; 235 236 struct icm_fr_pkg_add_device_key_response { 237 struct icm_pkg_header hdr; 238 uuid_t ep_uuid; 239 u8 connection_key; 240 u8 connection_id; 241 u16 reserved; 242 }; 243 244 struct icm_fr_pkg_challenge_device { 245 struct icm_pkg_header hdr; 246 uuid_t ep_uuid; 247 u8 connection_key; 248 u8 connection_id; 249 u16 reserved; 250 u32 challenge[8]; 251 }; 252 253 struct icm_fr_pkg_challenge_device_response { 254 struct icm_pkg_header hdr; 255 uuid_t ep_uuid; 256 u8 connection_key; 257 u8 connection_id; 258 u16 reserved; 259 u32 challenge[8]; 260 u32 response[8]; 261 }; 262 263 struct icm_fr_pkg_approve_xdomain { 264 struct icm_pkg_header hdr; 265 u16 reserved; 266 u16 link_info; 267 uuid_t remote_uuid; 268 u16 transmit_path; 269 u16 transmit_ring; 270 u16 receive_path; 271 u16 receive_ring; 272 }; 273 274 struct icm_fr_pkg_approve_xdomain_response { 275 struct icm_pkg_header hdr; 276 u16 reserved; 277 u16 link_info; 278 uuid_t remote_uuid; 279 u16 transmit_path; 280 u16 transmit_ring; 281 u16 receive_path; 282 u16 receive_ring; 283 }; 284 285 /* Alpine Ridge only messages */ 286 287 struct icm_ar_pkg_driver_ready_response { 288 struct icm_pkg_header hdr; 289 u8 romver; 290 u8 ramver; 291 u16 info; 292 }; 293 294 #define ICM_AR_FLAGS_RTD3 BIT(6) 295 296 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0) 297 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7 298 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7) 299 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13) 300 301 struct icm_ar_pkg_get_route { 302 struct icm_pkg_header hdr; 303 u16 reserved; 304 u16 link_info; 305 }; 306 307 struct icm_ar_pkg_get_route_response { 308 struct icm_pkg_header hdr; 309 u16 reserved; 310 u16 link_info; 311 u32 route_hi; 312 u32 route_lo; 313 }; 314 315 struct icm_ar_boot_acl_entry { 316 u32 uuid_lo; 317 u32 uuid_hi; 318 }; 319 320 #define ICM_AR_PREBOOT_ACL_ENTRIES 16 321 322 struct icm_ar_pkg_preboot_acl { 323 struct icm_pkg_header hdr; 324 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 325 }; 326 327 struct icm_ar_pkg_preboot_acl_response { 328 struct icm_pkg_header hdr; 329 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 330 }; 331 332 /* Titan Ridge messages */ 333 334 struct icm_tr_pkg_driver_ready_response { 335 struct icm_pkg_header hdr; 336 u16 reserved1; 337 u16 info; 338 u32 nvm_version; 339 u16 device_id; 340 u16 reserved2; 341 }; 342 343 #define ICM_TR_FLAGS_RTD3 BIT(6) 344 345 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0) 346 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7 347 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7) 348 349 struct icm_tr_event_device_connected { 350 struct icm_pkg_header hdr; 351 uuid_t ep_uuid; 352 u32 route_hi; 353 u32 route_lo; 354 u8 connection_id; 355 u8 reserved; 356 u16 link_info; 357 u32 ep_name[55]; 358 }; 359 360 struct icm_tr_event_device_disconnected { 361 struct icm_pkg_header hdr; 362 u32 route_hi; 363 u32 route_lo; 364 }; 365 366 struct icm_tr_event_xdomain_connected { 367 struct icm_pkg_header hdr; 368 u16 reserved; 369 u16 link_info; 370 uuid_t remote_uuid; 371 uuid_t local_uuid; 372 u32 local_route_hi; 373 u32 local_route_lo; 374 u32 remote_route_hi; 375 u32 remote_route_lo; 376 }; 377 378 struct icm_tr_event_xdomain_disconnected { 379 struct icm_pkg_header hdr; 380 u32 route_hi; 381 u32 route_lo; 382 uuid_t remote_uuid; 383 }; 384 385 struct icm_tr_pkg_approve_device { 386 struct icm_pkg_header hdr; 387 uuid_t ep_uuid; 388 u32 route_hi; 389 u32 route_lo; 390 u8 connection_id; 391 u8 reserved1[3]; 392 }; 393 394 struct icm_tr_pkg_add_device_key { 395 struct icm_pkg_header hdr; 396 uuid_t ep_uuid; 397 u32 route_hi; 398 u32 route_lo; 399 u8 connection_id; 400 u8 reserved[3]; 401 u32 key[8]; 402 }; 403 404 struct icm_tr_pkg_challenge_device { 405 struct icm_pkg_header hdr; 406 uuid_t ep_uuid; 407 u32 route_hi; 408 u32 route_lo; 409 u8 connection_id; 410 u8 reserved[3]; 411 u32 challenge[8]; 412 }; 413 414 struct icm_tr_pkg_approve_xdomain { 415 struct icm_pkg_header hdr; 416 u32 route_hi; 417 u32 route_lo; 418 uuid_t remote_uuid; 419 u16 transmit_path; 420 u16 transmit_ring; 421 u16 receive_path; 422 u16 receive_ring; 423 }; 424 425 struct icm_tr_pkg_disconnect_xdomain { 426 struct icm_pkg_header hdr; 427 u8 stage; 428 u8 reserved[3]; 429 u32 route_hi; 430 u32 route_lo; 431 uuid_t remote_uuid; 432 }; 433 434 struct icm_tr_pkg_challenge_device_response { 435 struct icm_pkg_header hdr; 436 uuid_t ep_uuid; 437 u32 route_hi; 438 u32 route_lo; 439 u8 connection_id; 440 u8 reserved[3]; 441 u32 challenge[8]; 442 u32 response[8]; 443 }; 444 445 struct icm_tr_pkg_add_device_key_response { 446 struct icm_pkg_header hdr; 447 uuid_t ep_uuid; 448 u32 route_hi; 449 u32 route_lo; 450 u8 connection_id; 451 u8 reserved[3]; 452 }; 453 454 struct icm_tr_pkg_approve_xdomain_response { 455 struct icm_pkg_header hdr; 456 u32 route_hi; 457 u32 route_lo; 458 uuid_t remote_uuid; 459 u16 transmit_path; 460 u16 transmit_ring; 461 u16 receive_path; 462 u16 receive_ring; 463 }; 464 465 struct icm_tr_pkg_disconnect_xdomain_response { 466 struct icm_pkg_header hdr; 467 u8 stage; 468 u8 reserved[3]; 469 u32 route_hi; 470 u32 route_lo; 471 uuid_t remote_uuid; 472 }; 473 474 /* Ice Lake messages */ 475 476 struct icm_icl_event_rtd3_veto { 477 struct icm_pkg_header hdr; 478 u32 veto_reason; 479 }; 480 481 /* XDomain messages */ 482 483 struct tb_xdomain_header { 484 u32 route_hi; 485 u32 route_lo; 486 u32 length_sn; 487 }; 488 489 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0) 490 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27) 491 #define TB_XDOMAIN_SN_SHIFT 27 492 493 enum tb_xdp_type { 494 UUID_REQUEST_OLD = 1, 495 UUID_RESPONSE = 2, 496 PROPERTIES_REQUEST, 497 PROPERTIES_RESPONSE, 498 PROPERTIES_CHANGED_REQUEST, 499 PROPERTIES_CHANGED_RESPONSE, 500 ERROR_RESPONSE, 501 UUID_REQUEST = 12, 502 }; 503 504 struct tb_xdp_header { 505 struct tb_xdomain_header xd_hdr; 506 uuid_t uuid; 507 u32 type; 508 }; 509 510 struct tb_xdp_uuid { 511 struct tb_xdp_header hdr; 512 }; 513 514 struct tb_xdp_uuid_response { 515 struct tb_xdp_header hdr; 516 uuid_t src_uuid; 517 u32 src_route_hi; 518 u32 src_route_lo; 519 }; 520 521 struct tb_xdp_properties { 522 struct tb_xdp_header hdr; 523 uuid_t src_uuid; 524 uuid_t dst_uuid; 525 u16 offset; 526 u16 reserved; 527 }; 528 529 struct tb_xdp_properties_response { 530 struct tb_xdp_header hdr; 531 uuid_t src_uuid; 532 uuid_t dst_uuid; 533 u16 offset; 534 u16 data_length; 535 u32 generation; 536 u32 data[0]; 537 }; 538 539 /* 540 * Max length of data array single XDomain property response is allowed 541 * to carry. 542 */ 543 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \ 544 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4) 545 546 /* Maximum size of the total property block in dwords we allow */ 547 #define TB_XDP_PROPERTIES_MAX_LENGTH 500 548 549 struct tb_xdp_properties_changed { 550 struct tb_xdp_header hdr; 551 uuid_t src_uuid; 552 }; 553 554 struct tb_xdp_properties_changed_response { 555 struct tb_xdp_header hdr; 556 }; 557 558 enum tb_xdp_error { 559 ERROR_SUCCESS, 560 ERROR_UNKNOWN_PACKET, 561 ERROR_UNKNOWN_DOMAIN, 562 ERROR_NOT_SUPPORTED, 563 ERROR_NOT_READY, 564 }; 565 566 struct tb_xdp_error_response { 567 struct tb_xdp_header hdr; 568 u32 error; 569 }; 570 571 #endif 572