xref: /openbmc/linux/drivers/thunderbolt/tb_msgs.h (revision aeb64ff3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Thunderbolt control channel messages
4  *
5  * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
6  * Copyright (C) 2017, Intel Corporation
7  */
8 
9 #ifndef _TB_MSGS
10 #define _TB_MSGS
11 
12 #include <linux/types.h>
13 #include <linux/uuid.h>
14 
15 enum tb_cfg_space {
16 	TB_CFG_HOPS = 0,
17 	TB_CFG_PORT = 1,
18 	TB_CFG_SWITCH = 2,
19 	TB_CFG_COUNTERS = 3,
20 };
21 
22 enum tb_cfg_error {
23 	TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 	TB_CFG_ERROR_LINK_ERROR = 1,
25 	TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 	TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 	TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 	TB_CFG_ERROR_LOOP = 8,
29 	TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 	TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
31 };
32 
33 /* common header */
34 struct tb_cfg_header {
35 	u32 route_hi:22;
36 	u32 unknown:10; /* highest order bit is set on replies */
37 	u32 route_lo;
38 } __packed;
39 
40 /* additional header for read/write packets */
41 struct tb_cfg_address {
42 	u32 offset:13; /* in dwords */
43 	u32 length:6; /* in dwords */
44 	u32 port:6;
45 	enum tb_cfg_space space:2;
46 	u32 seq:2; /* sequence number  */
47 	u32 zero:3;
48 } __packed;
49 
50 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
51 struct cfg_read_pkg {
52 	struct tb_cfg_header header;
53 	struct tb_cfg_address addr;
54 } __packed;
55 
56 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
57 struct cfg_write_pkg {
58 	struct tb_cfg_header header;
59 	struct tb_cfg_address addr;
60 	u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
61 } __packed;
62 
63 /* TB_CFG_PKG_ERROR */
64 struct cfg_error_pkg {
65 	struct tb_cfg_header header;
66 	enum tb_cfg_error error:4;
67 	u32 zero1:4;
68 	u32 port:6;
69 	u32 zero2:2; /* Both should be zero, still they are different fields. */
70 	u32 zero3:16;
71 } __packed;
72 
73 /* TB_CFG_PKG_EVENT */
74 struct cfg_event_pkg {
75 	struct tb_cfg_header header;
76 	u32 port:6;
77 	u32 zero:25;
78 	bool unplug:1;
79 } __packed;
80 
81 /* TB_CFG_PKG_RESET */
82 struct cfg_reset_pkg {
83 	struct tb_cfg_header header;
84 } __packed;
85 
86 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
87 struct cfg_pts_pkg {
88 	struct tb_cfg_header header;
89 	u32 data;
90 } __packed;
91 
92 /* ICM messages */
93 
94 enum icm_pkg_code {
95 	ICM_GET_TOPOLOGY = 0x1,
96 	ICM_DRIVER_READY = 0x3,
97 	ICM_APPROVE_DEVICE = 0x4,
98 	ICM_CHALLENGE_DEVICE = 0x5,
99 	ICM_ADD_DEVICE_KEY = 0x6,
100 	ICM_GET_ROUTE = 0xa,
101 	ICM_APPROVE_XDOMAIN = 0x10,
102 	ICM_DISCONNECT_XDOMAIN = 0x11,
103 	ICM_PREBOOT_ACL = 0x18,
104 };
105 
106 enum icm_event_code {
107 	ICM_EVENT_DEVICE_CONNECTED = 0x3,
108 	ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
109 	ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
110 	ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
111 	ICM_EVENT_RTD3_VETO = 0xa,
112 };
113 
114 struct icm_pkg_header {
115 	u8 code;
116 	u8 flags;
117 	u8 packet_id;
118 	u8 total_packets;
119 };
120 
121 #define ICM_FLAGS_ERROR			BIT(0)
122 #define ICM_FLAGS_NO_KEY		BIT(1)
123 #define ICM_FLAGS_SLEVEL_SHIFT		3
124 #define ICM_FLAGS_SLEVEL_MASK		GENMASK(4, 3)
125 #define ICM_FLAGS_DUAL_LANE		BIT(5)
126 #define ICM_FLAGS_SPEED_GEN3		BIT(7)
127 #define ICM_FLAGS_WRITE			BIT(7)
128 
129 struct icm_pkg_driver_ready {
130 	struct icm_pkg_header hdr;
131 };
132 
133 /* Falcon Ridge only messages */
134 
135 struct icm_fr_pkg_driver_ready_response {
136 	struct icm_pkg_header hdr;
137 	u8 romver;
138 	u8 ramver;
139 	u16 security_level;
140 };
141 
142 #define ICM_FR_SLEVEL_MASK		0xf
143 
144 /* Falcon Ridge & Alpine Ridge common messages */
145 
146 struct icm_fr_pkg_get_topology {
147 	struct icm_pkg_header hdr;
148 };
149 
150 #define ICM_GET_TOPOLOGY_PACKETS	14
151 
152 struct icm_fr_pkg_get_topology_response {
153 	struct icm_pkg_header hdr;
154 	u32 route_lo;
155 	u32 route_hi;
156 	u8 first_data;
157 	u8 second_data;
158 	u8 drom_i2c_address_index;
159 	u8 switch_index;
160 	u32 reserved[2];
161 	u32 ports[16];
162 	u32 port_hop_info[16];
163 };
164 
165 #define ICM_SWITCH_USED			BIT(0)
166 #define ICM_SWITCH_UPSTREAM_PORT_MASK	GENMASK(7, 1)
167 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT	1
168 
169 #define ICM_PORT_TYPE_MASK		GENMASK(23, 0)
170 #define ICM_PORT_INDEX_SHIFT		24
171 #define ICM_PORT_INDEX_MASK		GENMASK(31, 24)
172 
173 struct icm_fr_event_device_connected {
174 	struct icm_pkg_header hdr;
175 	uuid_t ep_uuid;
176 	u8 connection_key;
177 	u8 connection_id;
178 	u16 link_info;
179 	u32 ep_name[55];
180 };
181 
182 #define ICM_LINK_INFO_LINK_MASK		0x7
183 #define ICM_LINK_INFO_DEPTH_SHIFT	4
184 #define ICM_LINK_INFO_DEPTH_MASK	GENMASK(7, 4)
185 #define ICM_LINK_INFO_APPROVED		BIT(8)
186 #define ICM_LINK_INFO_REJECTED		BIT(9)
187 #define ICM_LINK_INFO_BOOT		BIT(10)
188 
189 struct icm_fr_pkg_approve_device {
190 	struct icm_pkg_header hdr;
191 	uuid_t ep_uuid;
192 	u8 connection_key;
193 	u8 connection_id;
194 	u16 reserved;
195 };
196 
197 struct icm_fr_event_device_disconnected {
198 	struct icm_pkg_header hdr;
199 	u16 reserved;
200 	u16 link_info;
201 };
202 
203 struct icm_fr_event_xdomain_connected {
204 	struct icm_pkg_header hdr;
205 	u16 reserved;
206 	u16 link_info;
207 	uuid_t remote_uuid;
208 	uuid_t local_uuid;
209 	u32 local_route_hi;
210 	u32 local_route_lo;
211 	u32 remote_route_hi;
212 	u32 remote_route_lo;
213 };
214 
215 struct icm_fr_event_xdomain_disconnected {
216 	struct icm_pkg_header hdr;
217 	u16 reserved;
218 	u16 link_info;
219 	uuid_t remote_uuid;
220 };
221 
222 struct icm_fr_pkg_add_device_key {
223 	struct icm_pkg_header hdr;
224 	uuid_t ep_uuid;
225 	u8 connection_key;
226 	u8 connection_id;
227 	u16 reserved;
228 	u32 key[8];
229 };
230 
231 struct icm_fr_pkg_add_device_key_response {
232 	struct icm_pkg_header hdr;
233 	uuid_t ep_uuid;
234 	u8 connection_key;
235 	u8 connection_id;
236 	u16 reserved;
237 };
238 
239 struct icm_fr_pkg_challenge_device {
240 	struct icm_pkg_header hdr;
241 	uuid_t ep_uuid;
242 	u8 connection_key;
243 	u8 connection_id;
244 	u16 reserved;
245 	u32 challenge[8];
246 };
247 
248 struct icm_fr_pkg_challenge_device_response {
249 	struct icm_pkg_header hdr;
250 	uuid_t ep_uuid;
251 	u8 connection_key;
252 	u8 connection_id;
253 	u16 reserved;
254 	u32 challenge[8];
255 	u32 response[8];
256 };
257 
258 struct icm_fr_pkg_approve_xdomain {
259 	struct icm_pkg_header hdr;
260 	u16 reserved;
261 	u16 link_info;
262 	uuid_t remote_uuid;
263 	u16 transmit_path;
264 	u16 transmit_ring;
265 	u16 receive_path;
266 	u16 receive_ring;
267 };
268 
269 struct icm_fr_pkg_approve_xdomain_response {
270 	struct icm_pkg_header hdr;
271 	u16 reserved;
272 	u16 link_info;
273 	uuid_t remote_uuid;
274 	u16 transmit_path;
275 	u16 transmit_ring;
276 	u16 receive_path;
277 	u16 receive_ring;
278 };
279 
280 /* Alpine Ridge only messages */
281 
282 struct icm_ar_pkg_driver_ready_response {
283 	struct icm_pkg_header hdr;
284 	u8 romver;
285 	u8 ramver;
286 	u16 info;
287 };
288 
289 #define ICM_AR_FLAGS_RTD3		BIT(6)
290 
291 #define ICM_AR_INFO_SLEVEL_MASK		GENMASK(3, 0)
292 #define ICM_AR_INFO_BOOT_ACL_SHIFT	7
293 #define ICM_AR_INFO_BOOT_ACL_MASK	GENMASK(11, 7)
294 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED	BIT(13)
295 
296 struct icm_ar_pkg_get_route {
297 	struct icm_pkg_header hdr;
298 	u16 reserved;
299 	u16 link_info;
300 };
301 
302 struct icm_ar_pkg_get_route_response {
303 	struct icm_pkg_header hdr;
304 	u16 reserved;
305 	u16 link_info;
306 	u32 route_hi;
307 	u32 route_lo;
308 };
309 
310 struct icm_ar_boot_acl_entry {
311 	u32 uuid_lo;
312 	u32 uuid_hi;
313 };
314 
315 #define ICM_AR_PREBOOT_ACL_ENTRIES	16
316 
317 struct icm_ar_pkg_preboot_acl {
318 	struct icm_pkg_header hdr;
319 	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
320 };
321 
322 struct icm_ar_pkg_preboot_acl_response {
323 	struct icm_pkg_header hdr;
324 	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
325 };
326 
327 /* Titan Ridge messages */
328 
329 struct icm_tr_pkg_driver_ready_response {
330 	struct icm_pkg_header hdr;
331 	u16 reserved1;
332 	u16 info;
333 	u32 nvm_version;
334 	u16 device_id;
335 	u16 reserved2;
336 };
337 
338 #define ICM_TR_FLAGS_RTD3		BIT(6)
339 
340 #define ICM_TR_INFO_SLEVEL_MASK		GENMASK(2, 0)
341 #define ICM_TR_INFO_BOOT_ACL_SHIFT	7
342 #define ICM_TR_INFO_BOOT_ACL_MASK	GENMASK(12, 7)
343 
344 struct icm_tr_event_device_connected {
345 	struct icm_pkg_header hdr;
346 	uuid_t ep_uuid;
347 	u32 route_hi;
348 	u32 route_lo;
349 	u8 connection_id;
350 	u8 reserved;
351 	u16 link_info;
352 	u32 ep_name[55];
353 };
354 
355 struct icm_tr_event_device_disconnected {
356 	struct icm_pkg_header hdr;
357 	u32 route_hi;
358 	u32 route_lo;
359 };
360 
361 struct icm_tr_event_xdomain_connected {
362 	struct icm_pkg_header hdr;
363 	u16 reserved;
364 	u16 link_info;
365 	uuid_t remote_uuid;
366 	uuid_t local_uuid;
367 	u32 local_route_hi;
368 	u32 local_route_lo;
369 	u32 remote_route_hi;
370 	u32 remote_route_lo;
371 };
372 
373 struct icm_tr_event_xdomain_disconnected {
374 	struct icm_pkg_header hdr;
375 	u32 route_hi;
376 	u32 route_lo;
377 	uuid_t remote_uuid;
378 };
379 
380 struct icm_tr_pkg_approve_device {
381 	struct icm_pkg_header hdr;
382 	uuid_t ep_uuid;
383 	u32 route_hi;
384 	u32 route_lo;
385 	u8 connection_id;
386 	u8 reserved1[3];
387 };
388 
389 struct icm_tr_pkg_add_device_key {
390 	struct icm_pkg_header hdr;
391 	uuid_t ep_uuid;
392 	u32 route_hi;
393 	u32 route_lo;
394 	u8 connection_id;
395 	u8 reserved[3];
396 	u32 key[8];
397 };
398 
399 struct icm_tr_pkg_challenge_device {
400 	struct icm_pkg_header hdr;
401 	uuid_t ep_uuid;
402 	u32 route_hi;
403 	u32 route_lo;
404 	u8 connection_id;
405 	u8 reserved[3];
406 	u32 challenge[8];
407 };
408 
409 struct icm_tr_pkg_approve_xdomain {
410 	struct icm_pkg_header hdr;
411 	u32 route_hi;
412 	u32 route_lo;
413 	uuid_t remote_uuid;
414 	u16 transmit_path;
415 	u16 transmit_ring;
416 	u16 receive_path;
417 	u16 receive_ring;
418 };
419 
420 struct icm_tr_pkg_disconnect_xdomain {
421 	struct icm_pkg_header hdr;
422 	u8 stage;
423 	u8 reserved[3];
424 	u32 route_hi;
425 	u32 route_lo;
426 	uuid_t remote_uuid;
427 };
428 
429 struct icm_tr_pkg_challenge_device_response {
430 	struct icm_pkg_header hdr;
431 	uuid_t ep_uuid;
432 	u32 route_hi;
433 	u32 route_lo;
434 	u8 connection_id;
435 	u8 reserved[3];
436 	u32 challenge[8];
437 	u32 response[8];
438 };
439 
440 struct icm_tr_pkg_add_device_key_response {
441 	struct icm_pkg_header hdr;
442 	uuid_t ep_uuid;
443 	u32 route_hi;
444 	u32 route_lo;
445 	u8 connection_id;
446 	u8 reserved[3];
447 };
448 
449 struct icm_tr_pkg_approve_xdomain_response {
450 	struct icm_pkg_header hdr;
451 	u32 route_hi;
452 	u32 route_lo;
453 	uuid_t remote_uuid;
454 	u16 transmit_path;
455 	u16 transmit_ring;
456 	u16 receive_path;
457 	u16 receive_ring;
458 };
459 
460 struct icm_tr_pkg_disconnect_xdomain_response {
461 	struct icm_pkg_header hdr;
462 	u8 stage;
463 	u8 reserved[3];
464 	u32 route_hi;
465 	u32 route_lo;
466 	uuid_t remote_uuid;
467 };
468 
469 /* Ice Lake messages */
470 
471 struct icm_icl_event_rtd3_veto {
472 	struct icm_pkg_header hdr;
473 	u32 veto_reason;
474 };
475 
476 /* XDomain messages */
477 
478 struct tb_xdomain_header {
479 	u32 route_hi;
480 	u32 route_lo;
481 	u32 length_sn;
482 };
483 
484 #define TB_XDOMAIN_LENGTH_MASK	GENMASK(5, 0)
485 #define TB_XDOMAIN_SN_MASK	GENMASK(28, 27)
486 #define TB_XDOMAIN_SN_SHIFT	27
487 
488 enum tb_xdp_type {
489 	UUID_REQUEST_OLD = 1,
490 	UUID_RESPONSE = 2,
491 	PROPERTIES_REQUEST,
492 	PROPERTIES_RESPONSE,
493 	PROPERTIES_CHANGED_REQUEST,
494 	PROPERTIES_CHANGED_RESPONSE,
495 	ERROR_RESPONSE,
496 	UUID_REQUEST = 12,
497 };
498 
499 struct tb_xdp_header {
500 	struct tb_xdomain_header xd_hdr;
501 	uuid_t uuid;
502 	u32 type;
503 };
504 
505 struct tb_xdp_uuid {
506 	struct tb_xdp_header hdr;
507 };
508 
509 struct tb_xdp_uuid_response {
510 	struct tb_xdp_header hdr;
511 	uuid_t src_uuid;
512 	u32 src_route_hi;
513 	u32 src_route_lo;
514 };
515 
516 struct tb_xdp_properties {
517 	struct tb_xdp_header hdr;
518 	uuid_t src_uuid;
519 	uuid_t dst_uuid;
520 	u16 offset;
521 	u16 reserved;
522 };
523 
524 struct tb_xdp_properties_response {
525 	struct tb_xdp_header hdr;
526 	uuid_t src_uuid;
527 	uuid_t dst_uuid;
528 	u16 offset;
529 	u16 data_length;
530 	u32 generation;
531 	u32 data[0];
532 };
533 
534 /*
535  * Max length of data array single XDomain property response is allowed
536  * to carry.
537  */
538 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH	\
539 	(((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
540 
541 /* Maximum size of the total property block in dwords we allow */
542 #define TB_XDP_PROPERTIES_MAX_LENGTH		500
543 
544 struct tb_xdp_properties_changed {
545 	struct tb_xdp_header hdr;
546 	uuid_t src_uuid;
547 };
548 
549 struct tb_xdp_properties_changed_response {
550 	struct tb_xdp_header hdr;
551 };
552 
553 enum tb_xdp_error {
554 	ERROR_SUCCESS,
555 	ERROR_UNKNOWN_PACKET,
556 	ERROR_UNKNOWN_DOMAIN,
557 	ERROR_NOT_SUPPORTED,
558 	ERROR_NOT_READY,
559 };
560 
561 struct tb_xdp_error_response {
562 	struct tb_xdp_header hdr;
563 	u32 error;
564 };
565 
566 #endif
567