1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Thunderbolt driver - bus logic (NHI independent) 4 * 5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> 6 * Copyright (C) 2019, Intel Corporation 7 */ 8 9 #include <linux/slab.h> 10 #include <linux/errno.h> 11 #include <linux/delay.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/platform_data/x86/apple.h> 14 15 #include "tb.h" 16 #include "tb_regs.h" 17 #include "tunnel.h" 18 19 #define TB_TIMEOUT 100 /* ms */ 20 21 /* 22 * Minimum bandwidth (in Mb/s) that is needed in the single transmitter/receiver 23 * direction. This is 40G - 10% guard band bandwidth. 24 */ 25 #define TB_ASYM_MIN (40000 * 90 / 100) 26 27 /* 28 * Threshold bandwidth (in Mb/s) that is used to switch the links to 29 * asymmetric and back. This is selected as 45G which means when the 30 * request is higher than this, we switch the link to asymmetric, and 31 * when it is less than this we switch it back. The 45G is selected so 32 * that we still have 27G (of the total 72G) for bulk PCIe traffic when 33 * switching back to symmetric. 34 */ 35 #define TB_ASYM_THRESHOLD 45000 36 37 #define MAX_GROUPS 7 /* max Group_ID is 7 */ 38 39 static unsigned int asym_threshold = TB_ASYM_THRESHOLD; 40 module_param_named(asym_threshold, asym_threshold, uint, 0444); 41 MODULE_PARM_DESC(asym_threshold, 42 "threshold (Mb/s) when to Gen 4 switch link symmetry. 0 disables. (default: " 43 __MODULE_STRING(TB_ASYM_THRESHOLD) ")"); 44 45 /** 46 * struct tb_cm - Simple Thunderbolt connection manager 47 * @tunnel_list: List of active tunnels 48 * @dp_resources: List of available DP resources for DP tunneling 49 * @hotplug_active: tb_handle_hotplug will stop progressing plug 50 * events and exit if this is not set (it needs to 51 * acquire the lock one more time). Used to drain wq 52 * after cfg has been paused. 53 * @remove_work: Work used to remove any unplugged routers after 54 * runtime resume 55 * @groups: Bandwidth groups used in this domain. 56 */ 57 struct tb_cm { 58 struct list_head tunnel_list; 59 struct list_head dp_resources; 60 bool hotplug_active; 61 struct delayed_work remove_work; 62 struct tb_bandwidth_group groups[MAX_GROUPS]; 63 }; 64 65 static inline struct tb *tcm_to_tb(struct tb_cm *tcm) 66 { 67 return ((void *)tcm - sizeof(struct tb)); 68 } 69 70 struct tb_hotplug_event { 71 struct work_struct work; 72 struct tb *tb; 73 u64 route; 74 u8 port; 75 bool unplug; 76 }; 77 78 static void tb_init_bandwidth_groups(struct tb_cm *tcm) 79 { 80 int i; 81 82 for (i = 0; i < ARRAY_SIZE(tcm->groups); i++) { 83 struct tb_bandwidth_group *group = &tcm->groups[i]; 84 85 group->tb = tcm_to_tb(tcm); 86 group->index = i + 1; 87 INIT_LIST_HEAD(&group->ports); 88 } 89 } 90 91 static void tb_bandwidth_group_attach_port(struct tb_bandwidth_group *group, 92 struct tb_port *in) 93 { 94 if (!group || WARN_ON(in->group)) 95 return; 96 97 in->group = group; 98 list_add_tail(&in->group_list, &group->ports); 99 100 tb_port_dbg(in, "attached to bandwidth group %d\n", group->index); 101 } 102 103 static struct tb_bandwidth_group *tb_find_free_bandwidth_group(struct tb_cm *tcm) 104 { 105 int i; 106 107 for (i = 0; i < ARRAY_SIZE(tcm->groups); i++) { 108 struct tb_bandwidth_group *group = &tcm->groups[i]; 109 110 if (list_empty(&group->ports)) 111 return group; 112 } 113 114 return NULL; 115 } 116 117 static struct tb_bandwidth_group * 118 tb_attach_bandwidth_group(struct tb_cm *tcm, struct tb_port *in, 119 struct tb_port *out) 120 { 121 struct tb_bandwidth_group *group; 122 struct tb_tunnel *tunnel; 123 124 /* 125 * Find all DP tunnels that go through all the same USB4 links 126 * as this one. Because we always setup tunnels the same way we 127 * can just check for the routers at both ends of the tunnels 128 * and if they are the same we have a match. 129 */ 130 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 131 if (!tb_tunnel_is_dp(tunnel)) 132 continue; 133 134 if (tunnel->src_port->sw == in->sw && 135 tunnel->dst_port->sw == out->sw) { 136 group = tunnel->src_port->group; 137 if (group) { 138 tb_bandwidth_group_attach_port(group, in); 139 return group; 140 } 141 } 142 } 143 144 /* Pick up next available group then */ 145 group = tb_find_free_bandwidth_group(tcm); 146 if (group) 147 tb_bandwidth_group_attach_port(group, in); 148 else 149 tb_port_warn(in, "no available bandwidth groups\n"); 150 151 return group; 152 } 153 154 static void tb_discover_bandwidth_group(struct tb_cm *tcm, struct tb_port *in, 155 struct tb_port *out) 156 { 157 if (usb4_dp_port_bandwidth_mode_enabled(in)) { 158 int index, i; 159 160 index = usb4_dp_port_group_id(in); 161 for (i = 0; i < ARRAY_SIZE(tcm->groups); i++) { 162 if (tcm->groups[i].index == index) { 163 tb_bandwidth_group_attach_port(&tcm->groups[i], in); 164 return; 165 } 166 } 167 } 168 169 tb_attach_bandwidth_group(tcm, in, out); 170 } 171 172 static void tb_detach_bandwidth_group(struct tb_port *in) 173 { 174 struct tb_bandwidth_group *group = in->group; 175 176 if (group) { 177 in->group = NULL; 178 list_del_init(&in->group_list); 179 180 tb_port_dbg(in, "detached from bandwidth group %d\n", group->index); 181 } 182 } 183 184 static void tb_handle_hotplug(struct work_struct *work); 185 186 static void tb_queue_hotplug(struct tb *tb, u64 route, u8 port, bool unplug) 187 { 188 struct tb_hotplug_event *ev; 189 190 ev = kmalloc(sizeof(*ev), GFP_KERNEL); 191 if (!ev) 192 return; 193 194 ev->tb = tb; 195 ev->route = route; 196 ev->port = port; 197 ev->unplug = unplug; 198 INIT_WORK(&ev->work, tb_handle_hotplug); 199 queue_work(tb->wq, &ev->work); 200 } 201 202 /* enumeration & hot plug handling */ 203 204 static void tb_add_dp_resources(struct tb_switch *sw) 205 { 206 struct tb_cm *tcm = tb_priv(sw->tb); 207 struct tb_port *port; 208 209 tb_switch_for_each_port(sw, port) { 210 if (!tb_port_is_dpin(port)) 211 continue; 212 213 if (!tb_switch_query_dp_resource(sw, port)) 214 continue; 215 216 list_add_tail(&port->list, &tcm->dp_resources); 217 tb_port_dbg(port, "DP IN resource available\n"); 218 } 219 } 220 221 static void tb_remove_dp_resources(struct tb_switch *sw) 222 { 223 struct tb_cm *tcm = tb_priv(sw->tb); 224 struct tb_port *port, *tmp; 225 226 /* Clear children resources first */ 227 tb_switch_for_each_port(sw, port) { 228 if (tb_port_has_remote(port)) 229 tb_remove_dp_resources(port->remote->sw); 230 } 231 232 list_for_each_entry_safe(port, tmp, &tcm->dp_resources, list) { 233 if (port->sw == sw) { 234 tb_port_dbg(port, "DP OUT resource unavailable\n"); 235 list_del_init(&port->list); 236 } 237 } 238 } 239 240 static void tb_discover_dp_resource(struct tb *tb, struct tb_port *port) 241 { 242 struct tb_cm *tcm = tb_priv(tb); 243 struct tb_port *p; 244 245 list_for_each_entry(p, &tcm->dp_resources, list) { 246 if (p == port) 247 return; 248 } 249 250 tb_port_dbg(port, "DP %s resource available discovered\n", 251 tb_port_is_dpin(port) ? "IN" : "OUT"); 252 list_add_tail(&port->list, &tcm->dp_resources); 253 } 254 255 static void tb_discover_dp_resources(struct tb *tb) 256 { 257 struct tb_cm *tcm = tb_priv(tb); 258 struct tb_tunnel *tunnel; 259 260 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 261 if (tb_tunnel_is_dp(tunnel)) 262 tb_discover_dp_resource(tb, tunnel->dst_port); 263 } 264 } 265 266 /* Enables CL states up to host router */ 267 static int tb_enable_clx(struct tb_switch *sw) 268 { 269 struct tb_cm *tcm = tb_priv(sw->tb); 270 unsigned int clx = TB_CL0S | TB_CL1; 271 const struct tb_tunnel *tunnel; 272 int ret; 273 274 /* 275 * Currently only enable CLx for the first link. This is enough 276 * to allow the CPU to save energy at least on Intel hardware 277 * and makes it slightly simpler to implement. We may change 278 * this in the future to cover the whole topology if it turns 279 * out to be beneficial. 280 */ 281 while (sw && tb_switch_depth(sw) > 1) 282 sw = tb_switch_parent(sw); 283 284 if (!sw) 285 return 0; 286 287 if (tb_switch_depth(sw) != 1) 288 return 0; 289 290 /* 291 * If we are re-enabling then check if there is an active DMA 292 * tunnel and in that case bail out. 293 */ 294 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 295 if (tb_tunnel_is_dma(tunnel)) { 296 if (tb_tunnel_port_on_path(tunnel, tb_upstream_port(sw))) 297 return 0; 298 } 299 } 300 301 /* 302 * Initially try with CL2. If that's not supported by the 303 * topology try with CL0s and CL1 and then give up. 304 */ 305 ret = tb_switch_clx_enable(sw, clx | TB_CL2); 306 if (ret == -EOPNOTSUPP) 307 ret = tb_switch_clx_enable(sw, clx); 308 return ret == -EOPNOTSUPP ? 0 : ret; 309 } 310 311 /** 312 * tb_disable_clx() - Disable CL states up to host router 313 * @sw: Router to start 314 * 315 * Disables CL states from @sw up to the host router. Returns true if 316 * any CL state were disabled. This can be used to figure out whether 317 * the link was setup by us or the boot firmware so we don't 318 * accidentally enable them if they were not enabled during discovery. 319 */ 320 static bool tb_disable_clx(struct tb_switch *sw) 321 { 322 bool disabled = false; 323 324 do { 325 int ret; 326 327 ret = tb_switch_clx_disable(sw); 328 if (ret > 0) 329 disabled = true; 330 else if (ret < 0) 331 tb_sw_warn(sw, "failed to disable CL states\n"); 332 333 sw = tb_switch_parent(sw); 334 } while (sw); 335 336 return disabled; 337 } 338 339 static int tb_increase_switch_tmu_accuracy(struct device *dev, void *data) 340 { 341 struct tb_switch *sw; 342 343 sw = tb_to_switch(dev); 344 if (!sw) 345 return 0; 346 347 if (tb_switch_tmu_is_configured(sw, TB_SWITCH_TMU_MODE_LOWRES)) { 348 enum tb_switch_tmu_mode mode; 349 int ret; 350 351 if (tb_switch_clx_is_enabled(sw, TB_CL1)) 352 mode = TB_SWITCH_TMU_MODE_HIFI_UNI; 353 else 354 mode = TB_SWITCH_TMU_MODE_HIFI_BI; 355 356 ret = tb_switch_tmu_configure(sw, mode); 357 if (ret) 358 return ret; 359 360 return tb_switch_tmu_enable(sw); 361 } 362 363 return 0; 364 } 365 366 static void tb_increase_tmu_accuracy(struct tb_tunnel *tunnel) 367 { 368 struct tb_switch *sw; 369 370 if (!tunnel) 371 return; 372 373 /* 374 * Once first DP tunnel is established we change the TMU 375 * accuracy of first depth child routers (and the host router) 376 * to the highest. This is needed for the DP tunneling to work 377 * but also allows CL0s. 378 * 379 * If both routers are v2 then we don't need to do anything as 380 * they are using enhanced TMU mode that allows all CLx. 381 */ 382 sw = tunnel->tb->root_switch; 383 device_for_each_child(&sw->dev, NULL, tb_increase_switch_tmu_accuracy); 384 } 385 386 static int tb_switch_tmu_hifi_uni_required(struct device *dev, void *not_used) 387 { 388 struct tb_switch *sw = tb_to_switch(dev); 389 390 if (sw && tb_switch_tmu_is_enabled(sw) && 391 tb_switch_tmu_is_configured(sw, TB_SWITCH_TMU_MODE_HIFI_UNI)) 392 return 1; 393 394 return device_for_each_child(dev, NULL, 395 tb_switch_tmu_hifi_uni_required); 396 } 397 398 static bool tb_tmu_hifi_uni_required(struct tb *tb) 399 { 400 return device_for_each_child(&tb->dev, NULL, 401 tb_switch_tmu_hifi_uni_required) == 1; 402 } 403 404 static int tb_enable_tmu(struct tb_switch *sw) 405 { 406 int ret; 407 408 /* 409 * If both routers at the end of the link are v2 we simply 410 * enable the enhanched uni-directional mode. That covers all 411 * the CL states. For v1 and before we need to use the normal 412 * rate to allow CL1 (when supported). Otherwise we keep the TMU 413 * running at the highest accuracy. 414 */ 415 ret = tb_switch_tmu_configure(sw, 416 TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI); 417 if (ret == -EOPNOTSUPP) { 418 if (tb_switch_clx_is_enabled(sw, TB_CL1)) { 419 /* 420 * Figure out uni-directional HiFi TMU requirements 421 * currently in the domain. If there are no 422 * uni-directional HiFi requirements we can put the TMU 423 * into LowRes mode. 424 * 425 * Deliberately skip bi-directional HiFi links 426 * as these work independently of other links 427 * (and they do not allow any CL states anyway). 428 */ 429 if (tb_tmu_hifi_uni_required(sw->tb)) 430 ret = tb_switch_tmu_configure(sw, 431 TB_SWITCH_TMU_MODE_HIFI_UNI); 432 else 433 ret = tb_switch_tmu_configure(sw, 434 TB_SWITCH_TMU_MODE_LOWRES); 435 } else { 436 ret = tb_switch_tmu_configure(sw, TB_SWITCH_TMU_MODE_HIFI_BI); 437 } 438 439 /* If not supported, fallback to bi-directional HiFi */ 440 if (ret == -EOPNOTSUPP) 441 ret = tb_switch_tmu_configure(sw, TB_SWITCH_TMU_MODE_HIFI_BI); 442 } 443 if (ret) 444 return ret; 445 446 /* If it is already enabled in correct mode, don't touch it */ 447 if (tb_switch_tmu_is_enabled(sw)) 448 return 0; 449 450 ret = tb_switch_tmu_disable(sw); 451 if (ret) 452 return ret; 453 454 ret = tb_switch_tmu_post_time(sw); 455 if (ret) 456 return ret; 457 458 return tb_switch_tmu_enable(sw); 459 } 460 461 static void tb_switch_discover_tunnels(struct tb_switch *sw, 462 struct list_head *list, 463 bool alloc_hopids) 464 { 465 struct tb *tb = sw->tb; 466 struct tb_port *port; 467 468 tb_switch_for_each_port(sw, port) { 469 struct tb_tunnel *tunnel = NULL; 470 471 switch (port->config.type) { 472 case TB_TYPE_DP_HDMI_IN: 473 tunnel = tb_tunnel_discover_dp(tb, port, alloc_hopids); 474 tb_increase_tmu_accuracy(tunnel); 475 break; 476 477 case TB_TYPE_PCIE_DOWN: 478 tunnel = tb_tunnel_discover_pci(tb, port, alloc_hopids); 479 break; 480 481 case TB_TYPE_USB3_DOWN: 482 tunnel = tb_tunnel_discover_usb3(tb, port, alloc_hopids); 483 break; 484 485 default: 486 break; 487 } 488 489 if (tunnel) 490 list_add_tail(&tunnel->list, list); 491 } 492 493 tb_switch_for_each_port(sw, port) { 494 if (tb_port_has_remote(port)) { 495 tb_switch_discover_tunnels(port->remote->sw, list, 496 alloc_hopids); 497 } 498 } 499 } 500 501 static void tb_discover_tunnels(struct tb *tb) 502 { 503 struct tb_cm *tcm = tb_priv(tb); 504 struct tb_tunnel *tunnel; 505 506 tb_switch_discover_tunnels(tb->root_switch, &tcm->tunnel_list, true); 507 508 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 509 if (tb_tunnel_is_pci(tunnel)) { 510 struct tb_switch *parent = tunnel->dst_port->sw; 511 512 while (parent != tunnel->src_port->sw) { 513 parent->boot = true; 514 parent = tb_switch_parent(parent); 515 } 516 } else if (tb_tunnel_is_dp(tunnel)) { 517 struct tb_port *in = tunnel->src_port; 518 struct tb_port *out = tunnel->dst_port; 519 520 /* Keep the domain from powering down */ 521 pm_runtime_get_sync(&in->sw->dev); 522 pm_runtime_get_sync(&out->sw->dev); 523 524 tb_discover_bandwidth_group(tcm, in, out); 525 } 526 } 527 } 528 529 static int tb_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd) 530 { 531 if (tb_switch_is_usb4(port->sw)) 532 return usb4_port_configure_xdomain(port, xd); 533 return tb_lc_configure_xdomain(port); 534 } 535 536 static void tb_port_unconfigure_xdomain(struct tb_port *port) 537 { 538 if (tb_switch_is_usb4(port->sw)) 539 usb4_port_unconfigure_xdomain(port); 540 else 541 tb_lc_unconfigure_xdomain(port); 542 543 tb_port_enable(port->dual_link_port); 544 } 545 546 static void tb_scan_xdomain(struct tb_port *port) 547 { 548 struct tb_switch *sw = port->sw; 549 struct tb *tb = sw->tb; 550 struct tb_xdomain *xd; 551 u64 route; 552 553 if (!tb_is_xdomain_enabled()) 554 return; 555 556 route = tb_downstream_route(port); 557 xd = tb_xdomain_find_by_route(tb, route); 558 if (xd) { 559 tb_xdomain_put(xd); 560 return; 561 } 562 563 xd = tb_xdomain_alloc(tb, &sw->dev, route, tb->root_switch->uuid, 564 NULL); 565 if (xd) { 566 tb_port_at(route, sw)->xdomain = xd; 567 tb_port_configure_xdomain(port, xd); 568 tb_xdomain_add(xd); 569 } 570 } 571 572 /** 573 * tb_find_unused_port() - return the first inactive port on @sw 574 * @sw: Switch to find the port on 575 * @type: Port type to look for 576 */ 577 static struct tb_port *tb_find_unused_port(struct tb_switch *sw, 578 enum tb_port_type type) 579 { 580 struct tb_port *port; 581 582 tb_switch_for_each_port(sw, port) { 583 if (tb_is_upstream_port(port)) 584 continue; 585 if (port->config.type != type) 586 continue; 587 if (!port->cap_adap) 588 continue; 589 if (tb_port_is_enabled(port)) 590 continue; 591 return port; 592 } 593 return NULL; 594 } 595 596 static struct tb_port *tb_find_usb3_down(struct tb_switch *sw, 597 const struct tb_port *port) 598 { 599 struct tb_port *down; 600 601 down = usb4_switch_map_usb3_down(sw, port); 602 if (down && !tb_usb3_port_is_enabled(down)) 603 return down; 604 return NULL; 605 } 606 607 static struct tb_tunnel *tb_find_tunnel(struct tb *tb, enum tb_tunnel_type type, 608 struct tb_port *src_port, 609 struct tb_port *dst_port) 610 { 611 struct tb_cm *tcm = tb_priv(tb); 612 struct tb_tunnel *tunnel; 613 614 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 615 if (tunnel->type == type && 616 ((src_port && src_port == tunnel->src_port) || 617 (dst_port && dst_port == tunnel->dst_port))) { 618 return tunnel; 619 } 620 } 621 622 return NULL; 623 } 624 625 static struct tb_tunnel *tb_find_first_usb3_tunnel(struct tb *tb, 626 struct tb_port *src_port, 627 struct tb_port *dst_port) 628 { 629 struct tb_port *port, *usb3_down; 630 struct tb_switch *sw; 631 632 /* Pick the router that is deepest in the topology */ 633 if (tb_port_path_direction_downstream(src_port, dst_port)) 634 sw = dst_port->sw; 635 else 636 sw = src_port->sw; 637 638 /* Can't be the host router */ 639 if (sw == tb->root_switch) 640 return NULL; 641 642 /* Find the downstream USB4 port that leads to this router */ 643 port = tb_port_at(tb_route(sw), tb->root_switch); 644 /* Find the corresponding host router USB3 downstream port */ 645 usb3_down = usb4_switch_map_usb3_down(tb->root_switch, port); 646 if (!usb3_down) 647 return NULL; 648 649 return tb_find_tunnel(tb, TB_TUNNEL_USB3, usb3_down, NULL); 650 } 651 652 /** 653 * tb_consumed_usb3_pcie_bandwidth() - Consumed USB3/PCIe bandwidth over a single link 654 * @tb: Domain structure 655 * @src_port: Source protocol adapter 656 * @dst_port: Destination protocol adapter 657 * @port: USB4 port the consumed bandwidth is calculated 658 * @consumed_up: Consumed upsream bandwidth (Mb/s) 659 * @consumed_down: Consumed downstream bandwidth (Mb/s) 660 * 661 * Calculates consumed USB3 and PCIe bandwidth at @port between path 662 * from @src_port to @dst_port. Does not take tunnel starting from 663 * @src_port and ending from @src_port into account. 664 */ 665 static int tb_consumed_usb3_pcie_bandwidth(struct tb *tb, 666 struct tb_port *src_port, 667 struct tb_port *dst_port, 668 struct tb_port *port, 669 int *consumed_up, 670 int *consumed_down) 671 { 672 int pci_consumed_up, pci_consumed_down; 673 struct tb_tunnel *tunnel; 674 675 *consumed_up = *consumed_down = 0; 676 677 tunnel = tb_find_first_usb3_tunnel(tb, src_port, dst_port); 678 if (tunnel && tunnel->src_port != src_port && 679 tunnel->dst_port != dst_port) { 680 int ret; 681 682 ret = tb_tunnel_consumed_bandwidth(tunnel, consumed_up, 683 consumed_down); 684 if (ret) 685 return ret; 686 } 687 688 /* 689 * If there is anything reserved for PCIe bulk traffic take it 690 * into account here too. 691 */ 692 if (tb_tunnel_reserved_pci(port, &pci_consumed_up, &pci_consumed_down)) { 693 *consumed_up += pci_consumed_up; 694 *consumed_down += pci_consumed_down; 695 } 696 697 return 0; 698 } 699 700 /** 701 * tb_consumed_dp_bandwidth() - Consumed DP bandwidth over a single link 702 * @tb: Domain structure 703 * @src_port: Source protocol adapter 704 * @dst_port: Destination protocol adapter 705 * @port: USB4 port the consumed bandwidth is calculated 706 * @consumed_up: Consumed upsream bandwidth (Mb/s) 707 * @consumed_down: Consumed downstream bandwidth (Mb/s) 708 * 709 * Calculates consumed DP bandwidth at @port between path from @src_port 710 * to @dst_port. Does not take tunnel starting from @src_port and ending 711 * from @src_port into account. 712 */ 713 static int tb_consumed_dp_bandwidth(struct tb *tb, 714 struct tb_port *src_port, 715 struct tb_port *dst_port, 716 struct tb_port *port, 717 int *consumed_up, 718 int *consumed_down) 719 { 720 struct tb_cm *tcm = tb_priv(tb); 721 struct tb_tunnel *tunnel; 722 int ret; 723 724 *consumed_up = *consumed_down = 0; 725 726 /* 727 * Find all DP tunnels that cross the port and reduce 728 * their consumed bandwidth from the available. 729 */ 730 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 731 int dp_consumed_up, dp_consumed_down; 732 733 if (tb_tunnel_is_invalid(tunnel)) 734 continue; 735 736 if (!tb_tunnel_is_dp(tunnel)) 737 continue; 738 739 if (!tb_tunnel_port_on_path(tunnel, port)) 740 continue; 741 742 /* 743 * Ignore the DP tunnel between src_port and dst_port 744 * because it is the same tunnel and we may be 745 * re-calculating estimated bandwidth. 746 */ 747 if (tunnel->src_port == src_port && 748 tunnel->dst_port == dst_port) 749 continue; 750 751 ret = tb_tunnel_consumed_bandwidth(tunnel, &dp_consumed_up, 752 &dp_consumed_down); 753 if (ret) 754 return ret; 755 756 *consumed_up += dp_consumed_up; 757 *consumed_down += dp_consumed_down; 758 } 759 760 return 0; 761 } 762 763 static bool tb_asym_supported(struct tb_port *src_port, struct tb_port *dst_port, 764 struct tb_port *port) 765 { 766 bool downstream = tb_port_path_direction_downstream(src_port, dst_port); 767 enum tb_link_width width; 768 769 if (tb_is_upstream_port(port)) 770 width = downstream ? TB_LINK_WIDTH_ASYM_RX : TB_LINK_WIDTH_ASYM_TX; 771 else 772 width = downstream ? TB_LINK_WIDTH_ASYM_TX : TB_LINK_WIDTH_ASYM_RX; 773 774 return tb_port_width_supported(port, width); 775 } 776 777 /** 778 * tb_maximum_banwidth() - Maximum bandwidth over a single link 779 * @tb: Domain structure 780 * @src_port: Source protocol adapter 781 * @dst_port: Destination protocol adapter 782 * @port: USB4 port the total bandwidth is calculated 783 * @max_up: Maximum upstream bandwidth (Mb/s) 784 * @max_down: Maximum downstream bandwidth (Mb/s) 785 * @include_asym: Include bandwidth if the link is switched from 786 * symmetric to asymmetric 787 * 788 * Returns maximum possible bandwidth in @max_up and @max_down over a 789 * single link at @port. If @include_asym is set then includes the 790 * additional banwdith if the links are transitioned into asymmetric to 791 * direction from @src_port to @dst_port. 792 */ 793 static int tb_maximum_bandwidth(struct tb *tb, struct tb_port *src_port, 794 struct tb_port *dst_port, struct tb_port *port, 795 int *max_up, int *max_down, bool include_asym) 796 { 797 bool downstream = tb_port_path_direction_downstream(src_port, dst_port); 798 int link_speed, link_width, up_bw, down_bw; 799 800 /* 801 * Can include asymmetric, only if it is actually supported by 802 * the lane adapter. 803 */ 804 if (!tb_asym_supported(src_port, dst_port, port)) 805 include_asym = false; 806 807 if (tb_is_upstream_port(port)) { 808 link_speed = port->sw->link_speed; 809 /* 810 * sw->link_width is from upstream perspective so we use 811 * the opposite for downstream of the host router. 812 */ 813 if (port->sw->link_width == TB_LINK_WIDTH_ASYM_TX) { 814 up_bw = link_speed * 3 * 1000; 815 down_bw = link_speed * 1 * 1000; 816 } else if (port->sw->link_width == TB_LINK_WIDTH_ASYM_RX) { 817 up_bw = link_speed * 1 * 1000; 818 down_bw = link_speed * 3 * 1000; 819 } else if (include_asym) { 820 /* 821 * The link is symmetric at the moment but we 822 * can switch it to asymmetric as needed. Report 823 * this bandwidth as available (even though it 824 * is not yet enabled). 825 */ 826 if (downstream) { 827 up_bw = link_speed * 1 * 1000; 828 down_bw = link_speed * 3 * 1000; 829 } else { 830 up_bw = link_speed * 3 * 1000; 831 down_bw = link_speed * 1 * 1000; 832 } 833 } else { 834 up_bw = link_speed * port->sw->link_width * 1000; 835 down_bw = up_bw; 836 } 837 } else { 838 link_speed = tb_port_get_link_speed(port); 839 if (link_speed < 0) 840 return link_speed; 841 842 link_width = tb_port_get_link_width(port); 843 if (link_width < 0) 844 return link_width; 845 846 if (link_width == TB_LINK_WIDTH_ASYM_TX) { 847 up_bw = link_speed * 1 * 1000; 848 down_bw = link_speed * 3 * 1000; 849 } else if (link_width == TB_LINK_WIDTH_ASYM_RX) { 850 up_bw = link_speed * 3 * 1000; 851 down_bw = link_speed * 1 * 1000; 852 } else if (include_asym) { 853 /* 854 * The link is symmetric at the moment but we 855 * can switch it to asymmetric as needed. Report 856 * this bandwidth as available (even though it 857 * is not yet enabled). 858 */ 859 if (downstream) { 860 up_bw = link_speed * 1 * 1000; 861 down_bw = link_speed * 3 * 1000; 862 } else { 863 up_bw = link_speed * 3 * 1000; 864 down_bw = link_speed * 1 * 1000; 865 } 866 } else { 867 up_bw = link_speed * link_width * 1000; 868 down_bw = up_bw; 869 } 870 } 871 872 /* Leave 10% guard band */ 873 *max_up = up_bw - up_bw / 10; 874 *max_down = down_bw - down_bw / 10; 875 876 tb_port_dbg(port, "link maximum bandwidth %d/%d Mb/s\n", *max_up, *max_down); 877 return 0; 878 } 879 880 /** 881 * tb_available_bandwidth() - Available bandwidth for tunneling 882 * @tb: Domain structure 883 * @src_port: Source protocol adapter 884 * @dst_port: Destination protocol adapter 885 * @available_up: Available bandwidth upstream (Mb/s) 886 * @available_down: Available bandwidth downstream (Mb/s) 887 * @include_asym: Include bandwidth if the link is switched from 888 * symmetric to asymmetric 889 * 890 * Calculates maximum available bandwidth for protocol tunneling between 891 * @src_port and @dst_port at the moment. This is minimum of maximum 892 * link bandwidth across all links reduced by currently consumed 893 * bandwidth on that link. 894 * 895 * If @include_asym is true then includes also bandwidth that can be 896 * added when the links are transitioned into asymmetric (but does not 897 * transition the links). 898 */ 899 static int tb_available_bandwidth(struct tb *tb, struct tb_port *src_port, 900 struct tb_port *dst_port, int *available_up, 901 int *available_down, bool include_asym) 902 { 903 struct tb_port *port; 904 int ret; 905 906 /* Maximum possible bandwidth asymmetric Gen 4 link is 120 Gb/s */ 907 *available_up = *available_down = 120000; 908 909 /* Find the minimum available bandwidth over all links */ 910 tb_for_each_port_on_path(src_port, dst_port, port) { 911 int max_up, max_down, consumed_up, consumed_down; 912 913 if (!tb_port_is_null(port)) 914 continue; 915 916 ret = tb_maximum_bandwidth(tb, src_port, dst_port, port, 917 &max_up, &max_down, include_asym); 918 if (ret) 919 return ret; 920 921 ret = tb_consumed_usb3_pcie_bandwidth(tb, src_port, dst_port, 922 port, &consumed_up, 923 &consumed_down); 924 if (ret) 925 return ret; 926 max_up -= consumed_up; 927 max_down -= consumed_down; 928 929 ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, port, 930 &consumed_up, &consumed_down); 931 if (ret) 932 return ret; 933 max_up -= consumed_up; 934 max_down -= consumed_down; 935 936 if (max_up < *available_up) 937 *available_up = max_up; 938 if (max_down < *available_down) 939 *available_down = max_down; 940 } 941 942 if (*available_up < 0) 943 *available_up = 0; 944 if (*available_down < 0) 945 *available_down = 0; 946 947 return 0; 948 } 949 950 static int tb_release_unused_usb3_bandwidth(struct tb *tb, 951 struct tb_port *src_port, 952 struct tb_port *dst_port) 953 { 954 struct tb_tunnel *tunnel; 955 956 tunnel = tb_find_first_usb3_tunnel(tb, src_port, dst_port); 957 return tunnel ? tb_tunnel_release_unused_bandwidth(tunnel) : 0; 958 } 959 960 static void tb_reclaim_usb3_bandwidth(struct tb *tb, struct tb_port *src_port, 961 struct tb_port *dst_port) 962 { 963 int ret, available_up, available_down; 964 struct tb_tunnel *tunnel; 965 966 tunnel = tb_find_first_usb3_tunnel(tb, src_port, dst_port); 967 if (!tunnel) 968 return; 969 970 tb_dbg(tb, "reclaiming unused bandwidth for USB3\n"); 971 972 /* 973 * Calculate available bandwidth for the first hop USB3 tunnel. 974 * That determines the whole USB3 bandwidth for this branch. 975 */ 976 ret = tb_available_bandwidth(tb, tunnel->src_port, tunnel->dst_port, 977 &available_up, &available_down, false); 978 if (ret) { 979 tb_warn(tb, "failed to calculate available bandwidth\n"); 980 return; 981 } 982 983 tb_dbg(tb, "available bandwidth for USB3 %d/%d Mb/s\n", 984 available_up, available_down); 985 986 tb_tunnel_reclaim_available_bandwidth(tunnel, &available_up, &available_down); 987 } 988 989 static int tb_tunnel_usb3(struct tb *tb, struct tb_switch *sw) 990 { 991 struct tb_switch *parent = tb_switch_parent(sw); 992 int ret, available_up, available_down; 993 struct tb_port *up, *down, *port; 994 struct tb_cm *tcm = tb_priv(tb); 995 struct tb_tunnel *tunnel; 996 997 if (!tb_acpi_may_tunnel_usb3()) { 998 tb_dbg(tb, "USB3 tunneling disabled, not creating tunnel\n"); 999 return 0; 1000 } 1001 1002 up = tb_switch_find_port(sw, TB_TYPE_USB3_UP); 1003 if (!up) 1004 return 0; 1005 1006 if (!sw->link_usb4) 1007 return 0; 1008 1009 /* 1010 * Look up available down port. Since we are chaining it should 1011 * be found right above this switch. 1012 */ 1013 port = tb_switch_downstream_port(sw); 1014 down = tb_find_usb3_down(parent, port); 1015 if (!down) 1016 return 0; 1017 1018 if (tb_route(parent)) { 1019 struct tb_port *parent_up; 1020 /* 1021 * Check first that the parent switch has its upstream USB3 1022 * port enabled. Otherwise the chain is not complete and 1023 * there is no point setting up a new tunnel. 1024 */ 1025 parent_up = tb_switch_find_port(parent, TB_TYPE_USB3_UP); 1026 if (!parent_up || !tb_port_is_enabled(parent_up)) 1027 return 0; 1028 1029 /* Make all unused bandwidth available for the new tunnel */ 1030 ret = tb_release_unused_usb3_bandwidth(tb, down, up); 1031 if (ret) 1032 return ret; 1033 } 1034 1035 ret = tb_available_bandwidth(tb, down, up, &available_up, &available_down, 1036 false); 1037 if (ret) 1038 goto err_reclaim; 1039 1040 tb_port_dbg(up, "available bandwidth for new USB3 tunnel %d/%d Mb/s\n", 1041 available_up, available_down); 1042 1043 tunnel = tb_tunnel_alloc_usb3(tb, up, down, available_up, 1044 available_down); 1045 if (!tunnel) { 1046 ret = -ENOMEM; 1047 goto err_reclaim; 1048 } 1049 1050 if (tb_tunnel_activate(tunnel)) { 1051 tb_port_info(up, 1052 "USB3 tunnel activation failed, aborting\n"); 1053 ret = -EIO; 1054 goto err_free; 1055 } 1056 1057 list_add_tail(&tunnel->list, &tcm->tunnel_list); 1058 if (tb_route(parent)) 1059 tb_reclaim_usb3_bandwidth(tb, down, up); 1060 1061 return 0; 1062 1063 err_free: 1064 tb_tunnel_free(tunnel); 1065 err_reclaim: 1066 if (tb_route(parent)) 1067 tb_reclaim_usb3_bandwidth(tb, down, up); 1068 1069 return ret; 1070 } 1071 1072 static int tb_create_usb3_tunnels(struct tb_switch *sw) 1073 { 1074 struct tb_port *port; 1075 int ret; 1076 1077 if (!tb_acpi_may_tunnel_usb3()) 1078 return 0; 1079 1080 if (tb_route(sw)) { 1081 ret = tb_tunnel_usb3(sw->tb, sw); 1082 if (ret) 1083 return ret; 1084 } 1085 1086 tb_switch_for_each_port(sw, port) { 1087 if (!tb_port_has_remote(port)) 1088 continue; 1089 ret = tb_create_usb3_tunnels(port->remote->sw); 1090 if (ret) 1091 return ret; 1092 } 1093 1094 return 0; 1095 } 1096 1097 /** 1098 * tb_configure_asym() - Transition links to asymmetric if needed 1099 * @tb: Domain structure 1100 * @src_port: Source adapter to start the transition 1101 * @dst_port: Destination adapter 1102 * @requested_up: Additional bandwidth (Mb/s) required upstream 1103 * @requested_down: Additional bandwidth (Mb/s) required downstream 1104 * 1105 * Transition links between @src_port and @dst_port into asymmetric, with 1106 * three lanes in the direction from @src_port towards @dst_port and one lane 1107 * in the opposite direction, if the bandwidth requirements 1108 * (requested + currently consumed) on that link exceed @asym_threshold. 1109 * 1110 * Must be called with available >= requested over all links. 1111 */ 1112 static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, 1113 struct tb_port *dst_port, int requested_up, 1114 int requested_down) 1115 { 1116 struct tb_switch *sw; 1117 bool clx, downstream; 1118 struct tb_port *up; 1119 int ret = 0; 1120 1121 if (!asym_threshold) 1122 return 0; 1123 1124 /* Disable CL states before doing any transitions */ 1125 downstream = tb_port_path_direction_downstream(src_port, dst_port); 1126 /* Pick up router deepest in the hierarchy */ 1127 if (downstream) 1128 sw = dst_port->sw; 1129 else 1130 sw = src_port->sw; 1131 1132 clx = tb_disable_clx(sw); 1133 1134 tb_for_each_upstream_port_on_path(src_port, dst_port, up) { 1135 int consumed_up, consumed_down; 1136 enum tb_link_width width; 1137 1138 ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, up, 1139 &consumed_up, &consumed_down); 1140 if (ret) 1141 break; 1142 1143 if (downstream) { 1144 /* 1145 * Downstream so make sure upstream is within the 36G 1146 * (40G - guard band 10%), and the requested is above 1147 * what the threshold is. 1148 */ 1149 if (consumed_up + requested_up >= TB_ASYM_MIN) { 1150 ret = -ENOBUFS; 1151 break; 1152 } 1153 /* Does consumed + requested exceed the threshold */ 1154 if (consumed_down + requested_down < asym_threshold) 1155 continue; 1156 1157 width = TB_LINK_WIDTH_ASYM_RX; 1158 } else { 1159 /* Upstream, the opposite of above */ 1160 if (consumed_down + requested_down >= TB_ASYM_MIN) { 1161 ret = -ENOBUFS; 1162 break; 1163 } 1164 if (consumed_up + requested_up < asym_threshold) 1165 continue; 1166 1167 width = TB_LINK_WIDTH_ASYM_TX; 1168 } 1169 1170 if (up->sw->link_width == width) 1171 continue; 1172 1173 if (!tb_port_width_supported(up, width)) 1174 continue; 1175 1176 tb_sw_dbg(up->sw, "configuring asymmetric link\n"); 1177 1178 /* 1179 * Here requested + consumed > threshold so we need to 1180 * transtion the link into asymmetric now. 1181 */ 1182 ret = tb_switch_set_link_width(up->sw, width); 1183 if (ret) { 1184 tb_sw_warn(up->sw, "failed to set link width\n"); 1185 break; 1186 } 1187 } 1188 1189 /* Re-enable CL states if they were previosly enabled */ 1190 if (clx) 1191 tb_enable_clx(sw); 1192 1193 return ret; 1194 } 1195 1196 /** 1197 * tb_configure_sym() - Transition links to symmetric if possible 1198 * @tb: Domain structure 1199 * @src_port: Source adapter to start the transition 1200 * @dst_port: Destination adapter 1201 * @requested_up: New lower bandwidth request upstream (Mb/s) 1202 * @requested_down: New lower bandwidth request downstream (Mb/s) 1203 * 1204 * Goes over each link from @src_port to @dst_port and tries to 1205 * transition the link to symmetric if the currently consumed bandwidth 1206 * allows. 1207 */ 1208 static int tb_configure_sym(struct tb *tb, struct tb_port *src_port, 1209 struct tb_port *dst_port, int requested_up, 1210 int requested_down) 1211 { 1212 struct tb_switch *sw; 1213 bool clx, downstream; 1214 struct tb_port *up; 1215 int ret = 0; 1216 1217 if (!asym_threshold) 1218 return 0; 1219 1220 /* Disable CL states before doing any transitions */ 1221 downstream = tb_port_path_direction_downstream(src_port, dst_port); 1222 /* Pick up router deepest in the hierarchy */ 1223 if (downstream) 1224 sw = dst_port->sw; 1225 else 1226 sw = src_port->sw; 1227 1228 clx = tb_disable_clx(sw); 1229 1230 tb_for_each_upstream_port_on_path(src_port, dst_port, up) { 1231 int consumed_up, consumed_down; 1232 1233 /* Already symmetric */ 1234 if (up->sw->link_width <= TB_LINK_WIDTH_DUAL) 1235 continue; 1236 /* Unplugged, no need to switch */ 1237 if (up->sw->is_unplugged) 1238 continue; 1239 1240 ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, up, 1241 &consumed_up, &consumed_down); 1242 if (ret) 1243 break; 1244 1245 if (downstream) { 1246 /* 1247 * Downstream so we want the consumed_down < threshold. 1248 * Upstream traffic should be less than 36G (40G 1249 * guard band 10%) as the link was configured asymmetric 1250 * already. 1251 */ 1252 if (consumed_down + requested_down >= asym_threshold) 1253 continue; 1254 } else { 1255 if (consumed_up + requested_up >= asym_threshold) 1256 continue; 1257 } 1258 1259 if (up->sw->link_width == TB_LINK_WIDTH_DUAL) 1260 continue; 1261 1262 tb_sw_dbg(up->sw, "configuring symmetric link\n"); 1263 1264 ret = tb_switch_set_link_width(up->sw, TB_LINK_WIDTH_DUAL); 1265 if (ret) { 1266 tb_sw_warn(up->sw, "failed to set link width\n"); 1267 break; 1268 } 1269 } 1270 1271 /* Re-enable CL states if they were previosly enabled */ 1272 if (clx) 1273 tb_enable_clx(sw); 1274 1275 return ret; 1276 } 1277 1278 static void tb_configure_link(struct tb_port *down, struct tb_port *up, 1279 struct tb_switch *sw) 1280 { 1281 struct tb *tb = sw->tb; 1282 1283 /* Link the routers using both links if available */ 1284 down->remote = up; 1285 up->remote = down; 1286 if (down->dual_link_port && up->dual_link_port) { 1287 down->dual_link_port->remote = up->dual_link_port; 1288 up->dual_link_port->remote = down->dual_link_port; 1289 } 1290 1291 /* 1292 * Enable lane bonding if the link is currently two single lane 1293 * links. 1294 */ 1295 if (sw->link_width < TB_LINK_WIDTH_DUAL) 1296 tb_switch_set_link_width(sw, TB_LINK_WIDTH_DUAL); 1297 1298 /* 1299 * Device router that comes up as symmetric link is 1300 * connected deeper in the hierarchy, we transition the links 1301 * above into symmetric if bandwidth allows. 1302 */ 1303 if (tb_switch_depth(sw) > 1 && 1304 tb_port_get_link_generation(up) >= 4 && 1305 up->sw->link_width == TB_LINK_WIDTH_DUAL) { 1306 struct tb_port *host_port; 1307 1308 host_port = tb_port_at(tb_route(sw), tb->root_switch); 1309 tb_configure_sym(tb, host_port, up, 0, 0); 1310 } 1311 1312 /* Set the link configured */ 1313 tb_switch_configure_link(sw); 1314 } 1315 1316 static void tb_scan_port(struct tb_port *port); 1317 1318 /* 1319 * tb_scan_switch() - scan for and initialize downstream switches 1320 */ 1321 static void tb_scan_switch(struct tb_switch *sw) 1322 { 1323 struct tb_port *port; 1324 1325 pm_runtime_get_sync(&sw->dev); 1326 1327 tb_switch_for_each_port(sw, port) 1328 tb_scan_port(port); 1329 1330 pm_runtime_mark_last_busy(&sw->dev); 1331 pm_runtime_put_autosuspend(&sw->dev); 1332 } 1333 1334 /* 1335 * tb_scan_port() - check for and initialize switches below port 1336 */ 1337 static void tb_scan_port(struct tb_port *port) 1338 { 1339 struct tb_cm *tcm = tb_priv(port->sw->tb); 1340 struct tb_port *upstream_port; 1341 bool discovery = false; 1342 struct tb_switch *sw; 1343 1344 if (tb_is_upstream_port(port)) 1345 return; 1346 1347 if (tb_port_is_dpout(port) && tb_dp_port_hpd_is_active(port) == 1 && 1348 !tb_dp_port_is_enabled(port)) { 1349 tb_port_dbg(port, "DP adapter HPD set, queuing hotplug\n"); 1350 tb_queue_hotplug(port->sw->tb, tb_route(port->sw), port->port, 1351 false); 1352 return; 1353 } 1354 1355 if (port->config.type != TB_TYPE_PORT) 1356 return; 1357 if (port->dual_link_port && port->link_nr) 1358 return; /* 1359 * Downstream switch is reachable through two ports. 1360 * Only scan on the primary port (link_nr == 0). 1361 */ 1362 1363 if (port->usb4) 1364 pm_runtime_get_sync(&port->usb4->dev); 1365 1366 if (tb_wait_for_port(port, false) <= 0) 1367 goto out_rpm_put; 1368 if (port->remote) { 1369 tb_port_dbg(port, "port already has a remote\n"); 1370 goto out_rpm_put; 1371 } 1372 1373 tb_retimer_scan(port, true); 1374 1375 sw = tb_switch_alloc(port->sw->tb, &port->sw->dev, 1376 tb_downstream_route(port)); 1377 if (IS_ERR(sw)) { 1378 /* 1379 * If there is an error accessing the connected switch 1380 * it may be connected to another domain. Also we allow 1381 * the other domain to be connected to a max depth switch. 1382 */ 1383 if (PTR_ERR(sw) == -EIO || PTR_ERR(sw) == -EADDRNOTAVAIL) 1384 tb_scan_xdomain(port); 1385 goto out_rpm_put; 1386 } 1387 1388 if (tb_switch_configure(sw)) { 1389 tb_switch_put(sw); 1390 goto out_rpm_put; 1391 } 1392 1393 /* 1394 * If there was previously another domain connected remove it 1395 * first. 1396 */ 1397 if (port->xdomain) { 1398 tb_xdomain_remove(port->xdomain); 1399 tb_port_unconfigure_xdomain(port); 1400 port->xdomain = NULL; 1401 } 1402 1403 /* 1404 * Do not send uevents until we have discovered all existing 1405 * tunnels and know which switches were authorized already by 1406 * the boot firmware. 1407 */ 1408 if (!tcm->hotplug_active) { 1409 dev_set_uevent_suppress(&sw->dev, true); 1410 discovery = true; 1411 } 1412 1413 /* 1414 * At the moment Thunderbolt 2 and beyond (devices with LC) we 1415 * can support runtime PM. 1416 */ 1417 sw->rpm = sw->generation > 1; 1418 1419 if (tb_switch_add(sw)) { 1420 tb_switch_put(sw); 1421 goto out_rpm_put; 1422 } 1423 1424 upstream_port = tb_upstream_port(sw); 1425 tb_configure_link(port, upstream_port, sw); 1426 1427 /* 1428 * CL0s and CL1 are enabled and supported together. 1429 * Silently ignore CLx enabling in case CLx is not supported. 1430 */ 1431 if (discovery) 1432 tb_sw_dbg(sw, "discovery, not touching CL states\n"); 1433 else if (tb_enable_clx(sw)) 1434 tb_sw_warn(sw, "failed to enable CL states\n"); 1435 1436 if (tb_enable_tmu(sw)) 1437 tb_sw_warn(sw, "failed to enable TMU\n"); 1438 1439 /* 1440 * Configuration valid needs to be set after the TMU has been 1441 * enabled for the upstream port of the router so we do it here. 1442 */ 1443 tb_switch_configuration_valid(sw); 1444 1445 /* Scan upstream retimers */ 1446 tb_retimer_scan(upstream_port, true); 1447 1448 /* 1449 * Create USB 3.x tunnels only when the switch is plugged to the 1450 * domain. This is because we scan the domain also during discovery 1451 * and want to discover existing USB 3.x tunnels before we create 1452 * any new. 1453 */ 1454 if (tcm->hotplug_active && tb_tunnel_usb3(sw->tb, sw)) 1455 tb_sw_warn(sw, "USB3 tunnel creation failed\n"); 1456 1457 tb_add_dp_resources(sw); 1458 tb_scan_switch(sw); 1459 1460 out_rpm_put: 1461 if (port->usb4) { 1462 pm_runtime_mark_last_busy(&port->usb4->dev); 1463 pm_runtime_put_autosuspend(&port->usb4->dev); 1464 } 1465 } 1466 1467 static void tb_deactivate_and_free_tunnel(struct tb_tunnel *tunnel) 1468 { 1469 struct tb_port *src_port, *dst_port; 1470 struct tb *tb; 1471 1472 if (!tunnel) 1473 return; 1474 1475 tb_tunnel_deactivate(tunnel); 1476 list_del(&tunnel->list); 1477 1478 tb = tunnel->tb; 1479 src_port = tunnel->src_port; 1480 dst_port = tunnel->dst_port; 1481 1482 switch (tunnel->type) { 1483 case TB_TUNNEL_DP: 1484 tb_detach_bandwidth_group(src_port); 1485 /* 1486 * In case of DP tunnel make sure the DP IN resource is 1487 * deallocated properly. 1488 */ 1489 tb_switch_dealloc_dp_resource(src_port->sw, src_port); 1490 /* 1491 * If bandwidth on a link is < asym_threshold 1492 * transition the link to symmetric. 1493 */ 1494 tb_configure_sym(tb, src_port, dst_port, 0, 0); 1495 /* Now we can allow the domain to runtime suspend again */ 1496 pm_runtime_mark_last_busy(&dst_port->sw->dev); 1497 pm_runtime_put_autosuspend(&dst_port->sw->dev); 1498 pm_runtime_mark_last_busy(&src_port->sw->dev); 1499 pm_runtime_put_autosuspend(&src_port->sw->dev); 1500 fallthrough; 1501 1502 case TB_TUNNEL_USB3: 1503 tb_reclaim_usb3_bandwidth(tb, src_port, dst_port); 1504 break; 1505 1506 default: 1507 /* 1508 * PCIe and DMA tunnels do not consume guaranteed 1509 * bandwidth. 1510 */ 1511 break; 1512 } 1513 1514 tb_tunnel_free(tunnel); 1515 } 1516 1517 /* 1518 * tb_free_invalid_tunnels() - destroy tunnels of devices that have gone away 1519 */ 1520 static void tb_free_invalid_tunnels(struct tb *tb) 1521 { 1522 struct tb_cm *tcm = tb_priv(tb); 1523 struct tb_tunnel *tunnel; 1524 struct tb_tunnel *n; 1525 1526 list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list) { 1527 if (tb_tunnel_is_invalid(tunnel)) 1528 tb_deactivate_and_free_tunnel(tunnel); 1529 } 1530 } 1531 1532 /* 1533 * tb_free_unplugged_children() - traverse hierarchy and free unplugged switches 1534 */ 1535 static void tb_free_unplugged_children(struct tb_switch *sw) 1536 { 1537 struct tb_port *port; 1538 1539 tb_switch_for_each_port(sw, port) { 1540 if (!tb_port_has_remote(port)) 1541 continue; 1542 1543 if (port->remote->sw->is_unplugged) { 1544 tb_retimer_remove_all(port); 1545 tb_remove_dp_resources(port->remote->sw); 1546 tb_switch_unconfigure_link(port->remote->sw); 1547 tb_switch_set_link_width(port->remote->sw, 1548 TB_LINK_WIDTH_SINGLE); 1549 tb_switch_remove(port->remote->sw); 1550 port->remote = NULL; 1551 if (port->dual_link_port) 1552 port->dual_link_port->remote = NULL; 1553 } else { 1554 tb_free_unplugged_children(port->remote->sw); 1555 } 1556 } 1557 } 1558 1559 static struct tb_port *tb_find_pcie_down(struct tb_switch *sw, 1560 const struct tb_port *port) 1561 { 1562 struct tb_port *down = NULL; 1563 1564 /* 1565 * To keep plugging devices consistently in the same PCIe 1566 * hierarchy, do mapping here for switch downstream PCIe ports. 1567 */ 1568 if (tb_switch_is_usb4(sw)) { 1569 down = usb4_switch_map_pcie_down(sw, port); 1570 } else if (!tb_route(sw)) { 1571 int phy_port = tb_phy_port_from_link(port->port); 1572 int index; 1573 1574 /* 1575 * Hard-coded Thunderbolt port to PCIe down port mapping 1576 * per controller. 1577 */ 1578 if (tb_switch_is_cactus_ridge(sw) || 1579 tb_switch_is_alpine_ridge(sw)) 1580 index = !phy_port ? 6 : 7; 1581 else if (tb_switch_is_falcon_ridge(sw)) 1582 index = !phy_port ? 6 : 8; 1583 else if (tb_switch_is_titan_ridge(sw)) 1584 index = !phy_port ? 8 : 9; 1585 else 1586 goto out; 1587 1588 /* Validate the hard-coding */ 1589 if (WARN_ON(index > sw->config.max_port_number)) 1590 goto out; 1591 1592 down = &sw->ports[index]; 1593 } 1594 1595 if (down) { 1596 if (WARN_ON(!tb_port_is_pcie_down(down))) 1597 goto out; 1598 if (tb_pci_port_is_enabled(down)) 1599 goto out; 1600 1601 return down; 1602 } 1603 1604 out: 1605 return tb_find_unused_port(sw, TB_TYPE_PCIE_DOWN); 1606 } 1607 1608 static void 1609 tb_recalc_estimated_bandwidth_for_group(struct tb_bandwidth_group *group) 1610 { 1611 struct tb_tunnel *first_tunnel; 1612 struct tb *tb = group->tb; 1613 struct tb_port *in; 1614 int ret; 1615 1616 tb_dbg(tb, "re-calculating bandwidth estimation for group %u\n", 1617 group->index); 1618 1619 first_tunnel = NULL; 1620 list_for_each_entry(in, &group->ports, group_list) { 1621 int estimated_bw, estimated_up, estimated_down; 1622 struct tb_tunnel *tunnel; 1623 struct tb_port *out; 1624 1625 if (!usb4_dp_port_bandwidth_mode_enabled(in)) 1626 continue; 1627 1628 tunnel = tb_find_tunnel(tb, TB_TUNNEL_DP, in, NULL); 1629 if (WARN_ON(!tunnel)) 1630 break; 1631 1632 if (!first_tunnel) { 1633 /* 1634 * Since USB3 bandwidth is shared by all DP 1635 * tunnels under the host router USB4 port, even 1636 * if they do not begin from the host router, we 1637 * can release USB3 bandwidth just once and not 1638 * for each tunnel separately. 1639 */ 1640 first_tunnel = tunnel; 1641 ret = tb_release_unused_usb3_bandwidth(tb, 1642 first_tunnel->src_port, first_tunnel->dst_port); 1643 if (ret) { 1644 tb_port_warn(in, 1645 "failed to release unused bandwidth\n"); 1646 break; 1647 } 1648 } 1649 1650 out = tunnel->dst_port; 1651 ret = tb_available_bandwidth(tb, in, out, &estimated_up, 1652 &estimated_down, true); 1653 if (ret) { 1654 tb_port_warn(in, 1655 "failed to re-calculate estimated bandwidth\n"); 1656 break; 1657 } 1658 1659 /* 1660 * Estimated bandwidth includes: 1661 * - already allocated bandwidth for the DP tunnel 1662 * - available bandwidth along the path 1663 * - bandwidth allocated for USB 3.x but not used. 1664 */ 1665 tb_port_dbg(in, "re-calculated estimated bandwidth %u/%u Mb/s\n", 1666 estimated_up, estimated_down); 1667 1668 if (tb_port_path_direction_downstream(in, out)) 1669 estimated_bw = estimated_down; 1670 else 1671 estimated_bw = estimated_up; 1672 1673 if (usb4_dp_port_set_estimated_bandwidth(in, estimated_bw)) 1674 tb_port_warn(in, "failed to update estimated bandwidth\n"); 1675 } 1676 1677 if (first_tunnel) 1678 tb_reclaim_usb3_bandwidth(tb, first_tunnel->src_port, 1679 first_tunnel->dst_port); 1680 1681 tb_dbg(tb, "bandwidth estimation for group %u done\n", group->index); 1682 } 1683 1684 static void tb_recalc_estimated_bandwidth(struct tb *tb) 1685 { 1686 struct tb_cm *tcm = tb_priv(tb); 1687 int i; 1688 1689 tb_dbg(tb, "bandwidth consumption changed, re-calculating estimated bandwidth\n"); 1690 1691 for (i = 0; i < ARRAY_SIZE(tcm->groups); i++) { 1692 struct tb_bandwidth_group *group = &tcm->groups[i]; 1693 1694 if (!list_empty(&group->ports)) 1695 tb_recalc_estimated_bandwidth_for_group(group); 1696 } 1697 1698 tb_dbg(tb, "bandwidth re-calculation done\n"); 1699 } 1700 1701 static struct tb_port *tb_find_dp_out(struct tb *tb, struct tb_port *in) 1702 { 1703 struct tb_port *host_port, *port; 1704 struct tb_cm *tcm = tb_priv(tb); 1705 1706 host_port = tb_route(in->sw) ? 1707 tb_port_at(tb_route(in->sw), tb->root_switch) : NULL; 1708 1709 list_for_each_entry(port, &tcm->dp_resources, list) { 1710 if (!tb_port_is_dpout(port)) 1711 continue; 1712 1713 if (tb_port_is_enabled(port)) { 1714 tb_port_dbg(port, "DP OUT in use\n"); 1715 continue; 1716 } 1717 1718 tb_port_dbg(port, "DP OUT available\n"); 1719 1720 /* 1721 * Keep the DP tunnel under the topology starting from 1722 * the same host router downstream port. 1723 */ 1724 if (host_port && tb_route(port->sw)) { 1725 struct tb_port *p; 1726 1727 p = tb_port_at(tb_route(port->sw), tb->root_switch); 1728 if (p != host_port) 1729 continue; 1730 } 1731 1732 return port; 1733 } 1734 1735 return NULL; 1736 } 1737 1738 static bool tb_tunnel_one_dp(struct tb *tb, struct tb_port *in, 1739 struct tb_port *out) 1740 { 1741 int available_up, available_down, ret, link_nr; 1742 struct tb_cm *tcm = tb_priv(tb); 1743 int consumed_up, consumed_down; 1744 struct tb_tunnel *tunnel; 1745 1746 /* 1747 * This is only applicable to links that are not bonded (so 1748 * when Thunderbolt 1 hardware is involved somewhere in the 1749 * topology). For these try to share the DP bandwidth between 1750 * the two lanes. 1751 */ 1752 link_nr = 1; 1753 list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 1754 if (tb_tunnel_is_dp(tunnel)) { 1755 link_nr = 0; 1756 break; 1757 } 1758 } 1759 1760 /* 1761 * DP stream needs the domain to be active so runtime resume 1762 * both ends of the tunnel. 1763 * 1764 * This should bring the routers in the middle active as well 1765 * and keeps the domain from runtime suspending while the DP 1766 * tunnel is active. 1767 */ 1768 pm_runtime_get_sync(&in->sw->dev); 1769 pm_runtime_get_sync(&out->sw->dev); 1770 1771 if (tb_switch_alloc_dp_resource(in->sw, in)) { 1772 tb_port_dbg(in, "no resource available for DP IN, not tunneling\n"); 1773 goto err_rpm_put; 1774 } 1775 1776 if (!tb_attach_bandwidth_group(tcm, in, out)) 1777 goto err_dealloc_dp; 1778 1779 /* Make all unused USB3 bandwidth available for the new DP tunnel */ 1780 ret = tb_release_unused_usb3_bandwidth(tb, in, out); 1781 if (ret) { 1782 tb_warn(tb, "failed to release unused bandwidth\n"); 1783 goto err_detach_group; 1784 } 1785 1786 ret = tb_available_bandwidth(tb, in, out, &available_up, &available_down, 1787 true); 1788 if (ret) 1789 goto err_reclaim_usb; 1790 1791 tb_dbg(tb, "available bandwidth for new DP tunnel %u/%u Mb/s\n", 1792 available_up, available_down); 1793 1794 tunnel = tb_tunnel_alloc_dp(tb, in, out, link_nr, available_up, 1795 available_down); 1796 if (!tunnel) { 1797 tb_port_dbg(out, "could not allocate DP tunnel\n"); 1798 goto err_reclaim_usb; 1799 } 1800 1801 if (tb_tunnel_activate(tunnel)) { 1802 tb_port_info(out, "DP tunnel activation failed, aborting\n"); 1803 goto err_free; 1804 } 1805 1806 /* If fail reading tunnel's consumed bandwidth, tear it down */ 1807 ret = tb_tunnel_consumed_bandwidth(tunnel, &consumed_up, &consumed_down); 1808 if (ret) 1809 goto err_deactivate; 1810 1811 list_add_tail(&tunnel->list, &tcm->tunnel_list); 1812 1813 tb_reclaim_usb3_bandwidth(tb, in, out); 1814 /* 1815 * Transition the links to asymmetric if the consumption exceeds 1816 * the threshold. 1817 */ 1818 tb_configure_asym(tb, in, out, consumed_up, consumed_down); 1819 1820 /* Update the domain with the new bandwidth estimation */ 1821 tb_recalc_estimated_bandwidth(tb); 1822 1823 /* 1824 * In case of DP tunnel exists, change host router's 1st children 1825 * TMU mode to HiFi for CL0s to work. 1826 */ 1827 tb_increase_tmu_accuracy(tunnel); 1828 return true; 1829 1830 err_deactivate: 1831 tb_tunnel_deactivate(tunnel); 1832 err_free: 1833 tb_tunnel_free(tunnel); 1834 err_reclaim_usb: 1835 tb_reclaim_usb3_bandwidth(tb, in, out); 1836 err_detach_group: 1837 tb_detach_bandwidth_group(in); 1838 err_dealloc_dp: 1839 tb_switch_dealloc_dp_resource(in->sw, in); 1840 err_rpm_put: 1841 pm_runtime_mark_last_busy(&out->sw->dev); 1842 pm_runtime_put_autosuspend(&out->sw->dev); 1843 pm_runtime_mark_last_busy(&in->sw->dev); 1844 pm_runtime_put_autosuspend(&in->sw->dev); 1845 1846 return false; 1847 } 1848 1849 static void tb_tunnel_dp(struct tb *tb) 1850 { 1851 struct tb_cm *tcm = tb_priv(tb); 1852 struct tb_port *port, *in, *out; 1853 1854 if (!tb_acpi_may_tunnel_dp()) { 1855 tb_dbg(tb, "DP tunneling disabled, not creating tunnel\n"); 1856 return; 1857 } 1858 1859 /* 1860 * Find pair of inactive DP IN and DP OUT adapters and then 1861 * establish a DP tunnel between them. 1862 */ 1863 tb_dbg(tb, "looking for DP IN <-> DP OUT pairs:\n"); 1864 1865 in = NULL; 1866 out = NULL; 1867 list_for_each_entry(port, &tcm->dp_resources, list) { 1868 if (!tb_port_is_dpin(port)) 1869 continue; 1870 1871 if (tb_port_is_enabled(port)) { 1872 tb_port_dbg(port, "DP IN in use\n"); 1873 continue; 1874 } 1875 1876 in = port; 1877 tb_port_dbg(in, "DP IN available\n"); 1878 1879 out = tb_find_dp_out(tb, port); 1880 if (out) 1881 tb_tunnel_one_dp(tb, in, out); 1882 else 1883 tb_port_dbg(in, "no suitable DP OUT adapter available, not tunneling\n"); 1884 } 1885 1886 if (!in) 1887 tb_dbg(tb, "no suitable DP IN adapter available, not tunneling\n"); 1888 } 1889 1890 static void tb_enter_redrive(struct tb_port *port) 1891 { 1892 struct tb_switch *sw = port->sw; 1893 1894 if (!(sw->quirks & QUIRK_KEEP_POWER_IN_DP_REDRIVE)) 1895 return; 1896 1897 /* 1898 * If we get hot-unplug for the DP IN port of the host router 1899 * and the DP resource is not available anymore it means there 1900 * is a monitor connected directly to the Type-C port and we are 1901 * in "redrive" mode. For this to work we cannot enter RTD3 so 1902 * we bump up the runtime PM reference count here. 1903 */ 1904 if (!tb_port_is_dpin(port)) 1905 return; 1906 if (tb_route(sw)) 1907 return; 1908 if (!tb_switch_query_dp_resource(sw, port)) { 1909 port->redrive = true; 1910 pm_runtime_get(&sw->dev); 1911 tb_port_dbg(port, "enter redrive mode, keeping powered\n"); 1912 } 1913 } 1914 1915 static void tb_exit_redrive(struct tb_port *port) 1916 { 1917 struct tb_switch *sw = port->sw; 1918 1919 if (!(sw->quirks & QUIRK_KEEP_POWER_IN_DP_REDRIVE)) 1920 return; 1921 1922 if (!tb_port_is_dpin(port)) 1923 return; 1924 if (tb_route(sw)) 1925 return; 1926 if (port->redrive && tb_switch_query_dp_resource(sw, port)) { 1927 port->redrive = false; 1928 pm_runtime_put(&sw->dev); 1929 tb_port_dbg(port, "exit redrive mode\n"); 1930 } 1931 } 1932 1933 static void tb_dp_resource_unavailable(struct tb *tb, struct tb_port *port) 1934 { 1935 struct tb_port *in, *out; 1936 struct tb_tunnel *tunnel; 1937 1938 if (tb_port_is_dpin(port)) { 1939 tb_port_dbg(port, "DP IN resource unavailable\n"); 1940 in = port; 1941 out = NULL; 1942 } else { 1943 tb_port_dbg(port, "DP OUT resource unavailable\n"); 1944 in = NULL; 1945 out = port; 1946 } 1947 1948 tunnel = tb_find_tunnel(tb, TB_TUNNEL_DP, in, out); 1949 if (tunnel) 1950 tb_deactivate_and_free_tunnel(tunnel); 1951 else 1952 tb_enter_redrive(port); 1953 list_del_init(&port->list); 1954 1955 /* 1956 * See if there is another DP OUT port that can be used for 1957 * to create another tunnel. 1958 */ 1959 tb_recalc_estimated_bandwidth(tb); 1960 tb_tunnel_dp(tb); 1961 } 1962 1963 static void tb_dp_resource_available(struct tb *tb, struct tb_port *port) 1964 { 1965 struct tb_cm *tcm = tb_priv(tb); 1966 struct tb_port *p; 1967 1968 if (tb_port_is_enabled(port)) 1969 return; 1970 1971 list_for_each_entry(p, &tcm->dp_resources, list) { 1972 if (p == port) 1973 return; 1974 } 1975 1976 tb_port_dbg(port, "DP %s resource available\n", 1977 tb_port_is_dpin(port) ? "IN" : "OUT"); 1978 list_add_tail(&port->list, &tcm->dp_resources); 1979 tb_exit_redrive(port); 1980 1981 /* Look for suitable DP IN <-> DP OUT pairs now */ 1982 tb_tunnel_dp(tb); 1983 } 1984 1985 static void tb_disconnect_and_release_dp(struct tb *tb) 1986 { 1987 struct tb_cm *tcm = tb_priv(tb); 1988 struct tb_tunnel *tunnel, *n; 1989 1990 /* 1991 * Tear down all DP tunnels and release their resources. They 1992 * will be re-established after resume based on plug events. 1993 */ 1994 list_for_each_entry_safe_reverse(tunnel, n, &tcm->tunnel_list, list) { 1995 if (tb_tunnel_is_dp(tunnel)) 1996 tb_deactivate_and_free_tunnel(tunnel); 1997 } 1998 1999 while (!list_empty(&tcm->dp_resources)) { 2000 struct tb_port *port; 2001 2002 port = list_first_entry(&tcm->dp_resources, 2003 struct tb_port, list); 2004 list_del_init(&port->list); 2005 } 2006 } 2007 2008 static int tb_disconnect_pci(struct tb *tb, struct tb_switch *sw) 2009 { 2010 struct tb_tunnel *tunnel; 2011 struct tb_port *up; 2012 2013 up = tb_switch_find_port(sw, TB_TYPE_PCIE_UP); 2014 if (WARN_ON(!up)) 2015 return -ENODEV; 2016 2017 tunnel = tb_find_tunnel(tb, TB_TUNNEL_PCI, NULL, up); 2018 if (WARN_ON(!tunnel)) 2019 return -ENODEV; 2020 2021 tb_switch_xhci_disconnect(sw); 2022 2023 tb_tunnel_deactivate(tunnel); 2024 list_del(&tunnel->list); 2025 tb_tunnel_free(tunnel); 2026 return 0; 2027 } 2028 2029 static int tb_tunnel_pci(struct tb *tb, struct tb_switch *sw) 2030 { 2031 struct tb_port *up, *down, *port; 2032 struct tb_cm *tcm = tb_priv(tb); 2033 struct tb_tunnel *tunnel; 2034 2035 up = tb_switch_find_port(sw, TB_TYPE_PCIE_UP); 2036 if (!up) 2037 return 0; 2038 2039 /* 2040 * Look up available down port. Since we are chaining it should 2041 * be found right above this switch. 2042 */ 2043 port = tb_switch_downstream_port(sw); 2044 down = tb_find_pcie_down(tb_switch_parent(sw), port); 2045 if (!down) 2046 return 0; 2047 2048 tunnel = tb_tunnel_alloc_pci(tb, up, down); 2049 if (!tunnel) 2050 return -ENOMEM; 2051 2052 if (tb_tunnel_activate(tunnel)) { 2053 tb_port_info(up, 2054 "PCIe tunnel activation failed, aborting\n"); 2055 tb_tunnel_free(tunnel); 2056 return -EIO; 2057 } 2058 2059 /* 2060 * PCIe L1 is needed to enable CL0s for Titan Ridge so enable it 2061 * here. 2062 */ 2063 if (tb_switch_pcie_l1_enable(sw)) 2064 tb_sw_warn(sw, "failed to enable PCIe L1 for Titan Ridge\n"); 2065 2066 if (tb_switch_xhci_connect(sw)) 2067 tb_sw_warn(sw, "failed to connect xHCI\n"); 2068 2069 list_add_tail(&tunnel->list, &tcm->tunnel_list); 2070 return 0; 2071 } 2072 2073 static int tb_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd, 2074 int transmit_path, int transmit_ring, 2075 int receive_path, int receive_ring) 2076 { 2077 struct tb_cm *tcm = tb_priv(tb); 2078 struct tb_port *nhi_port, *dst_port; 2079 struct tb_tunnel *tunnel; 2080 struct tb_switch *sw; 2081 int ret; 2082 2083 sw = tb_to_switch(xd->dev.parent); 2084 dst_port = tb_port_at(xd->route, sw); 2085 nhi_port = tb_switch_find_port(tb->root_switch, TB_TYPE_NHI); 2086 2087 mutex_lock(&tb->lock); 2088 2089 /* 2090 * When tunneling DMA paths the link should not enter CL states 2091 * so disable them now. 2092 */ 2093 tb_disable_clx(sw); 2094 2095 tunnel = tb_tunnel_alloc_dma(tb, nhi_port, dst_port, transmit_path, 2096 transmit_ring, receive_path, receive_ring); 2097 if (!tunnel) { 2098 ret = -ENOMEM; 2099 goto err_clx; 2100 } 2101 2102 if (tb_tunnel_activate(tunnel)) { 2103 tb_port_info(nhi_port, 2104 "DMA tunnel activation failed, aborting\n"); 2105 ret = -EIO; 2106 goto err_free; 2107 } 2108 2109 list_add_tail(&tunnel->list, &tcm->tunnel_list); 2110 mutex_unlock(&tb->lock); 2111 return 0; 2112 2113 err_free: 2114 tb_tunnel_free(tunnel); 2115 err_clx: 2116 tb_enable_clx(sw); 2117 mutex_unlock(&tb->lock); 2118 2119 return ret; 2120 } 2121 2122 static void __tb_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd, 2123 int transmit_path, int transmit_ring, 2124 int receive_path, int receive_ring) 2125 { 2126 struct tb_cm *tcm = tb_priv(tb); 2127 struct tb_port *nhi_port, *dst_port; 2128 struct tb_tunnel *tunnel, *n; 2129 struct tb_switch *sw; 2130 2131 sw = tb_to_switch(xd->dev.parent); 2132 dst_port = tb_port_at(xd->route, sw); 2133 nhi_port = tb_switch_find_port(tb->root_switch, TB_TYPE_NHI); 2134 2135 list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list) { 2136 if (!tb_tunnel_is_dma(tunnel)) 2137 continue; 2138 if (tunnel->src_port != nhi_port || tunnel->dst_port != dst_port) 2139 continue; 2140 2141 if (tb_tunnel_match_dma(tunnel, transmit_path, transmit_ring, 2142 receive_path, receive_ring)) 2143 tb_deactivate_and_free_tunnel(tunnel); 2144 } 2145 2146 /* 2147 * Try to re-enable CL states now, it is OK if this fails 2148 * because we may still have another DMA tunnel active through 2149 * the same host router USB4 downstream port. 2150 */ 2151 tb_enable_clx(sw); 2152 } 2153 2154 static int tb_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd, 2155 int transmit_path, int transmit_ring, 2156 int receive_path, int receive_ring) 2157 { 2158 if (!xd->is_unplugged) { 2159 mutex_lock(&tb->lock); 2160 __tb_disconnect_xdomain_paths(tb, xd, transmit_path, 2161 transmit_ring, receive_path, 2162 receive_ring); 2163 mutex_unlock(&tb->lock); 2164 } 2165 return 0; 2166 } 2167 2168 /* hotplug handling */ 2169 2170 /* 2171 * tb_handle_hotplug() - handle hotplug event 2172 * 2173 * Executes on tb->wq. 2174 */ 2175 static void tb_handle_hotplug(struct work_struct *work) 2176 { 2177 struct tb_hotplug_event *ev = container_of(work, typeof(*ev), work); 2178 struct tb *tb = ev->tb; 2179 struct tb_cm *tcm = tb_priv(tb); 2180 struct tb_switch *sw; 2181 struct tb_port *port; 2182 2183 /* Bring the domain back from sleep if it was suspended */ 2184 pm_runtime_get_sync(&tb->dev); 2185 2186 mutex_lock(&tb->lock); 2187 if (!tcm->hotplug_active) 2188 goto out; /* during init, suspend or shutdown */ 2189 2190 sw = tb_switch_find_by_route(tb, ev->route); 2191 if (!sw) { 2192 tb_warn(tb, 2193 "hotplug event from non existent switch %llx:%x (unplug: %d)\n", 2194 ev->route, ev->port, ev->unplug); 2195 goto out; 2196 } 2197 if (ev->port > sw->config.max_port_number) { 2198 tb_warn(tb, 2199 "hotplug event from non existent port %llx:%x (unplug: %d)\n", 2200 ev->route, ev->port, ev->unplug); 2201 goto put_sw; 2202 } 2203 port = &sw->ports[ev->port]; 2204 if (tb_is_upstream_port(port)) { 2205 tb_dbg(tb, "hotplug event for upstream port %llx:%x (unplug: %d)\n", 2206 ev->route, ev->port, ev->unplug); 2207 goto put_sw; 2208 } 2209 2210 pm_runtime_get_sync(&sw->dev); 2211 2212 if (ev->unplug) { 2213 tb_retimer_remove_all(port); 2214 2215 if (tb_port_has_remote(port)) { 2216 tb_port_dbg(port, "switch unplugged\n"); 2217 tb_sw_set_unplugged(port->remote->sw); 2218 tb_free_invalid_tunnels(tb); 2219 tb_remove_dp_resources(port->remote->sw); 2220 tb_switch_tmu_disable(port->remote->sw); 2221 tb_switch_unconfigure_link(port->remote->sw); 2222 tb_switch_set_link_width(port->remote->sw, 2223 TB_LINK_WIDTH_SINGLE); 2224 tb_switch_remove(port->remote->sw); 2225 port->remote = NULL; 2226 if (port->dual_link_port) 2227 port->dual_link_port->remote = NULL; 2228 /* Maybe we can create another DP tunnel */ 2229 tb_recalc_estimated_bandwidth(tb); 2230 tb_tunnel_dp(tb); 2231 } else if (port->xdomain) { 2232 struct tb_xdomain *xd = tb_xdomain_get(port->xdomain); 2233 2234 tb_port_dbg(port, "xdomain unplugged\n"); 2235 /* 2236 * Service drivers are unbound during 2237 * tb_xdomain_remove() so setting XDomain as 2238 * unplugged here prevents deadlock if they call 2239 * tb_xdomain_disable_paths(). We will tear down 2240 * all the tunnels below. 2241 */ 2242 xd->is_unplugged = true; 2243 tb_xdomain_remove(xd); 2244 port->xdomain = NULL; 2245 __tb_disconnect_xdomain_paths(tb, xd, -1, -1, -1, -1); 2246 tb_xdomain_put(xd); 2247 tb_port_unconfigure_xdomain(port); 2248 } else if (tb_port_is_dpout(port) || tb_port_is_dpin(port)) { 2249 tb_dp_resource_unavailable(tb, port); 2250 } else if (!port->port) { 2251 tb_sw_dbg(sw, "xHCI disconnect request\n"); 2252 tb_switch_xhci_disconnect(sw); 2253 } else { 2254 tb_port_dbg(port, 2255 "got unplug event for disconnected port, ignoring\n"); 2256 } 2257 } else if (port->remote) { 2258 tb_port_dbg(port, "got plug event for connected port, ignoring\n"); 2259 } else if (!port->port && sw->authorized) { 2260 tb_sw_dbg(sw, "xHCI connect request\n"); 2261 tb_switch_xhci_connect(sw); 2262 } else { 2263 if (tb_port_is_null(port)) { 2264 tb_port_dbg(port, "hotplug: scanning\n"); 2265 tb_scan_port(port); 2266 if (!port->remote) 2267 tb_port_dbg(port, "hotplug: no switch found\n"); 2268 } else if (tb_port_is_dpout(port) || tb_port_is_dpin(port)) { 2269 tb_dp_resource_available(tb, port); 2270 } 2271 } 2272 2273 pm_runtime_mark_last_busy(&sw->dev); 2274 pm_runtime_put_autosuspend(&sw->dev); 2275 2276 put_sw: 2277 tb_switch_put(sw); 2278 out: 2279 mutex_unlock(&tb->lock); 2280 2281 pm_runtime_mark_last_busy(&tb->dev); 2282 pm_runtime_put_autosuspend(&tb->dev); 2283 2284 kfree(ev); 2285 } 2286 2287 static int tb_alloc_dp_bandwidth(struct tb_tunnel *tunnel, int *requested_up, 2288 int *requested_down) 2289 { 2290 int allocated_up, allocated_down, available_up, available_down, ret; 2291 int requested_up_corrected, requested_down_corrected, granularity; 2292 int max_up, max_down, max_up_rounded, max_down_rounded; 2293 struct tb *tb = tunnel->tb; 2294 struct tb_port *in, *out; 2295 2296 ret = tb_tunnel_allocated_bandwidth(tunnel, &allocated_up, &allocated_down); 2297 if (ret) 2298 return ret; 2299 2300 in = tunnel->src_port; 2301 out = tunnel->dst_port; 2302 2303 tb_port_dbg(in, "bandwidth allocated currently %d/%d Mb/s\n", 2304 allocated_up, allocated_down); 2305 2306 /* 2307 * If we get rounded up request from graphics side, say HBR2 x 4 2308 * that is 17500 instead of 17280 (this is because of the 2309 * granularity), we allow it too. Here the graphics has already 2310 * negotiated with the DPRX the maximum possible rates (which is 2311 * 17280 in this case). 2312 * 2313 * Since the link cannot go higher than 17280 we use that in our 2314 * calculations but the DP IN adapter Allocated BW write must be 2315 * the same value (17500) otherwise the adapter will mark it as 2316 * failed for graphics. 2317 */ 2318 ret = tb_tunnel_maximum_bandwidth(tunnel, &max_up, &max_down); 2319 if (ret) 2320 return ret; 2321 2322 ret = usb4_dp_port_granularity(in); 2323 if (ret < 0) 2324 return ret; 2325 granularity = ret; 2326 2327 max_up_rounded = roundup(max_up, granularity); 2328 max_down_rounded = roundup(max_down, granularity); 2329 2330 /* 2331 * This will "fix" the request down to the maximum supported 2332 * rate * lanes if it is at the maximum rounded up level. 2333 */ 2334 requested_up_corrected = *requested_up; 2335 if (requested_up_corrected == max_up_rounded) 2336 requested_up_corrected = max_up; 2337 else if (requested_up_corrected < 0) 2338 requested_up_corrected = 0; 2339 requested_down_corrected = *requested_down; 2340 if (requested_down_corrected == max_down_rounded) 2341 requested_down_corrected = max_down; 2342 else if (requested_down_corrected < 0) 2343 requested_down_corrected = 0; 2344 2345 tb_port_dbg(in, "corrected bandwidth request %d/%d Mb/s\n", 2346 requested_up_corrected, requested_down_corrected); 2347 2348 if ((*requested_up >= 0 && requested_up_corrected > max_up_rounded) || 2349 (*requested_down >= 0 && requested_down_corrected > max_down_rounded)) { 2350 tb_port_dbg(in, "bandwidth request too high (%d/%d Mb/s > %d/%d Mb/s)\n", 2351 requested_up_corrected, requested_down_corrected, 2352 max_up_rounded, max_down_rounded); 2353 return -ENOBUFS; 2354 } 2355 2356 if ((*requested_up >= 0 && requested_up_corrected <= allocated_up) || 2357 (*requested_down >= 0 && requested_down_corrected <= allocated_down)) { 2358 /* 2359 * If bandwidth on a link is < asym_threshold transition 2360 * the link to symmetric. 2361 */ 2362 tb_configure_sym(tb, in, out, *requested_up, *requested_down); 2363 /* 2364 * If requested bandwidth is less or equal than what is 2365 * currently allocated to that tunnel we simply change 2366 * the reservation of the tunnel. Since all the tunnels 2367 * going out from the same USB4 port are in the same 2368 * group the released bandwidth will be taken into 2369 * account for the other tunnels automatically below. 2370 */ 2371 return tb_tunnel_alloc_bandwidth(tunnel, requested_up, 2372 requested_down); 2373 } 2374 2375 /* 2376 * More bandwidth is requested. Release all the potential 2377 * bandwidth from USB3 first. 2378 */ 2379 ret = tb_release_unused_usb3_bandwidth(tb, in, out); 2380 if (ret) 2381 return ret; 2382 2383 /* 2384 * Then go over all tunnels that cross the same USB4 ports (they 2385 * are also in the same group but we use the same function here 2386 * that we use with the normal bandwidth allocation). 2387 */ 2388 ret = tb_available_bandwidth(tb, in, out, &available_up, &available_down, 2389 true); 2390 if (ret) 2391 goto reclaim; 2392 2393 tb_port_dbg(in, "bandwidth available for allocation %d/%d Mb/s\n", 2394 available_up, available_down); 2395 2396 if ((*requested_up >= 0 && available_up >= requested_up_corrected) || 2397 (*requested_down >= 0 && available_down >= requested_down_corrected)) { 2398 /* 2399 * If bandwidth on a link is >= asym_threshold 2400 * transition the link to asymmetric. 2401 */ 2402 ret = tb_configure_asym(tb, in, out, *requested_up, 2403 *requested_down); 2404 if (ret) { 2405 tb_configure_sym(tb, in, out, 0, 0); 2406 return ret; 2407 } 2408 2409 ret = tb_tunnel_alloc_bandwidth(tunnel, requested_up, 2410 requested_down); 2411 if (ret) { 2412 tb_tunnel_warn(tunnel, "failed to allocate bandwidth\n"); 2413 tb_configure_sym(tb, in, out, 0, 0); 2414 } 2415 } else { 2416 ret = -ENOBUFS; 2417 } 2418 2419 reclaim: 2420 tb_reclaim_usb3_bandwidth(tb, in, out); 2421 return ret; 2422 } 2423 2424 static void tb_handle_dp_bandwidth_request(struct work_struct *work) 2425 { 2426 struct tb_hotplug_event *ev = container_of(work, typeof(*ev), work); 2427 int requested_bw, requested_up, requested_down, ret; 2428 struct tb_port *in, *out; 2429 struct tb_tunnel *tunnel; 2430 struct tb *tb = ev->tb; 2431 struct tb_cm *tcm = tb_priv(tb); 2432 struct tb_switch *sw; 2433 2434 pm_runtime_get_sync(&tb->dev); 2435 2436 mutex_lock(&tb->lock); 2437 if (!tcm->hotplug_active) 2438 goto unlock; 2439 2440 sw = tb_switch_find_by_route(tb, ev->route); 2441 if (!sw) { 2442 tb_warn(tb, "bandwidth request from non-existent router %llx\n", 2443 ev->route); 2444 goto unlock; 2445 } 2446 2447 in = &sw->ports[ev->port]; 2448 if (!tb_port_is_dpin(in)) { 2449 tb_port_warn(in, "bandwidth request to non-DP IN adapter\n"); 2450 goto put_sw; 2451 } 2452 2453 tb_port_dbg(in, "handling bandwidth allocation request\n"); 2454 2455 if (!usb4_dp_port_bandwidth_mode_enabled(in)) { 2456 tb_port_warn(in, "bandwidth allocation mode not enabled\n"); 2457 goto put_sw; 2458 } 2459 2460 ret = usb4_dp_port_requested_bandwidth(in); 2461 if (ret < 0) { 2462 if (ret == -ENODATA) 2463 tb_port_dbg(in, "no bandwidth request active\n"); 2464 else 2465 tb_port_warn(in, "failed to read requested bandwidth\n"); 2466 goto put_sw; 2467 } 2468 requested_bw = ret; 2469 2470 tb_port_dbg(in, "requested bandwidth %d Mb/s\n", requested_bw); 2471 2472 tunnel = tb_find_tunnel(tb, TB_TUNNEL_DP, in, NULL); 2473 if (!tunnel) { 2474 tb_port_warn(in, "failed to find tunnel\n"); 2475 goto put_sw; 2476 } 2477 2478 out = tunnel->dst_port; 2479 2480 if (tb_port_path_direction_downstream(in, out)) { 2481 requested_up = -1; 2482 requested_down = requested_bw; 2483 } else { 2484 requested_up = requested_bw; 2485 requested_down = -1; 2486 } 2487 2488 ret = tb_alloc_dp_bandwidth(tunnel, &requested_up, &requested_down); 2489 if (ret) { 2490 if (ret == -ENOBUFS) 2491 tb_port_warn(in, "not enough bandwidth available\n"); 2492 else 2493 tb_port_warn(in, "failed to change bandwidth allocation\n"); 2494 } else { 2495 tb_port_dbg(in, "bandwidth allocation changed to %d/%d Mb/s\n", 2496 requested_up, requested_down); 2497 2498 /* Update other clients about the allocation change */ 2499 tb_recalc_estimated_bandwidth(tb); 2500 } 2501 2502 put_sw: 2503 tb_switch_put(sw); 2504 unlock: 2505 mutex_unlock(&tb->lock); 2506 2507 pm_runtime_mark_last_busy(&tb->dev); 2508 pm_runtime_put_autosuspend(&tb->dev); 2509 2510 kfree(ev); 2511 } 2512 2513 static void tb_queue_dp_bandwidth_request(struct tb *tb, u64 route, u8 port) 2514 { 2515 struct tb_hotplug_event *ev; 2516 2517 ev = kmalloc(sizeof(*ev), GFP_KERNEL); 2518 if (!ev) 2519 return; 2520 2521 ev->tb = tb; 2522 ev->route = route; 2523 ev->port = port; 2524 INIT_WORK(&ev->work, tb_handle_dp_bandwidth_request); 2525 queue_work(tb->wq, &ev->work); 2526 } 2527 2528 static void tb_handle_notification(struct tb *tb, u64 route, 2529 const struct cfg_error_pkg *error) 2530 { 2531 2532 switch (error->error) { 2533 case TB_CFG_ERROR_PCIE_WAKE: 2534 case TB_CFG_ERROR_DP_CON_CHANGE: 2535 case TB_CFG_ERROR_DPTX_DISCOVERY: 2536 if (tb_cfg_ack_notification(tb->ctl, route, error)) 2537 tb_warn(tb, "could not ack notification on %llx\n", 2538 route); 2539 break; 2540 2541 case TB_CFG_ERROR_DP_BW: 2542 if (tb_cfg_ack_notification(tb->ctl, route, error)) 2543 tb_warn(tb, "could not ack notification on %llx\n", 2544 route); 2545 tb_queue_dp_bandwidth_request(tb, route, error->port); 2546 break; 2547 2548 default: 2549 /* Ignore for now */ 2550 break; 2551 } 2552 } 2553 2554 /* 2555 * tb_schedule_hotplug_handler() - callback function for the control channel 2556 * 2557 * Delegates to tb_handle_hotplug. 2558 */ 2559 static void tb_handle_event(struct tb *tb, enum tb_cfg_pkg_type type, 2560 const void *buf, size_t size) 2561 { 2562 const struct cfg_event_pkg *pkg = buf; 2563 u64 route = tb_cfg_get_route(&pkg->header); 2564 2565 switch (type) { 2566 case TB_CFG_PKG_ERROR: 2567 tb_handle_notification(tb, route, (const struct cfg_error_pkg *)buf); 2568 return; 2569 case TB_CFG_PKG_EVENT: 2570 break; 2571 default: 2572 tb_warn(tb, "unexpected event %#x, ignoring\n", type); 2573 return; 2574 } 2575 2576 if (tb_cfg_ack_plug(tb->ctl, route, pkg->port, pkg->unplug)) { 2577 tb_warn(tb, "could not ack plug event on %llx:%x\n", route, 2578 pkg->port); 2579 } 2580 2581 tb_queue_hotplug(tb, route, pkg->port, pkg->unplug); 2582 } 2583 2584 static void tb_stop(struct tb *tb) 2585 { 2586 struct tb_cm *tcm = tb_priv(tb); 2587 struct tb_tunnel *tunnel; 2588 struct tb_tunnel *n; 2589 2590 cancel_delayed_work(&tcm->remove_work); 2591 /* tunnels are only present after everything has been initialized */ 2592 list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list) { 2593 /* 2594 * DMA tunnels require the driver to be functional so we 2595 * tear them down. Other protocol tunnels can be left 2596 * intact. 2597 */ 2598 if (tb_tunnel_is_dma(tunnel)) 2599 tb_tunnel_deactivate(tunnel); 2600 tb_tunnel_free(tunnel); 2601 } 2602 tb_switch_remove(tb->root_switch); 2603 tcm->hotplug_active = false; /* signal tb_handle_hotplug to quit */ 2604 } 2605 2606 static int tb_scan_finalize_switch(struct device *dev, void *data) 2607 { 2608 if (tb_is_switch(dev)) { 2609 struct tb_switch *sw = tb_to_switch(dev); 2610 2611 /* 2612 * If we found that the switch was already setup by the 2613 * boot firmware, mark it as authorized now before we 2614 * send uevent to userspace. 2615 */ 2616 if (sw->boot) 2617 sw->authorized = 1; 2618 2619 dev_set_uevent_suppress(dev, false); 2620 kobject_uevent(&dev->kobj, KOBJ_ADD); 2621 device_for_each_child(dev, NULL, tb_scan_finalize_switch); 2622 } 2623 2624 return 0; 2625 } 2626 2627 static int tb_start(struct tb *tb, bool reset) 2628 { 2629 struct tb_cm *tcm = tb_priv(tb); 2630 int ret; 2631 2632 tb->root_switch = tb_switch_alloc(tb, &tb->dev, 0); 2633 if (IS_ERR(tb->root_switch)) 2634 return PTR_ERR(tb->root_switch); 2635 2636 /* 2637 * ICM firmware upgrade needs running firmware and in native 2638 * mode that is not available so disable firmware upgrade of the 2639 * root switch. 2640 * 2641 * However, USB4 routers support NVM firmware upgrade if they 2642 * implement the necessary router operations. 2643 */ 2644 tb->root_switch->no_nvm_upgrade = !tb_switch_is_usb4(tb->root_switch); 2645 /* All USB4 routers support runtime PM */ 2646 tb->root_switch->rpm = tb_switch_is_usb4(tb->root_switch); 2647 2648 ret = tb_switch_configure(tb->root_switch); 2649 if (ret) { 2650 tb_switch_put(tb->root_switch); 2651 return ret; 2652 } 2653 2654 /* Announce the switch to the world */ 2655 ret = tb_switch_add(tb->root_switch); 2656 if (ret) { 2657 tb_switch_put(tb->root_switch); 2658 return ret; 2659 } 2660 2661 /* 2662 * To support highest CLx state, we set host router's TMU to 2663 * Normal mode. 2664 */ 2665 tb_switch_tmu_configure(tb->root_switch, TB_SWITCH_TMU_MODE_LOWRES); 2666 /* Enable TMU if it is off */ 2667 tb_switch_tmu_enable(tb->root_switch); 2668 2669 /* 2670 * Boot firmware might have created tunnels of its own. Since we 2671 * cannot be sure they are usable for us, tear them down and 2672 * reset the ports to handle it as new hotplug for USB4 v1 2673 * routers (for USB4 v2 and beyond we already do host reset). 2674 */ 2675 if (reset && usb4_switch_version(tb->root_switch) == 1) { 2676 tb_switch_reset(tb->root_switch); 2677 } else { 2678 /* Full scan to discover devices added before the driver was loaded. */ 2679 tb_scan_switch(tb->root_switch); 2680 /* Find out tunnels created by the boot firmware */ 2681 tb_discover_tunnels(tb); 2682 /* Add DP resources from the DP tunnels created by the boot firmware */ 2683 tb_discover_dp_resources(tb); 2684 } 2685 2686 /* 2687 * If the boot firmware did not create USB 3.x tunnels create them 2688 * now for the whole topology. 2689 */ 2690 tb_create_usb3_tunnels(tb->root_switch); 2691 /* Add DP IN resources for the root switch */ 2692 tb_add_dp_resources(tb->root_switch); 2693 /* Make the discovered switches available to the userspace */ 2694 device_for_each_child(&tb->root_switch->dev, NULL, 2695 tb_scan_finalize_switch); 2696 2697 /* Allow tb_handle_hotplug to progress events */ 2698 tcm->hotplug_active = true; 2699 return 0; 2700 } 2701 2702 static int tb_suspend_noirq(struct tb *tb) 2703 { 2704 struct tb_cm *tcm = tb_priv(tb); 2705 2706 tb_dbg(tb, "suspending...\n"); 2707 tb_disconnect_and_release_dp(tb); 2708 tb_switch_suspend(tb->root_switch, false); 2709 tcm->hotplug_active = false; /* signal tb_handle_hotplug to quit */ 2710 tb_dbg(tb, "suspend finished\n"); 2711 2712 return 0; 2713 } 2714 2715 static void tb_restore_children(struct tb_switch *sw) 2716 { 2717 struct tb_port *port; 2718 2719 /* No need to restore if the router is already unplugged */ 2720 if (sw->is_unplugged) 2721 return; 2722 2723 if (tb_enable_clx(sw)) 2724 tb_sw_warn(sw, "failed to re-enable CL states\n"); 2725 2726 if (tb_enable_tmu(sw)) 2727 tb_sw_warn(sw, "failed to restore TMU configuration\n"); 2728 2729 tb_switch_configuration_valid(sw); 2730 2731 tb_switch_for_each_port(sw, port) { 2732 if (!tb_port_has_remote(port) && !port->xdomain) 2733 continue; 2734 2735 if (port->remote) { 2736 tb_switch_set_link_width(port->remote->sw, 2737 port->remote->sw->link_width); 2738 tb_switch_configure_link(port->remote->sw); 2739 2740 tb_restore_children(port->remote->sw); 2741 } else if (port->xdomain) { 2742 tb_port_configure_xdomain(port, port->xdomain); 2743 } 2744 } 2745 } 2746 2747 static int tb_resume_noirq(struct tb *tb) 2748 { 2749 struct tb_cm *tcm = tb_priv(tb); 2750 struct tb_tunnel *tunnel, *n; 2751 unsigned int usb3_delay = 0; 2752 LIST_HEAD(tunnels); 2753 2754 tb_dbg(tb, "resuming...\n"); 2755 2756 /* 2757 * For non-USB4 hosts (Apple systems) remove any PCIe devices 2758 * the firmware might have setup. 2759 */ 2760 if (!tb_switch_is_usb4(tb->root_switch)) 2761 tb_switch_reset(tb->root_switch); 2762 2763 tb_switch_resume(tb->root_switch, false); 2764 tb_free_invalid_tunnels(tb); 2765 tb_free_unplugged_children(tb->root_switch); 2766 tb_restore_children(tb->root_switch); 2767 2768 /* 2769 * If we get here from suspend to disk the boot firmware or the 2770 * restore kernel might have created tunnels of its own. Since 2771 * we cannot be sure they are usable for us we find and tear 2772 * them down. 2773 */ 2774 tb_switch_discover_tunnels(tb->root_switch, &tunnels, false); 2775 list_for_each_entry_safe_reverse(tunnel, n, &tunnels, list) { 2776 if (tb_tunnel_is_usb3(tunnel)) 2777 usb3_delay = 500; 2778 tb_tunnel_deactivate(tunnel); 2779 tb_tunnel_free(tunnel); 2780 } 2781 2782 /* Re-create our tunnels now */ 2783 list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list) { 2784 /* USB3 requires delay before it can be re-activated */ 2785 if (tb_tunnel_is_usb3(tunnel)) { 2786 msleep(usb3_delay); 2787 /* Only need to do it once */ 2788 usb3_delay = 0; 2789 } 2790 tb_tunnel_restart(tunnel); 2791 } 2792 if (!list_empty(&tcm->tunnel_list)) { 2793 /* 2794 * the pcie links need some time to get going. 2795 * 100ms works for me... 2796 */ 2797 tb_dbg(tb, "tunnels restarted, sleeping for 100ms\n"); 2798 msleep(100); 2799 } 2800 /* Allow tb_handle_hotplug to progress events */ 2801 tcm->hotplug_active = true; 2802 tb_dbg(tb, "resume finished\n"); 2803 2804 return 0; 2805 } 2806 2807 static int tb_free_unplugged_xdomains(struct tb_switch *sw) 2808 { 2809 struct tb_port *port; 2810 int ret = 0; 2811 2812 tb_switch_for_each_port(sw, port) { 2813 if (tb_is_upstream_port(port)) 2814 continue; 2815 if (port->xdomain && port->xdomain->is_unplugged) { 2816 tb_retimer_remove_all(port); 2817 tb_xdomain_remove(port->xdomain); 2818 tb_port_unconfigure_xdomain(port); 2819 port->xdomain = NULL; 2820 ret++; 2821 } else if (port->remote) { 2822 ret += tb_free_unplugged_xdomains(port->remote->sw); 2823 } 2824 } 2825 2826 return ret; 2827 } 2828 2829 static int tb_freeze_noirq(struct tb *tb) 2830 { 2831 struct tb_cm *tcm = tb_priv(tb); 2832 2833 tcm->hotplug_active = false; 2834 return 0; 2835 } 2836 2837 static int tb_thaw_noirq(struct tb *tb) 2838 { 2839 struct tb_cm *tcm = tb_priv(tb); 2840 2841 tcm->hotplug_active = true; 2842 return 0; 2843 } 2844 2845 static void tb_complete(struct tb *tb) 2846 { 2847 /* 2848 * Release any unplugged XDomains and if there is a case where 2849 * another domain is swapped in place of unplugged XDomain we 2850 * need to run another rescan. 2851 */ 2852 mutex_lock(&tb->lock); 2853 if (tb_free_unplugged_xdomains(tb->root_switch)) 2854 tb_scan_switch(tb->root_switch); 2855 mutex_unlock(&tb->lock); 2856 } 2857 2858 static int tb_runtime_suspend(struct tb *tb) 2859 { 2860 struct tb_cm *tcm = tb_priv(tb); 2861 2862 mutex_lock(&tb->lock); 2863 tb_switch_suspend(tb->root_switch, true); 2864 tcm->hotplug_active = false; 2865 mutex_unlock(&tb->lock); 2866 2867 return 0; 2868 } 2869 2870 static void tb_remove_work(struct work_struct *work) 2871 { 2872 struct tb_cm *tcm = container_of(work, struct tb_cm, remove_work.work); 2873 struct tb *tb = tcm_to_tb(tcm); 2874 2875 mutex_lock(&tb->lock); 2876 if (tb->root_switch) { 2877 tb_free_unplugged_children(tb->root_switch); 2878 tb_free_unplugged_xdomains(tb->root_switch); 2879 } 2880 mutex_unlock(&tb->lock); 2881 } 2882 2883 static int tb_runtime_resume(struct tb *tb) 2884 { 2885 struct tb_cm *tcm = tb_priv(tb); 2886 struct tb_tunnel *tunnel, *n; 2887 2888 mutex_lock(&tb->lock); 2889 tb_switch_resume(tb->root_switch, true); 2890 tb_free_invalid_tunnels(tb); 2891 tb_restore_children(tb->root_switch); 2892 list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list) 2893 tb_tunnel_restart(tunnel); 2894 tcm->hotplug_active = true; 2895 mutex_unlock(&tb->lock); 2896 2897 /* 2898 * Schedule cleanup of any unplugged devices. Run this in a 2899 * separate thread to avoid possible deadlock if the device 2900 * removal runtime resumes the unplugged device. 2901 */ 2902 queue_delayed_work(tb->wq, &tcm->remove_work, msecs_to_jiffies(50)); 2903 return 0; 2904 } 2905 2906 static const struct tb_cm_ops tb_cm_ops = { 2907 .start = tb_start, 2908 .stop = tb_stop, 2909 .suspend_noirq = tb_suspend_noirq, 2910 .resume_noirq = tb_resume_noirq, 2911 .freeze_noirq = tb_freeze_noirq, 2912 .thaw_noirq = tb_thaw_noirq, 2913 .complete = tb_complete, 2914 .runtime_suspend = tb_runtime_suspend, 2915 .runtime_resume = tb_runtime_resume, 2916 .handle_event = tb_handle_event, 2917 .disapprove_switch = tb_disconnect_pci, 2918 .approve_switch = tb_tunnel_pci, 2919 .approve_xdomain_paths = tb_approve_xdomain_paths, 2920 .disconnect_xdomain_paths = tb_disconnect_xdomain_paths, 2921 }; 2922 2923 /* 2924 * During suspend the Thunderbolt controller is reset and all PCIe 2925 * tunnels are lost. The NHI driver will try to reestablish all tunnels 2926 * during resume. This adds device links between the tunneled PCIe 2927 * downstream ports and the NHI so that the device core will make sure 2928 * NHI is resumed first before the rest. 2929 */ 2930 static bool tb_apple_add_links(struct tb_nhi *nhi) 2931 { 2932 struct pci_dev *upstream, *pdev; 2933 bool ret; 2934 2935 if (!x86_apple_machine) 2936 return false; 2937 2938 switch (nhi->pdev->device) { 2939 case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: 2940 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: 2941 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI: 2942 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI: 2943 break; 2944 default: 2945 return false; 2946 } 2947 2948 upstream = pci_upstream_bridge(nhi->pdev); 2949 while (upstream) { 2950 if (!pci_is_pcie(upstream)) 2951 return false; 2952 if (pci_pcie_type(upstream) == PCI_EXP_TYPE_UPSTREAM) 2953 break; 2954 upstream = pci_upstream_bridge(upstream); 2955 } 2956 2957 if (!upstream) 2958 return false; 2959 2960 /* 2961 * For each hotplug downstream port, create add device link 2962 * back to NHI so that PCIe tunnels can be re-established after 2963 * sleep. 2964 */ 2965 ret = false; 2966 for_each_pci_bridge(pdev, upstream->subordinate) { 2967 const struct device_link *link; 2968 2969 if (!pci_is_pcie(pdev)) 2970 continue; 2971 if (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM || 2972 !pdev->is_hotplug_bridge) 2973 continue; 2974 2975 link = device_link_add(&pdev->dev, &nhi->pdev->dev, 2976 DL_FLAG_AUTOREMOVE_SUPPLIER | 2977 DL_FLAG_PM_RUNTIME); 2978 if (link) { 2979 dev_dbg(&nhi->pdev->dev, "created link from %s\n", 2980 dev_name(&pdev->dev)); 2981 ret = true; 2982 } else { 2983 dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n", 2984 dev_name(&pdev->dev)); 2985 } 2986 } 2987 2988 return ret; 2989 } 2990 2991 struct tb *tb_probe(struct tb_nhi *nhi) 2992 { 2993 struct tb_cm *tcm; 2994 struct tb *tb; 2995 2996 tb = tb_domain_alloc(nhi, TB_TIMEOUT, sizeof(*tcm)); 2997 if (!tb) 2998 return NULL; 2999 3000 if (tb_acpi_may_tunnel_pcie()) 3001 tb->security_level = TB_SECURITY_USER; 3002 else 3003 tb->security_level = TB_SECURITY_NOPCIE; 3004 3005 tb->cm_ops = &tb_cm_ops; 3006 3007 tcm = tb_priv(tb); 3008 INIT_LIST_HEAD(&tcm->tunnel_list); 3009 INIT_LIST_HEAD(&tcm->dp_resources); 3010 INIT_DELAYED_WORK(&tcm->remove_work, tb_remove_work); 3011 tb_init_bandwidth_groups(tcm); 3012 3013 tb_dbg(tb, "using software connection manager\n"); 3014 3015 /* 3016 * Device links are needed to make sure we establish tunnels 3017 * before the PCIe/USB stack is resumed so complain here if we 3018 * found them missing. 3019 */ 3020 if (!tb_apple_add_links(nhi) && !tb_acpi_add_links(nhi)) 3021 tb_warn(tb, "device links to tunneled native ports are missing!\n"); 3022 3023 return tb; 3024 } 3025