1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Thunderbolt driver - NHI driver 4 * 5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> 6 * Copyright (C) 2018, Intel Corporation 7 */ 8 9 #ifndef DSL3510_H_ 10 #define DSL3510_H_ 11 12 #include <linux/thunderbolt.h> 13 14 enum nhi_fw_mode { 15 NHI_FW_SAFE_MODE, 16 NHI_FW_AUTH_MODE, 17 NHI_FW_EP_MODE, 18 NHI_FW_CM_MODE, 19 }; 20 21 enum nhi_mailbox_cmd { 22 NHI_MAILBOX_SAVE_DEVS = 0x05, 23 NHI_MAILBOX_DISCONNECT_PCIE_PATHS = 0x06, 24 NHI_MAILBOX_DRV_UNLOADS = 0x07, 25 NHI_MAILBOX_DISCONNECT_PA = 0x10, 26 NHI_MAILBOX_DISCONNECT_PB = 0x11, 27 NHI_MAILBOX_ALLOW_ALL_DEVS = 0x23, 28 }; 29 30 int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data); 31 enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi); 32 33 /* 34 * PCI IDs used in this driver from Win Ridge forward. There is no 35 * need for the PCI quirk anymore as we will use ICM also on Apple 36 * hardware. 37 */ 38 #define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_NHI 0x157d 39 #define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE 0x157e 40 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI 0x15bf 41 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE 0x15c0 42 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI 0x15d2 43 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE 0x15d3 44 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI 0x15d9 45 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE 0x15da 46 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI 0x15dc 47 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI 0x15dd 48 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI 0x15de 49 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE 0x15e7 50 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI 0x15e8 51 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE 0x15ea 52 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI 0x15eb 53 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE 0x15ef 54 55 #endif 56