1 /* 2 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 15 #include <linux/module.h> 16 #include <linux/platform_device.h> 17 18 #include <dt-bindings/thermal/tegra124-soctherm.h> 19 20 #include "soctherm.h" 21 22 #define TEGRA132_THERMTRIP_ANY_EN_MASK (0x1 << 28) 23 #define TEGRA132_THERMTRIP_MEM_EN_MASK (0x1 << 27) 24 #define TEGRA132_THERMTRIP_GPU_EN_MASK (0x1 << 26) 25 #define TEGRA132_THERMTRIP_CPU_EN_MASK (0x1 << 25) 26 #define TEGRA132_THERMTRIP_TSENSE_EN_MASK (0x1 << 24) 27 #define TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK (0xff << 16) 28 #define TEGRA132_THERMTRIP_CPU_THRESH_MASK (0xff << 8) 29 #define TEGRA132_THERMTRIP_TSENSE_THRESH_MASK 0xff 30 31 #define TEGRA132_THRESH_GRAIN 1000 32 33 static const struct tegra_tsensor_configuration tegra132_tsensor_config = { 34 .tall = 16300, 35 .tiddq_en = 1, 36 .ten_count = 1, 37 .tsample = 120, 38 .tsample_ate = 480, 39 }; 40 41 static const struct tegra_tsensor_group tegra132_tsensor_group_cpu = { 42 .id = TEGRA124_SOCTHERM_SENSOR_CPU, 43 .name = "cpu", 44 .sensor_temp_offset = SENSOR_TEMP1, 45 .sensor_temp_mask = SENSOR_TEMP1_CPU_TEMP_MASK, 46 .pdiv = 8, 47 .pdiv_ate = 8, 48 .pdiv_mask = SENSOR_PDIV_CPU_MASK, 49 .pllx_hotspot_diff = 10, 50 .pllx_hotspot_mask = SENSOR_HOTSPOT_CPU_MASK, 51 .thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK, 52 .thermtrip_enable_mask = TEGRA132_THERMTRIP_CPU_EN_MASK, 53 .thermtrip_threshold_mask = TEGRA132_THERMTRIP_CPU_THRESH_MASK, 54 }; 55 56 static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = { 57 .id = TEGRA124_SOCTHERM_SENSOR_GPU, 58 .name = "gpu", 59 .sensor_temp_offset = SENSOR_TEMP1, 60 .sensor_temp_mask = SENSOR_TEMP1_GPU_TEMP_MASK, 61 .pdiv = 8, 62 .pdiv_ate = 8, 63 .pdiv_mask = SENSOR_PDIV_GPU_MASK, 64 .pllx_hotspot_diff = 5, 65 .pllx_hotspot_mask = SENSOR_HOTSPOT_GPU_MASK, 66 .thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK, 67 .thermtrip_enable_mask = TEGRA132_THERMTRIP_GPU_EN_MASK, 68 .thermtrip_threshold_mask = TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK, 69 }; 70 71 static const struct tegra_tsensor_group tegra132_tsensor_group_pll = { 72 .id = TEGRA124_SOCTHERM_SENSOR_PLLX, 73 .name = "pll", 74 .sensor_temp_offset = SENSOR_TEMP2, 75 .sensor_temp_mask = SENSOR_TEMP2_PLLX_TEMP_MASK, 76 .pdiv = 8, 77 .pdiv_ate = 8, 78 .pdiv_mask = SENSOR_PDIV_PLLX_MASK, 79 .thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK, 80 .thermtrip_enable_mask = TEGRA132_THERMTRIP_TSENSE_EN_MASK, 81 .thermtrip_threshold_mask = TEGRA132_THERMTRIP_TSENSE_THRESH_MASK, 82 }; 83 84 static const struct tegra_tsensor_group tegra132_tsensor_group_mem = { 85 .id = TEGRA124_SOCTHERM_SENSOR_MEM, 86 .name = "mem", 87 .sensor_temp_offset = SENSOR_TEMP2, 88 .sensor_temp_mask = SENSOR_TEMP2_MEM_TEMP_MASK, 89 .pdiv = 8, 90 .pdiv_ate = 8, 91 .pdiv_mask = SENSOR_PDIV_MEM_MASK, 92 .pllx_hotspot_diff = 0, 93 .pllx_hotspot_mask = SENSOR_HOTSPOT_MEM_MASK, 94 .thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK, 95 .thermtrip_enable_mask = TEGRA132_THERMTRIP_MEM_EN_MASK, 96 .thermtrip_threshold_mask = TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK, 97 }; 98 99 static const struct tegra_tsensor_group *tegra132_tsensor_groups[] = { 100 &tegra132_tsensor_group_cpu, 101 &tegra132_tsensor_group_gpu, 102 &tegra132_tsensor_group_pll, 103 &tegra132_tsensor_group_mem, 104 }; 105 106 static struct tegra_tsensor tegra132_tsensors[] = { 107 { 108 .name = "cpu0", 109 .base = 0xc0, 110 .config = &tegra132_tsensor_config, 111 .calib_fuse_offset = 0x098, 112 .fuse_corr_alpha = 1126600, 113 .fuse_corr_beta = -9433500, 114 .group = &tegra132_tsensor_group_cpu, 115 }, { 116 .name = "cpu1", 117 .base = 0xe0, 118 .config = &tegra132_tsensor_config, 119 .calib_fuse_offset = 0x084, 120 .fuse_corr_alpha = 1110800, 121 .fuse_corr_beta = -7383000, 122 .group = &tegra132_tsensor_group_cpu, 123 }, { 124 .name = "cpu2", 125 .base = 0x100, 126 .config = &tegra132_tsensor_config, 127 .calib_fuse_offset = 0x088, 128 .fuse_corr_alpha = 1113800, 129 .fuse_corr_beta = -6215200, 130 .group = &tegra132_tsensor_group_cpu, 131 }, { 132 .name = "cpu3", 133 .base = 0x120, 134 .config = &tegra132_tsensor_config, 135 .calib_fuse_offset = 0x12c, 136 .fuse_corr_alpha = 1129600, 137 .fuse_corr_beta = -8196100, 138 .group = &tegra132_tsensor_group_cpu, 139 }, { 140 .name = "mem0", 141 .base = 0x140, 142 .config = &tegra132_tsensor_config, 143 .calib_fuse_offset = 0x158, 144 .fuse_corr_alpha = 1132900, 145 .fuse_corr_beta = -6755300, 146 .group = &tegra132_tsensor_group_mem, 147 }, { 148 .name = "mem1", 149 .base = 0x160, 150 .config = &tegra132_tsensor_config, 151 .calib_fuse_offset = 0x15c, 152 .fuse_corr_alpha = 1142300, 153 .fuse_corr_beta = -7374200, 154 .group = &tegra132_tsensor_group_mem, 155 }, { 156 .name = "gpu", 157 .base = 0x180, 158 .config = &tegra132_tsensor_config, 159 .calib_fuse_offset = 0x154, 160 .fuse_corr_alpha = 1125100, 161 .fuse_corr_beta = -6350400, 162 .group = &tegra132_tsensor_group_gpu, 163 }, { 164 .name = "pllx", 165 .base = 0x1a0, 166 .config = &tegra132_tsensor_config, 167 .calib_fuse_offset = 0x160, 168 .fuse_corr_alpha = 1118100, 169 .fuse_corr_beta = -8208800, 170 .group = &tegra132_tsensor_group_pll, 171 }, 172 }; 173 174 /* 175 * Mask/shift bits in FUSE_TSENSOR_COMMON and 176 * FUSE_TSENSOR_COMMON, which are described in 177 * tegra_soctherm_fuse.c 178 */ 179 static const struct tegra_soctherm_fuse tegra132_soctherm_fuse = { 180 .fuse_base_cp_mask = 0x3ff, 181 .fuse_base_cp_shift = 0, 182 .fuse_base_ft_mask = 0x7ff << 10, 183 .fuse_base_ft_shift = 10, 184 .fuse_shift_ft_mask = 0x1f << 21, 185 .fuse_shift_ft_shift = 21, 186 .fuse_spare_realignment = 0x1fc, 187 }; 188 189 const struct tegra_soctherm_soc tegra132_soctherm = { 190 .tsensors = tegra132_tsensors, 191 .num_tsensors = ARRAY_SIZE(tegra132_tsensors), 192 .ttgs = tegra132_tsensor_groups, 193 .num_ttgs = ARRAY_SIZE(tegra132_tsensor_groups), 194 .tfuse = &tegra132_soctherm_fuse, 195 .thresh_grain = TEGRA132_THRESH_GRAIN, 196 }; 197