12025cf9eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cbac8f63SCaesar Wang /* 3678065d5SCaesar Wang * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd 420f0af75SCaesar Wang * Caesar Wang <wxt@rock-chips.com> 5cbac8f63SCaesar Wang */ 6cbac8f63SCaesar Wang 7cbac8f63SCaesar Wang #include <linux/clk.h> 8cbac8f63SCaesar Wang #include <linux/delay.h> 9cbac8f63SCaesar Wang #include <linux/interrupt.h> 10cbac8f63SCaesar Wang #include <linux/io.h> 11cbac8f63SCaesar Wang #include <linux/module.h> 12cbac8f63SCaesar Wang #include <linux/of.h> 13cbac8f63SCaesar Wang #include <linux/of_address.h> 14cbac8f63SCaesar Wang #include <linux/of_irq.h> 15cbac8f63SCaesar Wang #include <linux/platform_device.h> 16b9484763SCaesar Wang #include <linux/regmap.h> 17cbac8f63SCaesar Wang #include <linux/reset.h> 18cbac8f63SCaesar Wang #include <linux/thermal.h> 19b9484763SCaesar Wang #include <linux/mfd/syscon.h> 20c970872eSCaesar Wang #include <linux/pinctrl/consumer.h> 21cbac8f63SCaesar Wang 2266ec4bfcSAmit Kucheria /* 23cbac8f63SCaesar Wang * If the temperature over a period of time High, 24cbac8f63SCaesar Wang * the resulting TSHUT gave CRU module,let it reset the entire chip, 25cbac8f63SCaesar Wang * or via GPIO give PMIC. 26cbac8f63SCaesar Wang */ 27cbac8f63SCaesar Wang enum tshut_mode { 28cbac8f63SCaesar Wang TSHUT_MODE_CRU = 0, 29cbac8f63SCaesar Wang TSHUT_MODE_GPIO, 30cbac8f63SCaesar Wang }; 31cbac8f63SCaesar Wang 3266ec4bfcSAmit Kucheria /* 3313c1cfdaSCaesar Wang * The system Temperature Sensors tshut(tshut) polarity 34cbac8f63SCaesar Wang * the bit 8 is tshut polarity. 35cbac8f63SCaesar Wang * 0: low active, 1: high active 36cbac8f63SCaesar Wang */ 37cbac8f63SCaesar Wang enum tshut_polarity { 38cbac8f63SCaesar Wang TSHUT_LOW_ACTIVE = 0, 39cbac8f63SCaesar Wang TSHUT_HIGH_ACTIVE, 40cbac8f63SCaesar Wang }; 41cbac8f63SCaesar Wang 4266ec4bfcSAmit Kucheria /* 43020ba95dSCaesar Wang * The conversion table has the adc value and temperature. 44952418a3SCaesar Wang * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table) 45952418a3SCaesar Wang * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table) 46020ba95dSCaesar Wang */ 47020ba95dSCaesar Wang enum adc_sort_mode { 48020ba95dSCaesar Wang ADC_DECREMENT = 0, 49020ba95dSCaesar Wang ADC_INCREMENT, 50020ba95dSCaesar Wang }; 51020ba95dSCaesar Wang 52d27970b8SStefan Schaeckeler #include "thermal_hwmon.h" 53d27970b8SStefan Schaeckeler 546d5dad7bSRandy Dunlap /* 551d98b618SCaesar Wang * The max sensors is two in rockchip SoCs. 561d98b618SCaesar Wang * Two sensors: CPU and GPU sensor. 571d98b618SCaesar Wang */ 581d98b618SCaesar Wang #define SOC_MAX_SENSORS 2 591d98b618SCaesar Wang 6013c1cfdaSCaesar Wang /** 61678065d5SCaesar Wang * struct chip_tsadc_table - hold information about chip-specific differences 6213c1cfdaSCaesar Wang * @id: conversion table 6313c1cfdaSCaesar Wang * @length: size of conversion table 6413c1cfdaSCaesar Wang * @data_mask: mask to apply on data inputs 6513c1cfdaSCaesar Wang * @mode: sort mode of this adc variant (incrementing or decrementing) 6613c1cfdaSCaesar Wang */ 67ce74110dSCaesar Wang struct chip_tsadc_table { 68ce74110dSCaesar Wang const struct tsadc_table *id; 69ce74110dSCaesar Wang unsigned int length; 70ce74110dSCaesar Wang u32 data_mask; 71020ba95dSCaesar Wang enum adc_sort_mode mode; 72ce74110dSCaesar Wang }; 73ce74110dSCaesar Wang 74678065d5SCaesar Wang /** 75678065d5SCaesar Wang * struct rockchip_tsadc_chip - hold the private data of tsadc chip 76*f7cef1b7SSebastian Reichel * @chn_offset: the channel offset of the first channel 77678065d5SCaesar Wang * @chn_num: the channel number of tsadc chip 78678065d5SCaesar Wang * @tshut_temp: the hardware-controlled shutdown temperature value 79678065d5SCaesar Wang * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO) 80678065d5SCaesar Wang * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 81678065d5SCaesar Wang * @initialize: SoC special initialize tsadc controller method 82678065d5SCaesar Wang * @irq_ack: clear the interrupt 8366ec4bfcSAmit Kucheria * @control: enable/disable method for the tsadc controller 84678065d5SCaesar Wang * @get_temp: get the temperature 8514848502SCaesar Wang * @set_alarm_temp: set the high temperature interrupt 86678065d5SCaesar Wang * @set_tshut_temp: set the hardware-controlled shutdown temperature 87678065d5SCaesar Wang * @set_tshut_mode: set the hardware-controlled shutdown mode 88678065d5SCaesar Wang * @table: the chip-specific conversion table 89678065d5SCaesar Wang */ 90cbac8f63SCaesar Wang struct rockchip_tsadc_chip { 911d98b618SCaesar Wang /* The sensor id of chip correspond to the ADC channel */ 92*f7cef1b7SSebastian Reichel int chn_offset; 931d98b618SCaesar Wang int chn_num; 941d98b618SCaesar Wang 95cbac8f63SCaesar Wang /* The hardware-controlled tshut property */ 96437df217SCaesar Wang int tshut_temp; 97cbac8f63SCaesar Wang enum tshut_mode tshut_mode; 98cbac8f63SCaesar Wang enum tshut_polarity tshut_polarity; 99cbac8f63SCaesar Wang 100cbac8f63SCaesar Wang /* Chip-wide methods */ 101b9484763SCaesar Wang void (*initialize)(struct regmap *grf, 102b9484763SCaesar Wang void __iomem *reg, enum tshut_polarity p); 103cbac8f63SCaesar Wang void (*irq_ack)(void __iomem *reg); 104cbac8f63SCaesar Wang void (*control)(void __iomem *reg, bool on); 105cbac8f63SCaesar Wang 106cbac8f63SCaesar Wang /* Per-sensor methods */ 107cdd8b3f7SBrian Norris int (*get_temp)(const struct chip_tsadc_table *table, 108ce74110dSCaesar Wang int chn, void __iomem *reg, int *temp); 109d3530497SCaesar Wang int (*set_alarm_temp)(const struct chip_tsadc_table *table, 11014848502SCaesar Wang int chn, void __iomem *reg, int temp); 111d3530497SCaesar Wang int (*set_tshut_temp)(const struct chip_tsadc_table *table, 112437df217SCaesar Wang int chn, void __iomem *reg, int temp); 113cbac8f63SCaesar Wang void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m); 114ce74110dSCaesar Wang 115ce74110dSCaesar Wang /* Per-table methods */ 116ce74110dSCaesar Wang struct chip_tsadc_table table; 117cbac8f63SCaesar Wang }; 118cbac8f63SCaesar Wang 119678065d5SCaesar Wang /** 120678065d5SCaesar Wang * struct rockchip_thermal_sensor - hold the information of thermal sensor 121678065d5SCaesar Wang * @thermal: pointer to the platform/configuration data 122678065d5SCaesar Wang * @tzd: pointer to a thermal zone 123678065d5SCaesar Wang * @id: identifier of the thermal sensor 124678065d5SCaesar Wang */ 125cbac8f63SCaesar Wang struct rockchip_thermal_sensor { 126cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal; 127cbac8f63SCaesar Wang struct thermal_zone_device *tzd; 1281d98b618SCaesar Wang int id; 129cbac8f63SCaesar Wang }; 130cbac8f63SCaesar Wang 131678065d5SCaesar Wang /** 132678065d5SCaesar Wang * struct rockchip_thermal_data - hold the private data of thermal driver 133678065d5SCaesar Wang * @chip: pointer to the platform/configuration data 134678065d5SCaesar Wang * @pdev: platform device of thermal 135678065d5SCaesar Wang * @reset: the reset controller of tsadc 13666ec4bfcSAmit Kucheria * @sensors: array of thermal sensors 137678065d5SCaesar Wang * @clk: the controller clock is divided by the exteral 24MHz 138678065d5SCaesar Wang * @pclk: the advanced peripherals bus clock 139678065d5SCaesar Wang * @grf: the general register file will be used to do static set by software 140678065d5SCaesar Wang * @regs: the base address of tsadc controller 141678065d5SCaesar Wang * @tshut_temp: the hardware-controlled shutdown temperature value 142678065d5SCaesar Wang * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO) 143678065d5SCaesar Wang * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 144678065d5SCaesar Wang */ 145cbac8f63SCaesar Wang struct rockchip_thermal_data { 146cbac8f63SCaesar Wang const struct rockchip_tsadc_chip *chip; 147cbac8f63SCaesar Wang struct platform_device *pdev; 148cbac8f63SCaesar Wang struct reset_control *reset; 149cbac8f63SCaesar Wang 1501d98b618SCaesar Wang struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS]; 151cbac8f63SCaesar Wang 152cbac8f63SCaesar Wang struct clk *clk; 153cbac8f63SCaesar Wang struct clk *pclk; 154cbac8f63SCaesar Wang 155b9484763SCaesar Wang struct regmap *grf; 156cbac8f63SCaesar Wang void __iomem *regs; 157cbac8f63SCaesar Wang 158437df217SCaesar Wang int tshut_temp; 159cbac8f63SCaesar Wang enum tshut_mode tshut_mode; 160cbac8f63SCaesar Wang enum tshut_polarity tshut_polarity; 161cbac8f63SCaesar Wang }; 162cbac8f63SCaesar Wang 1636d5dad7bSRandy Dunlap /* 164952418a3SCaesar Wang * TSADC Sensor Register description: 165952418a3SCaesar Wang * 166952418a3SCaesar Wang * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it. 167952418a3SCaesar Wang * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399) 168952418a3SCaesar Wang * 169952418a3SCaesar Wang */ 170b9484763SCaesar Wang #define TSADCV2_USER_CON 0x00 171cbac8f63SCaesar Wang #define TSADCV2_AUTO_CON 0x04 172cbac8f63SCaesar Wang #define TSADCV2_INT_EN 0x08 173cbac8f63SCaesar Wang #define TSADCV2_INT_PD 0x0c 174cbac8f63SCaesar Wang #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04) 17514848502SCaesar Wang #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04) 176cbac8f63SCaesar Wang #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04) 177cbac8f63SCaesar Wang #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60 178cbac8f63SCaesar Wang #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64 179cbac8f63SCaesar Wang #define TSADCV2_AUTO_PERIOD 0x68 180cbac8f63SCaesar Wang #define TSADCV2_AUTO_PERIOD_HT 0x6c 181cbac8f63SCaesar Wang 182cbac8f63SCaesar Wang #define TSADCV2_AUTO_EN BIT(0) 183cbac8f63SCaesar Wang #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) 184cbac8f63SCaesar Wang #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8) 185678065d5SCaesar Wang 1867ea38c6cSCaesar Wang #define TSADCV3_AUTO_Q_SEL_EN BIT(1) 187cbac8f63SCaesar Wang 188cbac8f63SCaesar Wang #define TSADCV2_INT_SRC_EN(chn) BIT(chn) 189cbac8f63SCaesar Wang #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) 190cbac8f63SCaesar Wang #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) 191cbac8f63SCaesar Wang 192452e01b3SDmitry Torokhov #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) 193952418a3SCaesar Wang #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16) 194cbac8f63SCaesar Wang 195cbac8f63SCaesar Wang #define TSADCV2_DATA_MASK 0xfff 19620f0af75SCaesar Wang #define TSADCV3_DATA_MASK 0x3ff 19720f0af75SCaesar Wang 198cbac8f63SCaesar Wang #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 199cbac8f63SCaesar Wang #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 20046667879SCaesar Wang #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */ 20146667879SCaesar Wang #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */ 2025ef62de7SRocky Hao #define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */ 2035ef62de7SRocky Hao #define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */ 20446667879SCaesar Wang 20516bee043SFinley Xiao #define TSADCV5_AUTO_PERIOD_TIME 1622 /* 2.5ms */ 20616bee043SFinley Xiao #define TSADCV5_AUTO_PERIOD_HT_TIME 1622 /* 2.5ms */ 20716bee043SFinley Xiao 208b9484763SCaesar Wang #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */ 20916bee043SFinley Xiao #define TSADCV5_USER_INTER_PD_SOC 0xfc0 /* 97us, at least 90us */ 210b9484763SCaesar Wang 211b9484763SCaesar Wang #define GRF_SARADC_TESTBIT 0x0e644 212b9484763SCaesar Wang #define GRF_TSADC_TESTBIT_L 0x0e648 213b9484763SCaesar Wang #define GRF_TSADC_TESTBIT_H 0x0e64c 214b9484763SCaesar Wang 215ffd1b122SElaine Zhang #define PX30_GRF_SOC_CON2 0x0408 216ffd1b122SElaine Zhang 21716bee043SFinley Xiao #define RK3568_GRF_TSADC_CON 0x0600 21816bee043SFinley Xiao #define RK3568_GRF_TSADC_ANA_REG0 (0x10001 << 0) 21916bee043SFinley Xiao #define RK3568_GRF_TSADC_ANA_REG1 (0x10001 << 1) 22016bee043SFinley Xiao #define RK3568_GRF_TSADC_ANA_REG2 (0x10001 << 2) 22116bee043SFinley Xiao #define RK3568_GRF_TSADC_TSEN (0x10001 << 8) 22216bee043SFinley Xiao 223b9484763SCaesar Wang #define GRF_SARADC_TESTBIT_ON (0x10001 << 2) 224b9484763SCaesar Wang #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2) 22523f75e48SRocky Hao #define GRF_TSADC_VCM_EN_L (0x10001 << 7) 22623f75e48SRocky Hao #define GRF_TSADC_VCM_EN_H (0x10001 << 7) 227cbac8f63SCaesar Wang 228ffd1b122SElaine Zhang #define GRF_CON_TSADC_CH_INV (0x10001 << 1) 229ffd1b122SElaine Zhang 230678065d5SCaesar Wang /** 231678065d5SCaesar Wang * struct tsadc_table - code to temperature conversion table 232678065d5SCaesar Wang * @code: the value of adc channel 233678065d5SCaesar Wang * @temp: the temperature 234678065d5SCaesar Wang * Note: 235678065d5SCaesar Wang * code to temperature mapping of the temperature sensor is a piece wise linear 236678065d5SCaesar Wang * curve.Any temperature, code faling between to 2 give temperatures can be 237678065d5SCaesar Wang * linearly interpolated. 238678065d5SCaesar Wang * Code to Temperature mapping should be updated based on manufacturer results. 239678065d5SCaesar Wang */ 240cbac8f63SCaesar Wang struct tsadc_table { 241d9a241cbSDmitry Torokhov u32 code; 242437df217SCaesar Wang int temp; 243cbac8f63SCaesar Wang }; 244cbac8f63SCaesar Wang 2454eca8cacSRocky Hao static const struct tsadc_table rv1108_table[] = { 2464eca8cacSRocky Hao {0, -40000}, 2474eca8cacSRocky Hao {374, -40000}, 2484eca8cacSRocky Hao {382, -35000}, 2494eca8cacSRocky Hao {389, -30000}, 2504eca8cacSRocky Hao {397, -25000}, 2514eca8cacSRocky Hao {405, -20000}, 2524eca8cacSRocky Hao {413, -15000}, 2534eca8cacSRocky Hao {421, -10000}, 2544eca8cacSRocky Hao {429, -5000}, 2554eca8cacSRocky Hao {436, 0}, 2564eca8cacSRocky Hao {444, 5000}, 2574eca8cacSRocky Hao {452, 10000}, 2584eca8cacSRocky Hao {460, 15000}, 2594eca8cacSRocky Hao {468, 20000}, 2604eca8cacSRocky Hao {476, 25000}, 2614eca8cacSRocky Hao {483, 30000}, 2624eca8cacSRocky Hao {491, 35000}, 2634eca8cacSRocky Hao {499, 40000}, 2644eca8cacSRocky Hao {507, 45000}, 2654eca8cacSRocky Hao {515, 50000}, 2664eca8cacSRocky Hao {523, 55000}, 2674eca8cacSRocky Hao {531, 60000}, 2684eca8cacSRocky Hao {539, 65000}, 2694eca8cacSRocky Hao {547, 70000}, 2704eca8cacSRocky Hao {555, 75000}, 2714eca8cacSRocky Hao {562, 80000}, 2724eca8cacSRocky Hao {570, 85000}, 2734eca8cacSRocky Hao {578, 90000}, 2744eca8cacSRocky Hao {586, 95000}, 2754eca8cacSRocky Hao {594, 100000}, 2764eca8cacSRocky Hao {602, 105000}, 2774eca8cacSRocky Hao {610, 110000}, 2784eca8cacSRocky Hao {618, 115000}, 2794eca8cacSRocky Hao {626, 120000}, 2804eca8cacSRocky Hao {634, 125000}, 2814eca8cacSRocky Hao {TSADCV2_DATA_MASK, 125000}, 2824eca8cacSRocky Hao }; 2834eca8cacSRocky Hao 284952418a3SCaesar Wang static const struct tsadc_table rk3228_code_table[] = { 2857ea38c6cSCaesar Wang {0, -40000}, 2867ea38c6cSCaesar Wang {588, -40000}, 2877ea38c6cSCaesar Wang {593, -35000}, 2887ea38c6cSCaesar Wang {598, -30000}, 2897ea38c6cSCaesar Wang {603, -25000}, 2907ea38c6cSCaesar Wang {608, -20000}, 2917ea38c6cSCaesar Wang {613, -15000}, 2927ea38c6cSCaesar Wang {618, -10000}, 2937ea38c6cSCaesar Wang {623, -5000}, 2947ea38c6cSCaesar Wang {629, 0}, 2957ea38c6cSCaesar Wang {634, 5000}, 2967ea38c6cSCaesar Wang {639, 10000}, 2977ea38c6cSCaesar Wang {644, 15000}, 2987ea38c6cSCaesar Wang {649, 20000}, 2997ea38c6cSCaesar Wang {654, 25000}, 3007ea38c6cSCaesar Wang {660, 30000}, 3017ea38c6cSCaesar Wang {665, 35000}, 3027ea38c6cSCaesar Wang {670, 40000}, 3037ea38c6cSCaesar Wang {675, 45000}, 3047ea38c6cSCaesar Wang {681, 50000}, 3057ea38c6cSCaesar Wang {686, 55000}, 3067ea38c6cSCaesar Wang {691, 60000}, 3077ea38c6cSCaesar Wang {696, 65000}, 3087ea38c6cSCaesar Wang {702, 70000}, 3097ea38c6cSCaesar Wang {707, 75000}, 3107ea38c6cSCaesar Wang {712, 80000}, 3117ea38c6cSCaesar Wang {717, 85000}, 3127ea38c6cSCaesar Wang {723, 90000}, 3137ea38c6cSCaesar Wang {728, 95000}, 3147ea38c6cSCaesar Wang {733, 100000}, 3157ea38c6cSCaesar Wang {738, 105000}, 3167ea38c6cSCaesar Wang {744, 110000}, 3177ea38c6cSCaesar Wang {749, 115000}, 3187ea38c6cSCaesar Wang {754, 120000}, 3197ea38c6cSCaesar Wang {760, 125000}, 3207ea38c6cSCaesar Wang {TSADCV2_DATA_MASK, 125000}, 3217b02a5e7SCaesar Wang }; 3227b02a5e7SCaesar Wang 323952418a3SCaesar Wang static const struct tsadc_table rk3288_code_table[] = { 324cbac8f63SCaesar Wang {TSADCV2_DATA_MASK, -40000}, 325cbac8f63SCaesar Wang {3800, -40000}, 326cbac8f63SCaesar Wang {3792, -35000}, 327cbac8f63SCaesar Wang {3783, -30000}, 328cbac8f63SCaesar Wang {3774, -25000}, 329cbac8f63SCaesar Wang {3765, -20000}, 330cbac8f63SCaesar Wang {3756, -15000}, 331cbac8f63SCaesar Wang {3747, -10000}, 332cbac8f63SCaesar Wang {3737, -5000}, 333cbac8f63SCaesar Wang {3728, 0}, 334cbac8f63SCaesar Wang {3718, 5000}, 335cbac8f63SCaesar Wang {3708, 10000}, 336cbac8f63SCaesar Wang {3698, 15000}, 337cbac8f63SCaesar Wang {3688, 20000}, 338cbac8f63SCaesar Wang {3678, 25000}, 339cbac8f63SCaesar Wang {3667, 30000}, 340cbac8f63SCaesar Wang {3656, 35000}, 341cbac8f63SCaesar Wang {3645, 40000}, 342cbac8f63SCaesar Wang {3634, 45000}, 343cbac8f63SCaesar Wang {3623, 50000}, 344cbac8f63SCaesar Wang {3611, 55000}, 345cbac8f63SCaesar Wang {3600, 60000}, 346cbac8f63SCaesar Wang {3588, 65000}, 347cbac8f63SCaesar Wang {3575, 70000}, 348cbac8f63SCaesar Wang {3563, 75000}, 349cbac8f63SCaesar Wang {3550, 80000}, 350cbac8f63SCaesar Wang {3537, 85000}, 351cbac8f63SCaesar Wang {3524, 90000}, 352cbac8f63SCaesar Wang {3510, 95000}, 353cbac8f63SCaesar Wang {3496, 100000}, 354cbac8f63SCaesar Wang {3482, 105000}, 355cbac8f63SCaesar Wang {3467, 110000}, 356cbac8f63SCaesar Wang {3452, 115000}, 357cbac8f63SCaesar Wang {3437, 120000}, 358cbac8f63SCaesar Wang {3421, 125000}, 359cadf29dcSCaesar Wang {0, 125000}, 360cbac8f63SCaesar Wang }; 361cbac8f63SCaesar Wang 362eda519d5SRocky Hao static const struct tsadc_table rk3328_code_table[] = { 363eda519d5SRocky Hao {0, -40000}, 364eda519d5SRocky Hao {296, -40000}, 365eda519d5SRocky Hao {304, -35000}, 366eda519d5SRocky Hao {313, -30000}, 367eda519d5SRocky Hao {331, -20000}, 368eda519d5SRocky Hao {340, -15000}, 369eda519d5SRocky Hao {349, -10000}, 370eda519d5SRocky Hao {359, -5000}, 371eda519d5SRocky Hao {368, 0}, 372eda519d5SRocky Hao {378, 5000}, 373eda519d5SRocky Hao {388, 10000}, 374eda519d5SRocky Hao {398, 15000}, 375eda519d5SRocky Hao {408, 20000}, 376eda519d5SRocky Hao {418, 25000}, 377eda519d5SRocky Hao {429, 30000}, 378eda519d5SRocky Hao {440, 35000}, 379eda519d5SRocky Hao {451, 40000}, 380eda519d5SRocky Hao {462, 45000}, 381eda519d5SRocky Hao {473, 50000}, 382eda519d5SRocky Hao {485, 55000}, 383eda519d5SRocky Hao {496, 60000}, 384eda519d5SRocky Hao {508, 65000}, 385eda519d5SRocky Hao {521, 70000}, 386eda519d5SRocky Hao {533, 75000}, 387eda519d5SRocky Hao {546, 80000}, 388eda519d5SRocky Hao {559, 85000}, 389eda519d5SRocky Hao {572, 90000}, 390eda519d5SRocky Hao {586, 95000}, 391eda519d5SRocky Hao {600, 100000}, 392eda519d5SRocky Hao {614, 105000}, 393eda519d5SRocky Hao {629, 110000}, 394eda519d5SRocky Hao {644, 115000}, 395eda519d5SRocky Hao {659, 120000}, 396eda519d5SRocky Hao {675, 125000}, 397eda519d5SRocky Hao {TSADCV2_DATA_MASK, 125000}, 398eda519d5SRocky Hao }; 399eda519d5SRocky Hao 400952418a3SCaesar Wang static const struct tsadc_table rk3368_code_table[] = { 40120f0af75SCaesar Wang {0, -40000}, 40220f0af75SCaesar Wang {106, -40000}, 40320f0af75SCaesar Wang {108, -35000}, 40420f0af75SCaesar Wang {110, -30000}, 40520f0af75SCaesar Wang {112, -25000}, 40620f0af75SCaesar Wang {114, -20000}, 40720f0af75SCaesar Wang {116, -15000}, 40820f0af75SCaesar Wang {118, -10000}, 40920f0af75SCaesar Wang {120, -5000}, 41020f0af75SCaesar Wang {122, 0}, 41120f0af75SCaesar Wang {124, 5000}, 41220f0af75SCaesar Wang {126, 10000}, 41320f0af75SCaesar Wang {128, 15000}, 41420f0af75SCaesar Wang {130, 20000}, 41520f0af75SCaesar Wang {132, 25000}, 41620f0af75SCaesar Wang {134, 30000}, 41720f0af75SCaesar Wang {136, 35000}, 41820f0af75SCaesar Wang {138, 40000}, 41920f0af75SCaesar Wang {140, 45000}, 42020f0af75SCaesar Wang {142, 50000}, 42120f0af75SCaesar Wang {144, 55000}, 42220f0af75SCaesar Wang {146, 60000}, 42320f0af75SCaesar Wang {148, 65000}, 42420f0af75SCaesar Wang {150, 70000}, 42520f0af75SCaesar Wang {152, 75000}, 42620f0af75SCaesar Wang {154, 80000}, 42720f0af75SCaesar Wang {156, 85000}, 42820f0af75SCaesar Wang {158, 90000}, 42920f0af75SCaesar Wang {160, 95000}, 43020f0af75SCaesar Wang {162, 100000}, 43120f0af75SCaesar Wang {163, 105000}, 43220f0af75SCaesar Wang {165, 110000}, 43320f0af75SCaesar Wang {167, 115000}, 43420f0af75SCaesar Wang {169, 120000}, 43520f0af75SCaesar Wang {171, 125000}, 43620f0af75SCaesar Wang {TSADCV3_DATA_MASK, 125000}, 43720f0af75SCaesar Wang }; 43820f0af75SCaesar Wang 439952418a3SCaesar Wang static const struct tsadc_table rk3399_code_table[] = { 4407ea38c6cSCaesar Wang {0, -40000}, 441f762a35dSCaesar Wang {402, -40000}, 442f762a35dSCaesar Wang {410, -35000}, 443f762a35dSCaesar Wang {419, -30000}, 444f762a35dSCaesar Wang {427, -25000}, 445f762a35dSCaesar Wang {436, -20000}, 446f762a35dSCaesar Wang {444, -15000}, 447f762a35dSCaesar Wang {453, -10000}, 448f762a35dSCaesar Wang {461, -5000}, 449f762a35dSCaesar Wang {470, 0}, 450f762a35dSCaesar Wang {478, 5000}, 451f762a35dSCaesar Wang {487, 10000}, 452f762a35dSCaesar Wang {496, 15000}, 453f762a35dSCaesar Wang {504, 20000}, 454f762a35dSCaesar Wang {513, 25000}, 455f762a35dSCaesar Wang {521, 30000}, 456f762a35dSCaesar Wang {530, 35000}, 457f762a35dSCaesar Wang {538, 40000}, 458f762a35dSCaesar Wang {547, 45000}, 459f762a35dSCaesar Wang {555, 50000}, 460f762a35dSCaesar Wang {564, 55000}, 461f762a35dSCaesar Wang {573, 60000}, 462f762a35dSCaesar Wang {581, 65000}, 463f762a35dSCaesar Wang {590, 70000}, 464f762a35dSCaesar Wang {599, 75000}, 465f762a35dSCaesar Wang {607, 80000}, 466f762a35dSCaesar Wang {616, 85000}, 467f762a35dSCaesar Wang {624, 90000}, 468f762a35dSCaesar Wang {633, 95000}, 469f762a35dSCaesar Wang {642, 100000}, 470f762a35dSCaesar Wang {650, 105000}, 471f762a35dSCaesar Wang {659, 110000}, 472f762a35dSCaesar Wang {668, 115000}, 473f762a35dSCaesar Wang {677, 120000}, 474f762a35dSCaesar Wang {685, 125000}, 4757ea38c6cSCaesar Wang {TSADCV3_DATA_MASK, 125000}, 476b0d70338SCaesar Wang }; 477b0d70338SCaesar Wang 47816bee043SFinley Xiao static const struct tsadc_table rk3568_code_table[] = { 47916bee043SFinley Xiao {0, -40000}, 48016bee043SFinley Xiao {1584, -40000}, 48116bee043SFinley Xiao {1620, -35000}, 48216bee043SFinley Xiao {1652, -30000}, 48316bee043SFinley Xiao {1688, -25000}, 48416bee043SFinley Xiao {1720, -20000}, 48516bee043SFinley Xiao {1756, -15000}, 48616bee043SFinley Xiao {1788, -10000}, 48716bee043SFinley Xiao {1824, -5000}, 48816bee043SFinley Xiao {1856, 0}, 48916bee043SFinley Xiao {1892, 5000}, 49016bee043SFinley Xiao {1924, 10000}, 49116bee043SFinley Xiao {1956, 15000}, 49216bee043SFinley Xiao {1992, 20000}, 49316bee043SFinley Xiao {2024, 25000}, 49416bee043SFinley Xiao {2060, 30000}, 49516bee043SFinley Xiao {2092, 35000}, 49616bee043SFinley Xiao {2128, 40000}, 49716bee043SFinley Xiao {2160, 45000}, 49816bee043SFinley Xiao {2196, 50000}, 49916bee043SFinley Xiao {2228, 55000}, 50016bee043SFinley Xiao {2264, 60000}, 50116bee043SFinley Xiao {2300, 65000}, 50216bee043SFinley Xiao {2332, 70000}, 50316bee043SFinley Xiao {2368, 75000}, 50416bee043SFinley Xiao {2400, 80000}, 50516bee043SFinley Xiao {2436, 85000}, 50616bee043SFinley Xiao {2468, 90000}, 50716bee043SFinley Xiao {2500, 95000}, 50816bee043SFinley Xiao {2536, 100000}, 50916bee043SFinley Xiao {2572, 105000}, 51016bee043SFinley Xiao {2604, 110000}, 51116bee043SFinley Xiao {2636, 115000}, 51216bee043SFinley Xiao {2672, 120000}, 51316bee043SFinley Xiao {2704, 125000}, 51416bee043SFinley Xiao {TSADCV2_DATA_MASK, 125000}, 51516bee043SFinley Xiao }; 51616bee043SFinley Xiao 517cdd8b3f7SBrian Norris static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table, 518437df217SCaesar Wang int temp) 519cbac8f63SCaesar Wang { 520cbac8f63SCaesar Wang int high, low, mid; 521cadf29dcSCaesar Wang unsigned long num; 522cadf29dcSCaesar Wang unsigned int denom; 523d3530497SCaesar Wang u32 error = table->data_mask; 524cbac8f63SCaesar Wang 525cbac8f63SCaesar Wang low = 0; 526cadf29dcSCaesar Wang high = (table->length - 1) - 1; /* ignore the last check for table */ 527cbac8f63SCaesar Wang mid = (high + low) / 2; 528cbac8f63SCaesar Wang 5291f09ba82SCaesar Wang /* Return mask code data when the temp is over table range */ 530d3530497SCaesar Wang if (temp < table->id[low].temp || temp > table->id[high].temp) 5311f09ba82SCaesar Wang goto exit; 532cbac8f63SCaesar Wang 533cbac8f63SCaesar Wang while (low <= high) { 534cdd8b3f7SBrian Norris if (temp == table->id[mid].temp) 535cdd8b3f7SBrian Norris return table->id[mid].code; 536cdd8b3f7SBrian Norris else if (temp < table->id[mid].temp) 537cbac8f63SCaesar Wang high = mid - 1; 538cbac8f63SCaesar Wang else 539cbac8f63SCaesar Wang low = mid + 1; 540cbac8f63SCaesar Wang mid = (low + high) / 2; 541cbac8f63SCaesar Wang } 542cbac8f63SCaesar Wang 543cadf29dcSCaesar Wang /* 544cadf29dcSCaesar Wang * The conversion code granularity provided by the table. Let's 545cadf29dcSCaesar Wang * assume that the relationship between temperature and 546cadf29dcSCaesar Wang * analog value between 2 table entries is linear and interpolate 547cadf29dcSCaesar Wang * to produce less granular result. 548cadf29dcSCaesar Wang */ 549cadf29dcSCaesar Wang num = abs(table->id[mid + 1].code - table->id[mid].code); 550cadf29dcSCaesar Wang num *= temp - table->id[mid].temp; 551cadf29dcSCaesar Wang denom = table->id[mid + 1].temp - table->id[mid].temp; 552cadf29dcSCaesar Wang 553cadf29dcSCaesar Wang switch (table->mode) { 554cadf29dcSCaesar Wang case ADC_DECREMENT: 555cadf29dcSCaesar Wang return table->id[mid].code - (num / denom); 556cadf29dcSCaesar Wang case ADC_INCREMENT: 557cadf29dcSCaesar Wang return table->id[mid].code + (num / denom); 558cadf29dcSCaesar Wang default: 559cadf29dcSCaesar Wang pr_err("%s: unknown table mode: %d\n", __func__, table->mode); 560cadf29dcSCaesar Wang return error; 561cadf29dcSCaesar Wang } 562cadf29dcSCaesar Wang 5631f09ba82SCaesar Wang exit: 564e6ed1b4aSBrian Norris pr_err("%s: invalid temperature, temp=%d error=%d\n", 565e6ed1b4aSBrian Norris __func__, temp, error); 5661f09ba82SCaesar Wang return error; 567cbac8f63SCaesar Wang } 568cbac8f63SCaesar Wang 569cdd8b3f7SBrian Norris static int rk_tsadcv2_code_to_temp(const struct chip_tsadc_table *table, 570cdd8b3f7SBrian Norris u32 code, int *temp) 571cbac8f63SCaesar Wang { 572d9a241cbSDmitry Torokhov unsigned int low = 1; 573cdd8b3f7SBrian Norris unsigned int high = table->length - 1; 5741e9a1aeaSCaesar Wang unsigned int mid = (low + high) / 2; 5751e9a1aeaSCaesar Wang unsigned int num; 5761e9a1aeaSCaesar Wang unsigned long denom; 577cbac8f63SCaesar Wang 578cdd8b3f7SBrian Norris WARN_ON(table->length < 2); 579cbac8f63SCaesar Wang 580cdd8b3f7SBrian Norris switch (table->mode) { 581020ba95dSCaesar Wang case ADC_DECREMENT: 582cdd8b3f7SBrian Norris code &= table->data_mask; 583db831886SCaesar Wang if (code <= table->id[high].code) 584d9a241cbSDmitry Torokhov return -EAGAIN; /* Incorrect reading */ 585d9a241cbSDmitry Torokhov 586d9a241cbSDmitry Torokhov while (low <= high) { 587cdd8b3f7SBrian Norris if (code >= table->id[mid].code && 588cdd8b3f7SBrian Norris code < table->id[mid - 1].code) 5891e9a1aeaSCaesar Wang break; 590cdd8b3f7SBrian Norris else if (code < table->id[mid].code) 591cbac8f63SCaesar Wang low = mid + 1; 592cbac8f63SCaesar Wang else 593cbac8f63SCaesar Wang high = mid - 1; 594020ba95dSCaesar Wang 595cbac8f63SCaesar Wang mid = (low + high) / 2; 596cbac8f63SCaesar Wang } 597020ba95dSCaesar Wang break; 598020ba95dSCaesar Wang case ADC_INCREMENT: 599cdd8b3f7SBrian Norris code &= table->data_mask; 600cdd8b3f7SBrian Norris if (code < table->id[low].code) 601020ba95dSCaesar Wang return -EAGAIN; /* Incorrect reading */ 602020ba95dSCaesar Wang 603020ba95dSCaesar Wang while (low <= high) { 604cdd8b3f7SBrian Norris if (code <= table->id[mid].code && 605cdd8b3f7SBrian Norris code > table->id[mid - 1].code) 606020ba95dSCaesar Wang break; 607cdd8b3f7SBrian Norris else if (code > table->id[mid].code) 608020ba95dSCaesar Wang low = mid + 1; 609020ba95dSCaesar Wang else 610020ba95dSCaesar Wang high = mid - 1; 611020ba95dSCaesar Wang 612020ba95dSCaesar Wang mid = (low + high) / 2; 613020ba95dSCaesar Wang } 614020ba95dSCaesar Wang break; 615020ba95dSCaesar Wang default: 616cdd8b3f7SBrian Norris pr_err("%s: unknown table mode: %d\n", __func__, table->mode); 617e6ed1b4aSBrian Norris return -EINVAL; 618020ba95dSCaesar Wang } 619cbac8f63SCaesar Wang 6201e9a1aeaSCaesar Wang /* 6211e9a1aeaSCaesar Wang * The 5C granularity provided by the table is too much. Let's 6221e9a1aeaSCaesar Wang * assume that the relationship between sensor readings and 6231e9a1aeaSCaesar Wang * temperature between 2 table entries is linear and interpolate 6241e9a1aeaSCaesar Wang * to produce less granular result. 6251e9a1aeaSCaesar Wang */ 626cdd8b3f7SBrian Norris num = table->id[mid].temp - table->id[mid - 1].temp; 627cdd8b3f7SBrian Norris num *= abs(table->id[mid - 1].code - code); 628cdd8b3f7SBrian Norris denom = abs(table->id[mid - 1].code - table->id[mid].code); 629cdd8b3f7SBrian Norris *temp = table->id[mid - 1].temp + (num / denom); 630d9a241cbSDmitry Torokhov 631d9a241cbSDmitry Torokhov return 0; 632cbac8f63SCaesar Wang } 633cbac8f63SCaesar Wang 634cbac8f63SCaesar Wang /** 635144c5565SCaesar Wang * rk_tsadcv2_initialize - initialize TASDC Controller. 63666ec4bfcSAmit Kucheria * @grf: the general register file will be used to do static set by software 63766ec4bfcSAmit Kucheria * @regs: the base address of tsadc controller 63866ec4bfcSAmit Kucheria * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 639144c5565SCaesar Wang * 640144c5565SCaesar Wang * (1) Set TSADC_V2_AUTO_PERIOD: 641144c5565SCaesar Wang * Configure the interleave between every two accessing of 642144c5565SCaesar Wang * TSADC in normal operation. 643144c5565SCaesar Wang * 644144c5565SCaesar Wang * (2) Set TSADCV2_AUTO_PERIOD_HT: 645144c5565SCaesar Wang * Configure the interleave between every two accessing of 646144c5565SCaesar Wang * TSADC after the temperature is higher than COM_SHUT or COM_INT. 647144c5565SCaesar Wang * 648144c5565SCaesar Wang * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE: 649144c5565SCaesar Wang * If the temperature is higher than COMP_INT or COMP_SHUT for 650cbac8f63SCaesar Wang * "debounce" times, TSADC controller will generate interrupt or TSHUT. 651cbac8f63SCaesar Wang */ 652b9484763SCaesar Wang static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs, 653cbac8f63SCaesar Wang enum tshut_polarity tshut_polarity) 654cbac8f63SCaesar Wang { 655cbac8f63SCaesar Wang if (tshut_polarity == TSHUT_HIGH_ACTIVE) 656452e01b3SDmitry Torokhov writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 657cbac8f63SCaesar Wang regs + TSADCV2_AUTO_CON); 658cbac8f63SCaesar Wang else 659452e01b3SDmitry Torokhov writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 660cbac8f63SCaesar Wang regs + TSADCV2_AUTO_CON); 661cbac8f63SCaesar Wang 662cbac8f63SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); 663cbac8f63SCaesar Wang writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 664cbac8f63SCaesar Wang regs + TSADCV2_HIGHT_INT_DEBOUNCE); 665cbac8f63SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, 666cbac8f63SCaesar Wang regs + TSADCV2_AUTO_PERIOD_HT); 667cbac8f63SCaesar Wang writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 668cbac8f63SCaesar Wang regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 669b9484763SCaesar Wang } 670b9484763SCaesar Wang 671b9484763SCaesar Wang /** 672b9484763SCaesar Wang * rk_tsadcv3_initialize - initialize TASDC Controller. 67366ec4bfcSAmit Kucheria * @grf: the general register file will be used to do static set by software 67466ec4bfcSAmit Kucheria * @regs: the base address of tsadc controller 67566ec4bfcSAmit Kucheria * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 676678065d5SCaesar Wang * 677b9484763SCaesar Wang * (1) The tsadc control power sequence. 678b9484763SCaesar Wang * 679b9484763SCaesar Wang * (2) Set TSADC_V2_AUTO_PERIOD: 680b9484763SCaesar Wang * Configure the interleave between every two accessing of 681b9484763SCaesar Wang * TSADC in normal operation. 682b9484763SCaesar Wang * 683b9484763SCaesar Wang * (2) Set TSADCV2_AUTO_PERIOD_HT: 684b9484763SCaesar Wang * Configure the interleave between every two accessing of 685b9484763SCaesar Wang * TSADC after the temperature is higher than COM_SHUT or COM_INT. 686b9484763SCaesar Wang * 687b9484763SCaesar Wang * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE: 688b9484763SCaesar Wang * If the temperature is higher than COMP_INT or COMP_SHUT for 689b9484763SCaesar Wang * "debounce" times, TSADC controller will generate interrupt or TSHUT. 690b9484763SCaesar Wang */ 691b9484763SCaesar Wang static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs, 692b9484763SCaesar Wang enum tshut_polarity tshut_polarity) 693b9484763SCaesar Wang { 694b9484763SCaesar Wang /* The tsadc control power sequence */ 695b9484763SCaesar Wang if (IS_ERR(grf)) { 696b9484763SCaesar Wang /* Set interleave value to workround ic time sync issue */ 697b9484763SCaesar Wang writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs + 698b9484763SCaesar Wang TSADCV2_USER_CON); 69946667879SCaesar Wang 70046667879SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, 70146667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD); 70246667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 70346667879SCaesar Wang regs + TSADCV2_HIGHT_INT_DEBOUNCE); 70446667879SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, 70546667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD_HT); 70646667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 70746667879SCaesar Wang regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 70846667879SCaesar Wang 709b9484763SCaesar Wang } else { 71023f75e48SRocky Hao /* Enable the voltage common mode feature */ 71123f75e48SRocky Hao regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L); 71223f75e48SRocky Hao regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H); 71323f75e48SRocky Hao 7142fe5c1b0SCaesar Wang usleep_range(15, 100); /* The spec note says at least 15 us */ 715b9484763SCaesar Wang regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON); 716b9484763SCaesar Wang regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON); 7172fe5c1b0SCaesar Wang usleep_range(90, 200); /* The spec note says at least 90 us */ 71846667879SCaesar Wang 71946667879SCaesar Wang writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, 72046667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD); 72146667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 72246667879SCaesar Wang regs + TSADCV2_HIGHT_INT_DEBOUNCE); 72346667879SCaesar Wang writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME, 72446667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD_HT); 72546667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 72646667879SCaesar Wang regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 727b9484763SCaesar Wang } 728b9484763SCaesar Wang 729b9484763SCaesar Wang if (tshut_polarity == TSHUT_HIGH_ACTIVE) 730b9484763SCaesar Wang writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 731b9484763SCaesar Wang regs + TSADCV2_AUTO_CON); 732b9484763SCaesar Wang else 733b9484763SCaesar Wang writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 734b9484763SCaesar Wang regs + TSADCV2_AUTO_CON); 735cbac8f63SCaesar Wang } 736cbac8f63SCaesar Wang 737ffd1b122SElaine Zhang static void rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs, 738ffd1b122SElaine Zhang enum tshut_polarity tshut_polarity) 739ffd1b122SElaine Zhang { 740ffd1b122SElaine Zhang rk_tsadcv2_initialize(grf, regs, tshut_polarity); 741ffd1b122SElaine Zhang regmap_write(grf, PX30_GRF_SOC_CON2, GRF_CON_TSADC_CH_INV); 742ffd1b122SElaine Zhang } 743ffd1b122SElaine Zhang 74416bee043SFinley Xiao static void rk_tsadcv7_initialize(struct regmap *grf, void __iomem *regs, 74516bee043SFinley Xiao enum tshut_polarity tshut_polarity) 74616bee043SFinley Xiao { 74716bee043SFinley Xiao writel_relaxed(TSADCV5_USER_INTER_PD_SOC, regs + TSADCV2_USER_CON); 74816bee043SFinley Xiao writel_relaxed(TSADCV5_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); 74916bee043SFinley Xiao writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 75016bee043SFinley Xiao regs + TSADCV2_HIGHT_INT_DEBOUNCE); 75116bee043SFinley Xiao writel_relaxed(TSADCV5_AUTO_PERIOD_HT_TIME, 75216bee043SFinley Xiao regs + TSADCV2_AUTO_PERIOD_HT); 75316bee043SFinley Xiao writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 75416bee043SFinley Xiao regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 75516bee043SFinley Xiao 75616bee043SFinley Xiao if (tshut_polarity == TSHUT_HIGH_ACTIVE) 75716bee043SFinley Xiao writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 75816bee043SFinley Xiao regs + TSADCV2_AUTO_CON); 75916bee043SFinley Xiao else 76016bee043SFinley Xiao writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 76116bee043SFinley Xiao regs + TSADCV2_AUTO_CON); 76216bee043SFinley Xiao 76316bee043SFinley Xiao /* 76416bee043SFinley Xiao * The general register file will is optional 76516bee043SFinley Xiao * and might not be available. 76616bee043SFinley Xiao */ 76716bee043SFinley Xiao if (!IS_ERR(grf)) { 76816bee043SFinley Xiao regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_TSEN); 76916bee043SFinley Xiao /* 77016bee043SFinley Xiao * RK3568 TRM, section 18.5. requires a delay no less 77116bee043SFinley Xiao * than 10us between the rising edge of tsadc_tsen_en 77216bee043SFinley Xiao * and the rising edge of tsadc_ana_reg_0/1/2. 77316bee043SFinley Xiao */ 77416bee043SFinley Xiao udelay(15); 77516bee043SFinley Xiao regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG0); 77616bee043SFinley Xiao regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG1); 77716bee043SFinley Xiao regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG2); 77816bee043SFinley Xiao 77916bee043SFinley Xiao /* 78016bee043SFinley Xiao * RK3568 TRM, section 18.5. requires a delay no less 78116bee043SFinley Xiao * than 90us after the rising edge of tsadc_ana_reg_0/1/2. 78216bee043SFinley Xiao */ 78316bee043SFinley Xiao usleep_range(100, 200); 78416bee043SFinley Xiao } 78516bee043SFinley Xiao } 78616bee043SFinley Xiao 787cbac8f63SCaesar Wang static void rk_tsadcv2_irq_ack(void __iomem *regs) 788cbac8f63SCaesar Wang { 789cbac8f63SCaesar Wang u32 val; 790cbac8f63SCaesar Wang 791cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_INT_PD); 792452e01b3SDmitry Torokhov writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); 793cbac8f63SCaesar Wang } 794cbac8f63SCaesar Wang 795952418a3SCaesar Wang static void rk_tsadcv3_irq_ack(void __iomem *regs) 796952418a3SCaesar Wang { 797952418a3SCaesar Wang u32 val; 798952418a3SCaesar Wang 799952418a3SCaesar Wang val = readl_relaxed(regs + TSADCV2_INT_PD); 800952418a3SCaesar Wang writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); 801952418a3SCaesar Wang } 802952418a3SCaesar Wang 803cbac8f63SCaesar Wang static void rk_tsadcv2_control(void __iomem *regs, bool enable) 804cbac8f63SCaesar Wang { 805cbac8f63SCaesar Wang u32 val; 806cbac8f63SCaesar Wang 807cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_AUTO_CON); 808cbac8f63SCaesar Wang if (enable) 809cbac8f63SCaesar Wang val |= TSADCV2_AUTO_EN; 810cbac8f63SCaesar Wang else 811cbac8f63SCaesar Wang val &= ~TSADCV2_AUTO_EN; 812cbac8f63SCaesar Wang 813cbac8f63SCaesar Wang writel_relaxed(val, regs + TSADCV2_AUTO_CON); 814cbac8f63SCaesar Wang } 815cbac8f63SCaesar Wang 8167ea38c6cSCaesar Wang /** 817678065d5SCaesar Wang * rk_tsadcv3_control - the tsadc controller is enabled or disabled. 81866ec4bfcSAmit Kucheria * @regs: the base address of tsadc controller 81966ec4bfcSAmit Kucheria * @enable: boolean flag to enable the controller 820678065d5SCaesar Wang * 821678065d5SCaesar Wang * NOTE: TSADC controller works at auto mode, and some SoCs need set the 822678065d5SCaesar Wang * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output 823678065d5SCaesar Wang * adc value if setting this bit to enable. 8247ea38c6cSCaesar Wang */ 8257ea38c6cSCaesar Wang static void rk_tsadcv3_control(void __iomem *regs, bool enable) 8267ea38c6cSCaesar Wang { 8277ea38c6cSCaesar Wang u32 val; 8287ea38c6cSCaesar Wang 8297ea38c6cSCaesar Wang val = readl_relaxed(regs + TSADCV2_AUTO_CON); 8307ea38c6cSCaesar Wang if (enable) 8317ea38c6cSCaesar Wang val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN; 8327ea38c6cSCaesar Wang else 8337ea38c6cSCaesar Wang val &= ~TSADCV2_AUTO_EN; 8347ea38c6cSCaesar Wang 8357ea38c6cSCaesar Wang writel_relaxed(val, regs + TSADCV2_AUTO_CON); 8367ea38c6cSCaesar Wang } 8377ea38c6cSCaesar Wang 838cdd8b3f7SBrian Norris static int rk_tsadcv2_get_temp(const struct chip_tsadc_table *table, 839ce74110dSCaesar Wang int chn, void __iomem *regs, int *temp) 840cbac8f63SCaesar Wang { 841cbac8f63SCaesar Wang u32 val; 842cbac8f63SCaesar Wang 843cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_DATA(chn)); 844cbac8f63SCaesar Wang 845ce74110dSCaesar Wang return rk_tsadcv2_code_to_temp(table, val, temp); 846cbac8f63SCaesar Wang } 847cbac8f63SCaesar Wang 848d3530497SCaesar Wang static int rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table, 84914848502SCaesar Wang int chn, void __iomem *regs, int temp) 85014848502SCaesar Wang { 85118591addSCaesar Wang u32 alarm_value; 85218591addSCaesar Wang u32 int_en, int_clr; 85318591addSCaesar Wang 85418591addSCaesar Wang /* 85518591addSCaesar Wang * In some cases, some sensors didn't need the trip points, the 85618591addSCaesar Wang * set_trips will pass {-INT_MAX, INT_MAX} to trigger tsadc alarm 85718591addSCaesar Wang * in the end, ignore this case and disable the high temperature 85818591addSCaesar Wang * interrupt. 85918591addSCaesar Wang */ 86018591addSCaesar Wang if (temp == INT_MAX) { 86118591addSCaesar Wang int_clr = readl_relaxed(regs + TSADCV2_INT_EN); 86218591addSCaesar Wang int_clr &= ~TSADCV2_INT_SRC_EN(chn); 86318591addSCaesar Wang writel_relaxed(int_clr, regs + TSADCV2_INT_EN); 86418591addSCaesar Wang return 0; 86518591addSCaesar Wang } 86614848502SCaesar Wang 8671f09ba82SCaesar Wang /* Make sure the value is valid */ 86814848502SCaesar Wang alarm_value = rk_tsadcv2_temp_to_code(table, temp); 869cdd8b3f7SBrian Norris if (alarm_value == table->data_mask) 870d3530497SCaesar Wang return -ERANGE; 8711f09ba82SCaesar Wang 872cdd8b3f7SBrian Norris writel_relaxed(alarm_value & table->data_mask, 87314848502SCaesar Wang regs + TSADCV2_COMP_INT(chn)); 87414848502SCaesar Wang 87514848502SCaesar Wang int_en = readl_relaxed(regs + TSADCV2_INT_EN); 87614848502SCaesar Wang int_en |= TSADCV2_INT_SRC_EN(chn); 87714848502SCaesar Wang writel_relaxed(int_en, regs + TSADCV2_INT_EN); 878d3530497SCaesar Wang 879d3530497SCaesar Wang return 0; 88014848502SCaesar Wang } 88114848502SCaesar Wang 882d3530497SCaesar Wang static int rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table, 883437df217SCaesar Wang int chn, void __iomem *regs, int temp) 884cbac8f63SCaesar Wang { 885cbac8f63SCaesar Wang u32 tshut_value, val; 886cbac8f63SCaesar Wang 8871f09ba82SCaesar Wang /* Make sure the value is valid */ 888ce74110dSCaesar Wang tshut_value = rk_tsadcv2_temp_to_code(table, temp); 889cdd8b3f7SBrian Norris if (tshut_value == table->data_mask) 890d3530497SCaesar Wang return -ERANGE; 8911f09ba82SCaesar Wang 892cbac8f63SCaesar Wang writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn)); 893cbac8f63SCaesar Wang 894cbac8f63SCaesar Wang /* TSHUT will be valid */ 895cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_AUTO_CON); 896cbac8f63SCaesar Wang writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON); 897d3530497SCaesar Wang 898d3530497SCaesar Wang return 0; 899cbac8f63SCaesar Wang } 900cbac8f63SCaesar Wang 901cbac8f63SCaesar Wang static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs, 902cbac8f63SCaesar Wang enum tshut_mode mode) 903cbac8f63SCaesar Wang { 904cbac8f63SCaesar Wang u32 val; 905cbac8f63SCaesar Wang 906cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_INT_EN); 907cbac8f63SCaesar Wang if (mode == TSHUT_MODE_GPIO) { 908cbac8f63SCaesar Wang val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn); 909cbac8f63SCaesar Wang val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn); 910cbac8f63SCaesar Wang } else { 911cbac8f63SCaesar Wang val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn); 912cbac8f63SCaesar Wang val |= TSADCV2_SHUT_2CRU_SRC_EN(chn); 913cbac8f63SCaesar Wang } 914cbac8f63SCaesar Wang 915cbac8f63SCaesar Wang writel_relaxed(val, regs + TSADCV2_INT_EN); 916cbac8f63SCaesar Wang } 917cbac8f63SCaesar Wang 918ffd1b122SElaine Zhang static const struct rockchip_tsadc_chip px30_tsadc_data = { 919*f7cef1b7SSebastian Reichel /* cpu, gpu */ 920*f7cef1b7SSebastian Reichel .chn_offset = 0, 921ffd1b122SElaine Zhang .chn_num = 2, /* 2 channels for tsadc */ 922ffd1b122SElaine Zhang 923ffd1b122SElaine Zhang .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */ 924ffd1b122SElaine Zhang .tshut_temp = 95000, 925ffd1b122SElaine Zhang 926ffd1b122SElaine Zhang .initialize = rk_tsadcv4_initialize, 927ffd1b122SElaine Zhang .irq_ack = rk_tsadcv3_irq_ack, 928ffd1b122SElaine Zhang .control = rk_tsadcv3_control, 929ffd1b122SElaine Zhang .get_temp = rk_tsadcv2_get_temp, 930ffd1b122SElaine Zhang .set_alarm_temp = rk_tsadcv2_alarm_temp, 931ffd1b122SElaine Zhang .set_tshut_temp = rk_tsadcv2_tshut_temp, 932ffd1b122SElaine Zhang .set_tshut_mode = rk_tsadcv2_tshut_mode, 933ffd1b122SElaine Zhang 934ffd1b122SElaine Zhang .table = { 935ffd1b122SElaine Zhang .id = rk3328_code_table, 936ffd1b122SElaine Zhang .length = ARRAY_SIZE(rk3328_code_table), 937ffd1b122SElaine Zhang .data_mask = TSADCV2_DATA_MASK, 938ffd1b122SElaine Zhang .mode = ADC_INCREMENT, 939ffd1b122SElaine Zhang }, 940ffd1b122SElaine Zhang }; 941ffd1b122SElaine Zhang 9424eca8cacSRocky Hao static const struct rockchip_tsadc_chip rv1108_tsadc_data = { 943*f7cef1b7SSebastian Reichel /* cpu */ 944*f7cef1b7SSebastian Reichel .chn_offset = 0, 9454eca8cacSRocky Hao .chn_num = 1, /* one channel for tsadc */ 9464eca8cacSRocky Hao 9474eca8cacSRocky Hao .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 9484eca8cacSRocky Hao .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 9494eca8cacSRocky Hao .tshut_temp = 95000, 9504eca8cacSRocky Hao 9514eca8cacSRocky Hao .initialize = rk_tsadcv2_initialize, 9524eca8cacSRocky Hao .irq_ack = rk_tsadcv3_irq_ack, 9534eca8cacSRocky Hao .control = rk_tsadcv3_control, 9544eca8cacSRocky Hao .get_temp = rk_tsadcv2_get_temp, 9554eca8cacSRocky Hao .set_alarm_temp = rk_tsadcv2_alarm_temp, 9564eca8cacSRocky Hao .set_tshut_temp = rk_tsadcv2_tshut_temp, 9574eca8cacSRocky Hao .set_tshut_mode = rk_tsadcv2_tshut_mode, 9584eca8cacSRocky Hao 9594eca8cacSRocky Hao .table = { 9604eca8cacSRocky Hao .id = rv1108_table, 9614eca8cacSRocky Hao .length = ARRAY_SIZE(rv1108_table), 9624eca8cacSRocky Hao .data_mask = TSADCV2_DATA_MASK, 9634eca8cacSRocky Hao .mode = ADC_INCREMENT, 9644eca8cacSRocky Hao }, 9654eca8cacSRocky Hao }; 9664eca8cacSRocky Hao 9677b02a5e7SCaesar Wang static const struct rockchip_tsadc_chip rk3228_tsadc_data = { 968*f7cef1b7SSebastian Reichel /* cpu */ 969*f7cef1b7SSebastian Reichel .chn_offset = 0, 9707b02a5e7SCaesar Wang .chn_num = 1, /* one channel for tsadc */ 9717b02a5e7SCaesar Wang 9727b02a5e7SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 9737b02a5e7SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 9747b02a5e7SCaesar Wang .tshut_temp = 95000, 9757b02a5e7SCaesar Wang 9767b02a5e7SCaesar Wang .initialize = rk_tsadcv2_initialize, 977952418a3SCaesar Wang .irq_ack = rk_tsadcv3_irq_ack, 9787ea38c6cSCaesar Wang .control = rk_tsadcv3_control, 9797b02a5e7SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 98014848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 9817b02a5e7SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 9827b02a5e7SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 9837b02a5e7SCaesar Wang 9847b02a5e7SCaesar Wang .table = { 985952418a3SCaesar Wang .id = rk3228_code_table, 986952418a3SCaesar Wang .length = ARRAY_SIZE(rk3228_code_table), 9877b02a5e7SCaesar Wang .data_mask = TSADCV3_DATA_MASK, 9887ea38c6cSCaesar Wang .mode = ADC_INCREMENT, 9897b02a5e7SCaesar Wang }, 9907b02a5e7SCaesar Wang }; 9917b02a5e7SCaesar Wang 992cbac8f63SCaesar Wang static const struct rockchip_tsadc_chip rk3288_tsadc_data = { 993*f7cef1b7SSebastian Reichel /* cpu, gpu */ 994*f7cef1b7SSebastian Reichel .chn_offset = 1, 9951d98b618SCaesar Wang .chn_num = 2, /* two channels for tsadc */ 9961d98b618SCaesar Wang 997cbac8f63SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 998cbac8f63SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 999cbac8f63SCaesar Wang .tshut_temp = 95000, 1000cbac8f63SCaesar Wang 1001cbac8f63SCaesar Wang .initialize = rk_tsadcv2_initialize, 1002cbac8f63SCaesar Wang .irq_ack = rk_tsadcv2_irq_ack, 1003cbac8f63SCaesar Wang .control = rk_tsadcv2_control, 1004cbac8f63SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 100514848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 1006cbac8f63SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 1007cbac8f63SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 1008ce74110dSCaesar Wang 1009ce74110dSCaesar Wang .table = { 1010952418a3SCaesar Wang .id = rk3288_code_table, 1011952418a3SCaesar Wang .length = ARRAY_SIZE(rk3288_code_table), 1012ce74110dSCaesar Wang .data_mask = TSADCV2_DATA_MASK, 1013020ba95dSCaesar Wang .mode = ADC_DECREMENT, 1014ce74110dSCaesar Wang }, 1015cbac8f63SCaesar Wang }; 1016cbac8f63SCaesar Wang 1017eda519d5SRocky Hao static const struct rockchip_tsadc_chip rk3328_tsadc_data = { 1018*f7cef1b7SSebastian Reichel /* cpu */ 1019*f7cef1b7SSebastian Reichel .chn_offset = 0, 1020eda519d5SRocky Hao .chn_num = 1, /* one channels for tsadc */ 1021eda519d5SRocky Hao 1022eda519d5SRocky Hao .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */ 1023eda519d5SRocky Hao .tshut_temp = 95000, 1024eda519d5SRocky Hao 1025eda519d5SRocky Hao .initialize = rk_tsadcv2_initialize, 1026eda519d5SRocky Hao .irq_ack = rk_tsadcv3_irq_ack, 1027eda519d5SRocky Hao .control = rk_tsadcv3_control, 1028eda519d5SRocky Hao .get_temp = rk_tsadcv2_get_temp, 1029eda519d5SRocky Hao .set_alarm_temp = rk_tsadcv2_alarm_temp, 1030eda519d5SRocky Hao .set_tshut_temp = rk_tsadcv2_tshut_temp, 1031eda519d5SRocky Hao .set_tshut_mode = rk_tsadcv2_tshut_mode, 1032eda519d5SRocky Hao 1033eda519d5SRocky Hao .table = { 1034eda519d5SRocky Hao .id = rk3328_code_table, 1035eda519d5SRocky Hao .length = ARRAY_SIZE(rk3328_code_table), 1036eda519d5SRocky Hao .data_mask = TSADCV2_DATA_MASK, 1037eda519d5SRocky Hao .mode = ADC_INCREMENT, 1038eda519d5SRocky Hao }, 1039eda519d5SRocky Hao }; 1040eda519d5SRocky Hao 10411cd60269SElaine Zhang static const struct rockchip_tsadc_chip rk3366_tsadc_data = { 1042*f7cef1b7SSebastian Reichel /* cpu, gpu */ 1043*f7cef1b7SSebastian Reichel .chn_offset = 0, 10441cd60269SElaine Zhang .chn_num = 2, /* two channels for tsadc */ 10451cd60269SElaine Zhang 10461cd60269SElaine Zhang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 10471cd60269SElaine Zhang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 10481cd60269SElaine Zhang .tshut_temp = 95000, 10491cd60269SElaine Zhang 10501cd60269SElaine Zhang .initialize = rk_tsadcv3_initialize, 10511cd60269SElaine Zhang .irq_ack = rk_tsadcv3_irq_ack, 10521cd60269SElaine Zhang .control = rk_tsadcv3_control, 10531cd60269SElaine Zhang .get_temp = rk_tsadcv2_get_temp, 105414848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 10551cd60269SElaine Zhang .set_tshut_temp = rk_tsadcv2_tshut_temp, 10561cd60269SElaine Zhang .set_tshut_mode = rk_tsadcv2_tshut_mode, 10571cd60269SElaine Zhang 10581cd60269SElaine Zhang .table = { 10591cd60269SElaine Zhang .id = rk3228_code_table, 10601cd60269SElaine Zhang .length = ARRAY_SIZE(rk3228_code_table), 10611cd60269SElaine Zhang .data_mask = TSADCV3_DATA_MASK, 10621cd60269SElaine Zhang .mode = ADC_INCREMENT, 10631cd60269SElaine Zhang }, 10641cd60269SElaine Zhang }; 10651cd60269SElaine Zhang 106620f0af75SCaesar Wang static const struct rockchip_tsadc_chip rk3368_tsadc_data = { 1067*f7cef1b7SSebastian Reichel /* cpu, gpu */ 1068*f7cef1b7SSebastian Reichel .chn_offset = 0, 106920f0af75SCaesar Wang .chn_num = 2, /* two channels for tsadc */ 107020f0af75SCaesar Wang 107120f0af75SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 107220f0af75SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 107320f0af75SCaesar Wang .tshut_temp = 95000, 107420f0af75SCaesar Wang 107520f0af75SCaesar Wang .initialize = rk_tsadcv2_initialize, 107620f0af75SCaesar Wang .irq_ack = rk_tsadcv2_irq_ack, 107720f0af75SCaesar Wang .control = rk_tsadcv2_control, 107820f0af75SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 107914848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 108020f0af75SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 108120f0af75SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 108220f0af75SCaesar Wang 108320f0af75SCaesar Wang .table = { 1084952418a3SCaesar Wang .id = rk3368_code_table, 1085952418a3SCaesar Wang .length = ARRAY_SIZE(rk3368_code_table), 108620f0af75SCaesar Wang .data_mask = TSADCV3_DATA_MASK, 108720f0af75SCaesar Wang .mode = ADC_INCREMENT, 108820f0af75SCaesar Wang }, 108920f0af75SCaesar Wang }; 109020f0af75SCaesar Wang 1091b0d70338SCaesar Wang static const struct rockchip_tsadc_chip rk3399_tsadc_data = { 1092*f7cef1b7SSebastian Reichel /* cpu, gpu */ 1093*f7cef1b7SSebastian Reichel .chn_offset = 0, 1094b0d70338SCaesar Wang .chn_num = 2, /* two channels for tsadc */ 1095b0d70338SCaesar Wang 1096b0d70338SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 1097b0d70338SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 1098b0d70338SCaesar Wang .tshut_temp = 95000, 1099b0d70338SCaesar Wang 1100b9484763SCaesar Wang .initialize = rk_tsadcv3_initialize, 1101952418a3SCaesar Wang .irq_ack = rk_tsadcv3_irq_ack, 11027ea38c6cSCaesar Wang .control = rk_tsadcv3_control, 1103b0d70338SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 110414848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 1105b0d70338SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 1106b0d70338SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 1107b0d70338SCaesar Wang 1108b0d70338SCaesar Wang .table = { 1109952418a3SCaesar Wang .id = rk3399_code_table, 1110952418a3SCaesar Wang .length = ARRAY_SIZE(rk3399_code_table), 1111b0d70338SCaesar Wang .data_mask = TSADCV3_DATA_MASK, 11127ea38c6cSCaesar Wang .mode = ADC_INCREMENT, 1113b0d70338SCaesar Wang }, 1114b0d70338SCaesar Wang }; 1115b0d70338SCaesar Wang 111616bee043SFinley Xiao static const struct rockchip_tsadc_chip rk3568_tsadc_data = { 1117*f7cef1b7SSebastian Reichel /* cpu, gpu */ 1118*f7cef1b7SSebastian Reichel .chn_offset = 0, 111916bee043SFinley Xiao .chn_num = 2, /* two channels for tsadc */ 112016bee043SFinley Xiao 112116bee043SFinley Xiao .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 112216bee043SFinley Xiao .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 112316bee043SFinley Xiao .tshut_temp = 95000, 112416bee043SFinley Xiao 112516bee043SFinley Xiao .initialize = rk_tsadcv7_initialize, 112616bee043SFinley Xiao .irq_ack = rk_tsadcv3_irq_ack, 112716bee043SFinley Xiao .control = rk_tsadcv3_control, 112816bee043SFinley Xiao .get_temp = rk_tsadcv2_get_temp, 112916bee043SFinley Xiao .set_alarm_temp = rk_tsadcv2_alarm_temp, 113016bee043SFinley Xiao .set_tshut_temp = rk_tsadcv2_tshut_temp, 113116bee043SFinley Xiao .set_tshut_mode = rk_tsadcv2_tshut_mode, 113216bee043SFinley Xiao 113316bee043SFinley Xiao .table = { 113416bee043SFinley Xiao .id = rk3568_code_table, 113516bee043SFinley Xiao .length = ARRAY_SIZE(rk3568_code_table), 113616bee043SFinley Xiao .data_mask = TSADCV2_DATA_MASK, 113716bee043SFinley Xiao .mode = ADC_INCREMENT, 113816bee043SFinley Xiao }, 113916bee043SFinley Xiao }; 114016bee043SFinley Xiao 1141cbac8f63SCaesar Wang static const struct of_device_id of_rockchip_thermal_match[] = { 1142ffd1b122SElaine Zhang { .compatible = "rockchip,px30-tsadc", 1143ffd1b122SElaine Zhang .data = (void *)&px30_tsadc_data, 1144ffd1b122SElaine Zhang }, 1145cbac8f63SCaesar Wang { 11464eca8cacSRocky Hao .compatible = "rockchip,rv1108-tsadc", 11474eca8cacSRocky Hao .data = (void *)&rv1108_tsadc_data, 11484eca8cacSRocky Hao }, 11494eca8cacSRocky Hao { 11507b02a5e7SCaesar Wang .compatible = "rockchip,rk3228-tsadc", 11517b02a5e7SCaesar Wang .data = (void *)&rk3228_tsadc_data, 11527b02a5e7SCaesar Wang }, 11537b02a5e7SCaesar Wang { 1154cbac8f63SCaesar Wang .compatible = "rockchip,rk3288-tsadc", 1155cbac8f63SCaesar Wang .data = (void *)&rk3288_tsadc_data, 1156cbac8f63SCaesar Wang }, 115720f0af75SCaesar Wang { 1158eda519d5SRocky Hao .compatible = "rockchip,rk3328-tsadc", 1159eda519d5SRocky Hao .data = (void *)&rk3328_tsadc_data, 1160eda519d5SRocky Hao }, 1161eda519d5SRocky Hao { 11621cd60269SElaine Zhang .compatible = "rockchip,rk3366-tsadc", 11631cd60269SElaine Zhang .data = (void *)&rk3366_tsadc_data, 11641cd60269SElaine Zhang }, 11651cd60269SElaine Zhang { 116620f0af75SCaesar Wang .compatible = "rockchip,rk3368-tsadc", 116720f0af75SCaesar Wang .data = (void *)&rk3368_tsadc_data, 116820f0af75SCaesar Wang }, 1169b0d70338SCaesar Wang { 1170b0d70338SCaesar Wang .compatible = "rockchip,rk3399-tsadc", 1171b0d70338SCaesar Wang .data = (void *)&rk3399_tsadc_data, 1172b0d70338SCaesar Wang }, 117316bee043SFinley Xiao { 117416bee043SFinley Xiao .compatible = "rockchip,rk3568-tsadc", 117516bee043SFinley Xiao .data = (void *)&rk3568_tsadc_data, 117616bee043SFinley Xiao }, 1177cbac8f63SCaesar Wang { /* end */ }, 1178cbac8f63SCaesar Wang }; 1179cbac8f63SCaesar Wang MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); 1180cbac8f63SCaesar Wang 1181cbac8f63SCaesar Wang static void 1182cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on) 1183cbac8f63SCaesar Wang { 1184cbac8f63SCaesar Wang struct thermal_zone_device *tzd = sensor->tzd; 1185cbac8f63SCaesar Wang 11867f4957beSAndrzej Pietrasiewicz if (on) 11877f4957beSAndrzej Pietrasiewicz thermal_zone_device_enable(tzd); 11887f4957beSAndrzej Pietrasiewicz else 11897f4957beSAndrzej Pietrasiewicz thermal_zone_device_disable(tzd); 1190cbac8f63SCaesar Wang } 1191cbac8f63SCaesar Wang 1192cbac8f63SCaesar Wang static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev) 1193cbac8f63SCaesar Wang { 1194cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal = dev; 1195cbac8f63SCaesar Wang int i; 1196cbac8f63SCaesar Wang 1197cbac8f63SCaesar Wang dev_dbg(&thermal->pdev->dev, "thermal alarm\n"); 1198cbac8f63SCaesar Wang 1199cbac8f63SCaesar Wang thermal->chip->irq_ack(thermal->regs); 1200cbac8f63SCaesar Wang 12011d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 12020e70f466SSrinivas Pandruvada thermal_zone_device_update(thermal->sensors[i].tzd, 12030e70f466SSrinivas Pandruvada THERMAL_EVENT_UNSPECIFIED); 1204cbac8f63SCaesar Wang 1205cbac8f63SCaesar Wang return IRQ_HANDLED; 1206cbac8f63SCaesar Wang } 1207cbac8f63SCaesar Wang 120890b2ca02SDaniel Lezcano static int rockchip_thermal_set_trips(struct thermal_zone_device *tz, int low, int high) 120914848502SCaesar Wang { 12105f68d078SDaniel Lezcano struct rockchip_thermal_sensor *sensor = thermal_zone_device_priv(tz); 121114848502SCaesar Wang struct rockchip_thermal_data *thermal = sensor->thermal; 121214848502SCaesar Wang const struct rockchip_tsadc_chip *tsadc = thermal->chip; 121314848502SCaesar Wang 121414848502SCaesar Wang dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n", 121514848502SCaesar Wang __func__, sensor->id, low, high); 121614848502SCaesar Wang 1217d3530497SCaesar Wang return tsadc->set_alarm_temp(&tsadc->table, 121814848502SCaesar Wang sensor->id, thermal->regs, high); 121914848502SCaesar Wang } 122014848502SCaesar Wang 122190b2ca02SDaniel Lezcano static int rockchip_thermal_get_temp(struct thermal_zone_device *tz, int *out_temp) 1222cbac8f63SCaesar Wang { 12235f68d078SDaniel Lezcano struct rockchip_thermal_sensor *sensor = thermal_zone_device_priv(tz); 1224cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal = sensor->thermal; 1225cbac8f63SCaesar Wang const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip; 1226cbac8f63SCaesar Wang int retval; 1227cbac8f63SCaesar Wang 1228cdd8b3f7SBrian Norris retval = tsadc->get_temp(&tsadc->table, 1229ce74110dSCaesar Wang sensor->id, thermal->regs, out_temp); 1230cbac8f63SCaesar Wang return retval; 1231cbac8f63SCaesar Wang } 1232cbac8f63SCaesar Wang 123390b2ca02SDaniel Lezcano static const struct thermal_zone_device_ops rockchip_of_thermal_ops = { 1234cbac8f63SCaesar Wang .get_temp = rockchip_thermal_get_temp, 123514848502SCaesar Wang .set_trips = rockchip_thermal_set_trips, 1236cbac8f63SCaesar Wang }; 1237cbac8f63SCaesar Wang 1238cbac8f63SCaesar Wang static int rockchip_configure_from_dt(struct device *dev, 1239cbac8f63SCaesar Wang struct device_node *np, 1240cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal) 1241cbac8f63SCaesar Wang { 1242cbac8f63SCaesar Wang u32 shut_temp, tshut_mode, tshut_polarity; 1243cbac8f63SCaesar Wang 1244cbac8f63SCaesar Wang if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) { 1245cbac8f63SCaesar Wang dev_warn(dev, 1246437df217SCaesar Wang "Missing tshut temp property, using default %d\n", 1247cbac8f63SCaesar Wang thermal->chip->tshut_temp); 1248cbac8f63SCaesar Wang thermal->tshut_temp = thermal->chip->tshut_temp; 1249cbac8f63SCaesar Wang } else { 125043b4eb9fSCaesar Wang if (shut_temp > INT_MAX) { 1251437df217SCaesar Wang dev_err(dev, "Invalid tshut temperature specified: %d\n", 125243b4eb9fSCaesar Wang shut_temp); 1253cbac8f63SCaesar Wang return -ERANGE; 1254cbac8f63SCaesar Wang } 125543b4eb9fSCaesar Wang thermal->tshut_temp = shut_temp; 125643b4eb9fSCaesar Wang } 1257cbac8f63SCaesar Wang 1258cbac8f63SCaesar Wang if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) { 1259cbac8f63SCaesar Wang dev_warn(dev, 1260cbac8f63SCaesar Wang "Missing tshut mode property, using default (%s)\n", 1261cbac8f63SCaesar Wang thermal->chip->tshut_mode == TSHUT_MODE_GPIO ? 1262cbac8f63SCaesar Wang "gpio" : "cru"); 1263cbac8f63SCaesar Wang thermal->tshut_mode = thermal->chip->tshut_mode; 1264cbac8f63SCaesar Wang } else { 1265cbac8f63SCaesar Wang thermal->tshut_mode = tshut_mode; 1266cbac8f63SCaesar Wang } 1267cbac8f63SCaesar Wang 1268cbac8f63SCaesar Wang if (thermal->tshut_mode > 1) { 1269cbac8f63SCaesar Wang dev_err(dev, "Invalid tshut mode specified: %d\n", 1270cbac8f63SCaesar Wang thermal->tshut_mode); 1271cbac8f63SCaesar Wang return -EINVAL; 1272cbac8f63SCaesar Wang } 1273cbac8f63SCaesar Wang 1274cbac8f63SCaesar Wang if (of_property_read_u32(np, "rockchip,hw-tshut-polarity", 1275cbac8f63SCaesar Wang &tshut_polarity)) { 1276cbac8f63SCaesar Wang dev_warn(dev, 1277cbac8f63SCaesar Wang "Missing tshut-polarity property, using default (%s)\n", 1278cbac8f63SCaesar Wang thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ? 1279cbac8f63SCaesar Wang "low" : "high"); 1280cbac8f63SCaesar Wang thermal->tshut_polarity = thermal->chip->tshut_polarity; 1281cbac8f63SCaesar Wang } else { 1282cbac8f63SCaesar Wang thermal->tshut_polarity = tshut_polarity; 1283cbac8f63SCaesar Wang } 1284cbac8f63SCaesar Wang 1285cbac8f63SCaesar Wang if (thermal->tshut_polarity > 1) { 1286cbac8f63SCaesar Wang dev_err(dev, "Invalid tshut-polarity specified: %d\n", 1287cbac8f63SCaesar Wang thermal->tshut_polarity); 1288cbac8f63SCaesar Wang return -EINVAL; 1289cbac8f63SCaesar Wang } 1290cbac8f63SCaesar Wang 1291b9484763SCaesar Wang /* The tsadc wont to handle the error in here since some SoCs didn't 1292b9484763SCaesar Wang * need this property. 1293b9484763SCaesar Wang */ 1294b9484763SCaesar Wang thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); 1295ce62abaeSShawn Lin if (IS_ERR(thermal->grf)) 1296ce62abaeSShawn Lin dev_warn(dev, "Missing rockchip,grf property\n"); 1297b9484763SCaesar Wang 1298cbac8f63SCaesar Wang return 0; 1299cbac8f63SCaesar Wang } 1300cbac8f63SCaesar Wang 1301cbac8f63SCaesar Wang static int 1302cbac8f63SCaesar Wang rockchip_thermal_register_sensor(struct platform_device *pdev, 1303cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal, 1304cbac8f63SCaesar Wang struct rockchip_thermal_sensor *sensor, 13051d98b618SCaesar Wang int id) 1306cbac8f63SCaesar Wang { 1307cbac8f63SCaesar Wang const struct rockchip_tsadc_chip *tsadc = thermal->chip; 1308cbac8f63SCaesar Wang int error; 1309cbac8f63SCaesar Wang 1310cbac8f63SCaesar Wang tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode); 1311d3530497SCaesar Wang 1312d3530497SCaesar Wang error = tsadc->set_tshut_temp(&tsadc->table, id, thermal->regs, 1313ce74110dSCaesar Wang thermal->tshut_temp); 1314d3530497SCaesar Wang if (error) 1315d3530497SCaesar Wang dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n", 1316d3530497SCaesar Wang __func__, thermal->tshut_temp, error); 1317cbac8f63SCaesar Wang 1318cbac8f63SCaesar Wang sensor->thermal = thermal; 1319cbac8f63SCaesar Wang sensor->id = id; 132090b2ca02SDaniel Lezcano sensor->tzd = devm_thermal_of_zone_register(&pdev->dev, id, sensor, 132190b2ca02SDaniel Lezcano &rockchip_of_thermal_ops); 1322cbac8f63SCaesar Wang if (IS_ERR(sensor->tzd)) { 1323cbac8f63SCaesar Wang error = PTR_ERR(sensor->tzd); 1324cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to register sensor %d: %d\n", 1325cbac8f63SCaesar Wang id, error); 1326cbac8f63SCaesar Wang return error; 1327cbac8f63SCaesar Wang } 1328cbac8f63SCaesar Wang 1329cbac8f63SCaesar Wang return 0; 1330cbac8f63SCaesar Wang } 1331cbac8f63SCaesar Wang 133213c1cfdaSCaesar Wang /** 13336d5dad7bSRandy Dunlap * rockchip_thermal_reset_controller - Reset TSADC Controller, reset all tsadc registers. 133466ec4bfcSAmit Kucheria * @reset: the reset controller of tsadc 1335cbac8f63SCaesar Wang */ 1336cbac8f63SCaesar Wang static void rockchip_thermal_reset_controller(struct reset_control *reset) 1337cbac8f63SCaesar Wang { 1338cbac8f63SCaesar Wang reset_control_assert(reset); 1339cbac8f63SCaesar Wang usleep_range(10, 20); 1340cbac8f63SCaesar Wang reset_control_deassert(reset); 1341cbac8f63SCaesar Wang } 1342cbac8f63SCaesar Wang 1343cbac8f63SCaesar Wang static int rockchip_thermal_probe(struct platform_device *pdev) 1344cbac8f63SCaesar Wang { 1345cbac8f63SCaesar Wang struct device_node *np = pdev->dev.of_node; 1346cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal; 1347cbac8f63SCaesar Wang int irq; 13482633ad19SEduardo Valentin int i; 1349cbac8f63SCaesar Wang int error; 1350cbac8f63SCaesar Wang 1351cbac8f63SCaesar Wang irq = platform_get_irq(pdev, 0); 13528cb775bbSMarkus Elfring if (irq < 0) 1353cbac8f63SCaesar Wang return -EINVAL; 1354cbac8f63SCaesar Wang 1355cbac8f63SCaesar Wang thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data), 1356cbac8f63SCaesar Wang GFP_KERNEL); 1357cbac8f63SCaesar Wang if (!thermal) 1358cbac8f63SCaesar Wang return -ENOMEM; 1359cbac8f63SCaesar Wang 1360cbac8f63SCaesar Wang thermal->pdev = pdev; 1361cbac8f63SCaesar Wang 1362f1d2427cSSebastian Reichel thermal->chip = device_get_match_data(&pdev->dev); 1363cbac8f63SCaesar Wang if (!thermal->chip) 1364cbac8f63SCaesar Wang return -EINVAL; 1365cbac8f63SCaesar Wang 13662484b632Sye xingchen thermal->regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 1367cbac8f63SCaesar Wang if (IS_ERR(thermal->regs)) 1368cbac8f63SCaesar Wang return PTR_ERR(thermal->regs); 1369cbac8f63SCaesar Wang 137002832ed8SJohan Jonker thermal->reset = devm_reset_control_array_get(&pdev->dev, false, false); 1371cb71c5f9SSebastian Reichel if (IS_ERR(thermal->reset)) 1372cb71c5f9SSebastian Reichel return dev_err_probe(&pdev->dev, PTR_ERR(thermal->reset), 1373cb71c5f9SSebastian Reichel "failed to get tsadc reset.\n"); 1374cbac8f63SCaesar Wang 13752f6916f1SSebastian Reichel thermal->clk = devm_clk_get_enabled(&pdev->dev, "tsadc"); 1376cb71c5f9SSebastian Reichel if (IS_ERR(thermal->clk)) 1377cb71c5f9SSebastian Reichel return dev_err_probe(&pdev->dev, PTR_ERR(thermal->clk), 1378cb71c5f9SSebastian Reichel "failed to get tsadc clock.\n"); 1379cbac8f63SCaesar Wang 13802f6916f1SSebastian Reichel thermal->pclk = devm_clk_get_enabled(&pdev->dev, "apb_pclk"); 1381cb71c5f9SSebastian Reichel if (IS_ERR(thermal->pclk)) 1382cb71c5f9SSebastian Reichel return dev_err_probe(&pdev->dev, PTR_ERR(thermal->pclk), 1383cb71c5f9SSebastian Reichel "failed to get apb_pclk clock.\n"); 1384cbac8f63SCaesar Wang 1385cbac8f63SCaesar Wang rockchip_thermal_reset_controller(thermal->reset); 1386cbac8f63SCaesar Wang 1387cbac8f63SCaesar Wang error = rockchip_configure_from_dt(&pdev->dev, np, thermal); 1388cb71c5f9SSebastian Reichel if (error) 1389cb71c5f9SSebastian Reichel return dev_err_probe(&pdev->dev, error, 1390cb71c5f9SSebastian Reichel "failed to parse device tree data\n"); 1391cbac8f63SCaesar Wang 1392b9484763SCaesar Wang thermal->chip->initialize(thermal->grf, thermal->regs, 1393b9484763SCaesar Wang thermal->tshut_polarity); 1394cbac8f63SCaesar Wang 13951d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) { 1396cbac8f63SCaesar Wang error = rockchip_thermal_register_sensor(pdev, thermal, 13971d98b618SCaesar Wang &thermal->sensors[i], 1398*f7cef1b7SSebastian Reichel thermal->chip->chn_offset + i); 1399cb71c5f9SSebastian Reichel if (error) 1400cb71c5f9SSebastian Reichel return dev_err_probe(&pdev->dev, error, 1401cb71c5f9SSebastian Reichel "failed to register sensor[%d].\n", i); 1402cbac8f63SCaesar Wang } 1403cbac8f63SCaesar Wang 1404cbac8f63SCaesar Wang error = devm_request_threaded_irq(&pdev->dev, irq, NULL, 1405cbac8f63SCaesar Wang &rockchip_thermal_alarm_irq_thread, 1406cbac8f63SCaesar Wang IRQF_ONESHOT, 1407cbac8f63SCaesar Wang "rockchip_thermal", thermal); 1408cb71c5f9SSebastian Reichel if (error) 1409cb71c5f9SSebastian Reichel return dev_err_probe(&pdev->dev, error, 1410cb71c5f9SSebastian Reichel "failed to request tsadc irq.\n"); 1411cbac8f63SCaesar Wang 1412cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, true); 1413cbac8f63SCaesar Wang 1414d27970b8SStefan Schaeckeler for (i = 0; i < thermal->chip->chn_num; i++) { 1415cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); 1416d27970b8SStefan Schaeckeler error = thermal_add_hwmon_sysfs(thermal->sensors[i].tzd); 1417d27970b8SStefan Schaeckeler if (error) 1418d27970b8SStefan Schaeckeler dev_warn(&pdev->dev, 1419d27970b8SStefan Schaeckeler "failed to register sensor %d with hwmon: %d\n", 1420d27970b8SStefan Schaeckeler i, error); 1421d27970b8SStefan Schaeckeler } 1422cbac8f63SCaesar Wang 1423cbac8f63SCaesar Wang platform_set_drvdata(pdev, thermal); 1424cbac8f63SCaesar Wang 1425cbac8f63SCaesar Wang return 0; 1426cbac8f63SCaesar Wang } 1427cbac8f63SCaesar Wang 1428cbac8f63SCaesar Wang static int rockchip_thermal_remove(struct platform_device *pdev) 1429cbac8f63SCaesar Wang { 1430cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); 1431cbac8f63SCaesar Wang int i; 1432cbac8f63SCaesar Wang 14331d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) { 1434cbac8f63SCaesar Wang struct rockchip_thermal_sensor *sensor = &thermal->sensors[i]; 1435cbac8f63SCaesar Wang 1436d27970b8SStefan Schaeckeler thermal_remove_hwmon_sysfs(sensor->tzd); 1437cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(sensor, false); 1438cbac8f63SCaesar Wang } 1439cbac8f63SCaesar Wang 1440cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, false); 1441cbac8f63SCaesar Wang 1442cbac8f63SCaesar Wang return 0; 1443cbac8f63SCaesar Wang } 1444cbac8f63SCaesar Wang 1445cbac8f63SCaesar Wang static int __maybe_unused rockchip_thermal_suspend(struct device *dev) 1446cbac8f63SCaesar Wang { 144726d84c27SWolfram Sang struct rockchip_thermal_data *thermal = dev_get_drvdata(dev); 1448cbac8f63SCaesar Wang int i; 1449cbac8f63SCaesar Wang 14501d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 1451cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(&thermal->sensors[i], false); 1452cbac8f63SCaesar Wang 1453cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, false); 1454cbac8f63SCaesar Wang 1455cbac8f63SCaesar Wang clk_disable(thermal->pclk); 1456cbac8f63SCaesar Wang clk_disable(thermal->clk); 14570f5ee062SHeiko Stuebner 14580f5ee062SHeiko Stuebner pinctrl_pm_select_sleep_state(dev); 14597e38a5b1SCaesar Wang 1460cbac8f63SCaesar Wang return 0; 1461cbac8f63SCaesar Wang } 1462cbac8f63SCaesar Wang 1463cbac8f63SCaesar Wang static int __maybe_unused rockchip_thermal_resume(struct device *dev) 1464cbac8f63SCaesar Wang { 146526d84c27SWolfram Sang struct rockchip_thermal_data *thermal = dev_get_drvdata(dev); 1466cbac8f63SCaesar Wang int i; 1467cbac8f63SCaesar Wang int error; 1468cbac8f63SCaesar Wang 1469cbac8f63SCaesar Wang error = clk_enable(thermal->clk); 1470cbac8f63SCaesar Wang if (error) 1471cbac8f63SCaesar Wang return error; 1472cbac8f63SCaesar Wang 1473cbac8f63SCaesar Wang error = clk_enable(thermal->pclk); 1474ab5b52f1SShawn Lin if (error) { 1475ab5b52f1SShawn Lin clk_disable(thermal->clk); 1476cbac8f63SCaesar Wang return error; 1477ab5b52f1SShawn Lin } 1478cbac8f63SCaesar Wang 1479cbac8f63SCaesar Wang rockchip_thermal_reset_controller(thermal->reset); 1480cbac8f63SCaesar Wang 1481b9484763SCaesar Wang thermal->chip->initialize(thermal->grf, thermal->regs, 1482b9484763SCaesar Wang thermal->tshut_polarity); 1483cbac8f63SCaesar Wang 14841d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) { 14851d98b618SCaesar Wang int id = thermal->sensors[i].id; 1486cbac8f63SCaesar Wang 1487cbac8f63SCaesar Wang thermal->chip->set_tshut_mode(id, thermal->regs, 1488cbac8f63SCaesar Wang thermal->tshut_mode); 1489d3530497SCaesar Wang 1490d3530497SCaesar Wang error = thermal->chip->set_tshut_temp(&thermal->chip->table, 1491ce74110dSCaesar Wang id, thermal->regs, 1492cbac8f63SCaesar Wang thermal->tshut_temp); 1493d3530497SCaesar Wang if (error) 149426d84c27SWolfram Sang dev_err(dev, "%s: invalid tshut=%d, error=%d\n", 1495d3530497SCaesar Wang __func__, thermal->tshut_temp, error); 1496cbac8f63SCaesar Wang } 1497cbac8f63SCaesar Wang 1498cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, true); 1499cbac8f63SCaesar Wang 15001d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 1501cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); 1502cbac8f63SCaesar Wang 15030f5ee062SHeiko Stuebner pinctrl_pm_select_default_state(dev); 15047e38a5b1SCaesar Wang 1505cbac8f63SCaesar Wang return 0; 1506cbac8f63SCaesar Wang } 1507cbac8f63SCaesar Wang 1508cbac8f63SCaesar Wang static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops, 1509cbac8f63SCaesar Wang rockchip_thermal_suspend, rockchip_thermal_resume); 1510cbac8f63SCaesar Wang 1511cbac8f63SCaesar Wang static struct platform_driver rockchip_thermal_driver = { 1512cbac8f63SCaesar Wang .driver = { 1513cbac8f63SCaesar Wang .name = "rockchip-thermal", 1514cbac8f63SCaesar Wang .pm = &rockchip_thermal_pm_ops, 1515cbac8f63SCaesar Wang .of_match_table = of_rockchip_thermal_match, 1516cbac8f63SCaesar Wang }, 1517cbac8f63SCaesar Wang .probe = rockchip_thermal_probe, 1518cbac8f63SCaesar Wang .remove = rockchip_thermal_remove, 1519cbac8f63SCaesar Wang }; 1520cbac8f63SCaesar Wang 1521cbac8f63SCaesar Wang module_platform_driver(rockchip_thermal_driver); 1522cbac8f63SCaesar Wang 1523cbac8f63SCaesar Wang MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver"); 1524cbac8f63SCaesar Wang MODULE_AUTHOR("Rockchip, Inc."); 1525cbac8f63SCaesar Wang MODULE_LICENSE("GPL v2"); 1526cbac8f63SCaesar Wang MODULE_ALIAS("platform:rockchip-thermal"); 1527