1cbac8f63SCaesar Wang /* 2678065d5SCaesar Wang * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd 320f0af75SCaesar Wang * Caesar Wang <wxt@rock-chips.com> 420f0af75SCaesar Wang * 5cbac8f63SCaesar Wang * This program is free software; you can redistribute it and/or modify it 6cbac8f63SCaesar Wang * under the terms and conditions of the GNU General Public License, 7cbac8f63SCaesar Wang * version 2, as published by the Free Software Foundation. 8cbac8f63SCaesar Wang * 9cbac8f63SCaesar Wang * This program is distributed in the hope it will be useful, but WITHOUT 10cbac8f63SCaesar Wang * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11cbac8f63SCaesar Wang * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12cbac8f63SCaesar Wang * more details. 13cbac8f63SCaesar Wang */ 14cbac8f63SCaesar Wang 15cbac8f63SCaesar Wang #include <linux/clk.h> 16cbac8f63SCaesar Wang #include <linux/delay.h> 17cbac8f63SCaesar Wang #include <linux/interrupt.h> 18cbac8f63SCaesar Wang #include <linux/io.h> 19cbac8f63SCaesar Wang #include <linux/module.h> 20cbac8f63SCaesar Wang #include <linux/of.h> 21cbac8f63SCaesar Wang #include <linux/of_address.h> 22cbac8f63SCaesar Wang #include <linux/of_irq.h> 23cbac8f63SCaesar Wang #include <linux/platform_device.h> 24b9484763SCaesar Wang #include <linux/regmap.h> 25cbac8f63SCaesar Wang #include <linux/reset.h> 26cbac8f63SCaesar Wang #include <linux/thermal.h> 27b9484763SCaesar Wang #include <linux/mfd/syscon.h> 28c970872eSCaesar Wang #include <linux/pinctrl/consumer.h> 29cbac8f63SCaesar Wang 30cbac8f63SCaesar Wang /** 31cbac8f63SCaesar Wang * If the temperature over a period of time High, 32cbac8f63SCaesar Wang * the resulting TSHUT gave CRU module,let it reset the entire chip, 33cbac8f63SCaesar Wang * or via GPIO give PMIC. 34cbac8f63SCaesar Wang */ 35cbac8f63SCaesar Wang enum tshut_mode { 36cbac8f63SCaesar Wang TSHUT_MODE_CRU = 0, 37cbac8f63SCaesar Wang TSHUT_MODE_GPIO, 38cbac8f63SCaesar Wang }; 39cbac8f63SCaesar Wang 40cbac8f63SCaesar Wang /** 4113c1cfdaSCaesar Wang * The system Temperature Sensors tshut(tshut) polarity 42cbac8f63SCaesar Wang * the bit 8 is tshut polarity. 43cbac8f63SCaesar Wang * 0: low active, 1: high active 44cbac8f63SCaesar Wang */ 45cbac8f63SCaesar Wang enum tshut_polarity { 46cbac8f63SCaesar Wang TSHUT_LOW_ACTIVE = 0, 47cbac8f63SCaesar Wang TSHUT_HIGH_ACTIVE, 48cbac8f63SCaesar Wang }; 49cbac8f63SCaesar Wang 50cbac8f63SCaesar Wang /** 511d98b618SCaesar Wang * The system has two Temperature Sensors. 521d98b618SCaesar Wang * sensor0 is for CPU, and sensor1 is for GPU. 53cbac8f63SCaesar Wang */ 54cbac8f63SCaesar Wang enum sensor_id { 551d98b618SCaesar Wang SENSOR_CPU = 0, 56cbac8f63SCaesar Wang SENSOR_GPU, 57cbac8f63SCaesar Wang }; 58cbac8f63SCaesar Wang 591d98b618SCaesar Wang /** 60020ba95dSCaesar Wang * The conversion table has the adc value and temperature. 61952418a3SCaesar Wang * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table) 62952418a3SCaesar Wang * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table) 63020ba95dSCaesar Wang */ 64020ba95dSCaesar Wang enum adc_sort_mode { 65020ba95dSCaesar Wang ADC_DECREMENT = 0, 66020ba95dSCaesar Wang ADC_INCREMENT, 67020ba95dSCaesar Wang }; 68020ba95dSCaesar Wang 69020ba95dSCaesar Wang /** 701d98b618SCaesar Wang * The max sensors is two in rockchip SoCs. 711d98b618SCaesar Wang * Two sensors: CPU and GPU sensor. 721d98b618SCaesar Wang */ 731d98b618SCaesar Wang #define SOC_MAX_SENSORS 2 741d98b618SCaesar Wang 7513c1cfdaSCaesar Wang /** 76678065d5SCaesar Wang * struct chip_tsadc_table - hold information about chip-specific differences 7713c1cfdaSCaesar Wang * @id: conversion table 7813c1cfdaSCaesar Wang * @length: size of conversion table 7913c1cfdaSCaesar Wang * @data_mask: mask to apply on data inputs 8013c1cfdaSCaesar Wang * @mode: sort mode of this adc variant (incrementing or decrementing) 8113c1cfdaSCaesar Wang */ 82ce74110dSCaesar Wang struct chip_tsadc_table { 83ce74110dSCaesar Wang const struct tsadc_table *id; 84ce74110dSCaesar Wang unsigned int length; 85ce74110dSCaesar Wang u32 data_mask; 86020ba95dSCaesar Wang enum adc_sort_mode mode; 87ce74110dSCaesar Wang }; 88ce74110dSCaesar Wang 89678065d5SCaesar Wang /** 90678065d5SCaesar Wang * struct rockchip_tsadc_chip - hold the private data of tsadc chip 91678065d5SCaesar Wang * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel 92678065d5SCaesar Wang * @chn_num: the channel number of tsadc chip 93678065d5SCaesar Wang * @tshut_temp: the hardware-controlled shutdown temperature value 94678065d5SCaesar Wang * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO) 95678065d5SCaesar Wang * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 96678065d5SCaesar Wang * @initialize: SoC special initialize tsadc controller method 97678065d5SCaesar Wang * @irq_ack: clear the interrupt 98678065d5SCaesar Wang * @get_temp: get the temperature 9914848502SCaesar Wang * @set_alarm_temp: set the high temperature interrupt 100678065d5SCaesar Wang * @set_tshut_temp: set the hardware-controlled shutdown temperature 101678065d5SCaesar Wang * @set_tshut_mode: set the hardware-controlled shutdown mode 102678065d5SCaesar Wang * @table: the chip-specific conversion table 103678065d5SCaesar Wang */ 104cbac8f63SCaesar Wang struct rockchip_tsadc_chip { 1051d98b618SCaesar Wang /* The sensor id of chip correspond to the ADC channel */ 1061d98b618SCaesar Wang int chn_id[SOC_MAX_SENSORS]; 1071d98b618SCaesar Wang int chn_num; 1081d98b618SCaesar Wang 109cbac8f63SCaesar Wang /* The hardware-controlled tshut property */ 110437df217SCaesar Wang int tshut_temp; 111cbac8f63SCaesar Wang enum tshut_mode tshut_mode; 112cbac8f63SCaesar Wang enum tshut_polarity tshut_polarity; 113cbac8f63SCaesar Wang 114cbac8f63SCaesar Wang /* Chip-wide methods */ 115b9484763SCaesar Wang void (*initialize)(struct regmap *grf, 116b9484763SCaesar Wang void __iomem *reg, enum tshut_polarity p); 117cbac8f63SCaesar Wang void (*irq_ack)(void __iomem *reg); 118cbac8f63SCaesar Wang void (*control)(void __iomem *reg, bool on); 119cbac8f63SCaesar Wang 120cbac8f63SCaesar Wang /* Per-sensor methods */ 121cdd8b3f7SBrian Norris int (*get_temp)(const struct chip_tsadc_table *table, 122ce74110dSCaesar Wang int chn, void __iomem *reg, int *temp); 123d3530497SCaesar Wang int (*set_alarm_temp)(const struct chip_tsadc_table *table, 12414848502SCaesar Wang int chn, void __iomem *reg, int temp); 125d3530497SCaesar Wang int (*set_tshut_temp)(const struct chip_tsadc_table *table, 126437df217SCaesar Wang int chn, void __iomem *reg, int temp); 127cbac8f63SCaesar Wang void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m); 128ce74110dSCaesar Wang 129ce74110dSCaesar Wang /* Per-table methods */ 130ce74110dSCaesar Wang struct chip_tsadc_table table; 131cbac8f63SCaesar Wang }; 132cbac8f63SCaesar Wang 133678065d5SCaesar Wang /** 134678065d5SCaesar Wang * struct rockchip_thermal_sensor - hold the information of thermal sensor 135678065d5SCaesar Wang * @thermal: pointer to the platform/configuration data 136678065d5SCaesar Wang * @tzd: pointer to a thermal zone 137678065d5SCaesar Wang * @id: identifier of the thermal sensor 138678065d5SCaesar Wang */ 139cbac8f63SCaesar Wang struct rockchip_thermal_sensor { 140cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal; 141cbac8f63SCaesar Wang struct thermal_zone_device *tzd; 1421d98b618SCaesar Wang int id; 143cbac8f63SCaesar Wang }; 144cbac8f63SCaesar Wang 145678065d5SCaesar Wang /** 146678065d5SCaesar Wang * struct rockchip_thermal_data - hold the private data of thermal driver 147678065d5SCaesar Wang * @chip: pointer to the platform/configuration data 148678065d5SCaesar Wang * @pdev: platform device of thermal 149678065d5SCaesar Wang * @reset: the reset controller of tsadc 150678065d5SCaesar Wang * @sensors[SOC_MAX_SENSORS]: the thermal sensor 151678065d5SCaesar Wang * @clk: the controller clock is divided by the exteral 24MHz 152678065d5SCaesar Wang * @pclk: the advanced peripherals bus clock 153678065d5SCaesar Wang * @grf: the general register file will be used to do static set by software 154678065d5SCaesar Wang * @regs: the base address of tsadc controller 155678065d5SCaesar Wang * @tshut_temp: the hardware-controlled shutdown temperature value 156678065d5SCaesar Wang * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO) 157678065d5SCaesar Wang * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 158678065d5SCaesar Wang */ 159cbac8f63SCaesar Wang struct rockchip_thermal_data { 160cbac8f63SCaesar Wang const struct rockchip_tsadc_chip *chip; 161cbac8f63SCaesar Wang struct platform_device *pdev; 162cbac8f63SCaesar Wang struct reset_control *reset; 163cbac8f63SCaesar Wang 1641d98b618SCaesar Wang struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS]; 165cbac8f63SCaesar Wang 166cbac8f63SCaesar Wang struct clk *clk; 167cbac8f63SCaesar Wang struct clk *pclk; 168cbac8f63SCaesar Wang 169b9484763SCaesar Wang struct regmap *grf; 170cbac8f63SCaesar Wang void __iomem *regs; 171cbac8f63SCaesar Wang 172437df217SCaesar Wang int tshut_temp; 173cbac8f63SCaesar Wang enum tshut_mode tshut_mode; 174cbac8f63SCaesar Wang enum tshut_polarity tshut_polarity; 175cbac8f63SCaesar Wang }; 176cbac8f63SCaesar Wang 177952418a3SCaesar Wang /** 178952418a3SCaesar Wang * TSADC Sensor Register description: 179952418a3SCaesar Wang * 180952418a3SCaesar Wang * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it. 181952418a3SCaesar Wang * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399) 182952418a3SCaesar Wang * 183952418a3SCaesar Wang */ 184b9484763SCaesar Wang #define TSADCV2_USER_CON 0x00 185cbac8f63SCaesar Wang #define TSADCV2_AUTO_CON 0x04 186cbac8f63SCaesar Wang #define TSADCV2_INT_EN 0x08 187cbac8f63SCaesar Wang #define TSADCV2_INT_PD 0x0c 188cbac8f63SCaesar Wang #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04) 18914848502SCaesar Wang #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04) 190cbac8f63SCaesar Wang #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04) 191cbac8f63SCaesar Wang #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60 192cbac8f63SCaesar Wang #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64 193cbac8f63SCaesar Wang #define TSADCV2_AUTO_PERIOD 0x68 194cbac8f63SCaesar Wang #define TSADCV2_AUTO_PERIOD_HT 0x6c 195cbac8f63SCaesar Wang 196cbac8f63SCaesar Wang #define TSADCV2_AUTO_EN BIT(0) 197cbac8f63SCaesar Wang #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) 198cbac8f63SCaesar Wang #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8) 199678065d5SCaesar Wang 2007ea38c6cSCaesar Wang #define TSADCV3_AUTO_Q_SEL_EN BIT(1) 201cbac8f63SCaesar Wang 202cbac8f63SCaesar Wang #define TSADCV2_INT_SRC_EN(chn) BIT(chn) 203cbac8f63SCaesar Wang #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) 204cbac8f63SCaesar Wang #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) 205cbac8f63SCaesar Wang 206452e01b3SDmitry Torokhov #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) 207952418a3SCaesar Wang #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16) 208cbac8f63SCaesar Wang 209cbac8f63SCaesar Wang #define TSADCV2_DATA_MASK 0xfff 21020f0af75SCaesar Wang #define TSADCV3_DATA_MASK 0x3ff 21120f0af75SCaesar Wang 212cbac8f63SCaesar Wang #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 213cbac8f63SCaesar Wang #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 21446667879SCaesar Wang #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */ 21546667879SCaesar Wang #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */ 2165ef62de7SRocky Hao #define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */ 2175ef62de7SRocky Hao #define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */ 21846667879SCaesar Wang 219b9484763SCaesar Wang #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */ 220b9484763SCaesar Wang 221b9484763SCaesar Wang #define GRF_SARADC_TESTBIT 0x0e644 222b9484763SCaesar Wang #define GRF_TSADC_TESTBIT_L 0x0e648 223b9484763SCaesar Wang #define GRF_TSADC_TESTBIT_H 0x0e64c 224b9484763SCaesar Wang 225ffd1b122SElaine Zhang #define PX30_GRF_SOC_CON2 0x0408 226ffd1b122SElaine Zhang 227b9484763SCaesar Wang #define GRF_SARADC_TESTBIT_ON (0x10001 << 2) 228b9484763SCaesar Wang #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2) 22923f75e48SRocky Hao #define GRF_TSADC_VCM_EN_L (0x10001 << 7) 23023f75e48SRocky Hao #define GRF_TSADC_VCM_EN_H (0x10001 << 7) 231cbac8f63SCaesar Wang 232ffd1b122SElaine Zhang #define GRF_CON_TSADC_CH_INV (0x10001 << 1) 233ffd1b122SElaine Zhang 234678065d5SCaesar Wang /** 235678065d5SCaesar Wang * struct tsadc_table - code to temperature conversion table 236678065d5SCaesar Wang * @code: the value of adc channel 237678065d5SCaesar Wang * @temp: the temperature 238678065d5SCaesar Wang * Note: 239678065d5SCaesar Wang * code to temperature mapping of the temperature sensor is a piece wise linear 240678065d5SCaesar Wang * curve.Any temperature, code faling between to 2 give temperatures can be 241678065d5SCaesar Wang * linearly interpolated. 242678065d5SCaesar Wang * Code to Temperature mapping should be updated based on manufacturer results. 243678065d5SCaesar Wang */ 244cbac8f63SCaesar Wang struct tsadc_table { 245d9a241cbSDmitry Torokhov u32 code; 246437df217SCaesar Wang int temp; 247cbac8f63SCaesar Wang }; 248cbac8f63SCaesar Wang 2494eca8cacSRocky Hao static const struct tsadc_table rv1108_table[] = { 2504eca8cacSRocky Hao {0, -40000}, 2514eca8cacSRocky Hao {374, -40000}, 2524eca8cacSRocky Hao {382, -35000}, 2534eca8cacSRocky Hao {389, -30000}, 2544eca8cacSRocky Hao {397, -25000}, 2554eca8cacSRocky Hao {405, -20000}, 2564eca8cacSRocky Hao {413, -15000}, 2574eca8cacSRocky Hao {421, -10000}, 2584eca8cacSRocky Hao {429, -5000}, 2594eca8cacSRocky Hao {436, 0}, 2604eca8cacSRocky Hao {444, 5000}, 2614eca8cacSRocky Hao {452, 10000}, 2624eca8cacSRocky Hao {460, 15000}, 2634eca8cacSRocky Hao {468, 20000}, 2644eca8cacSRocky Hao {476, 25000}, 2654eca8cacSRocky Hao {483, 30000}, 2664eca8cacSRocky Hao {491, 35000}, 2674eca8cacSRocky Hao {499, 40000}, 2684eca8cacSRocky Hao {507, 45000}, 2694eca8cacSRocky Hao {515, 50000}, 2704eca8cacSRocky Hao {523, 55000}, 2714eca8cacSRocky Hao {531, 60000}, 2724eca8cacSRocky Hao {539, 65000}, 2734eca8cacSRocky Hao {547, 70000}, 2744eca8cacSRocky Hao {555, 75000}, 2754eca8cacSRocky Hao {562, 80000}, 2764eca8cacSRocky Hao {570, 85000}, 2774eca8cacSRocky Hao {578, 90000}, 2784eca8cacSRocky Hao {586, 95000}, 2794eca8cacSRocky Hao {594, 100000}, 2804eca8cacSRocky Hao {602, 105000}, 2814eca8cacSRocky Hao {610, 110000}, 2824eca8cacSRocky Hao {618, 115000}, 2834eca8cacSRocky Hao {626, 120000}, 2844eca8cacSRocky Hao {634, 125000}, 2854eca8cacSRocky Hao {TSADCV2_DATA_MASK, 125000}, 2864eca8cacSRocky Hao }; 2874eca8cacSRocky Hao 288952418a3SCaesar Wang static const struct tsadc_table rk3228_code_table[] = { 2897ea38c6cSCaesar Wang {0, -40000}, 2907ea38c6cSCaesar Wang {588, -40000}, 2917ea38c6cSCaesar Wang {593, -35000}, 2927ea38c6cSCaesar Wang {598, -30000}, 2937ea38c6cSCaesar Wang {603, -25000}, 2947ea38c6cSCaesar Wang {608, -20000}, 2957ea38c6cSCaesar Wang {613, -15000}, 2967ea38c6cSCaesar Wang {618, -10000}, 2977ea38c6cSCaesar Wang {623, -5000}, 2987ea38c6cSCaesar Wang {629, 0}, 2997ea38c6cSCaesar Wang {634, 5000}, 3007ea38c6cSCaesar Wang {639, 10000}, 3017ea38c6cSCaesar Wang {644, 15000}, 3027ea38c6cSCaesar Wang {649, 20000}, 3037ea38c6cSCaesar Wang {654, 25000}, 3047ea38c6cSCaesar Wang {660, 30000}, 3057ea38c6cSCaesar Wang {665, 35000}, 3067ea38c6cSCaesar Wang {670, 40000}, 3077ea38c6cSCaesar Wang {675, 45000}, 3087ea38c6cSCaesar Wang {681, 50000}, 3097ea38c6cSCaesar Wang {686, 55000}, 3107ea38c6cSCaesar Wang {691, 60000}, 3117ea38c6cSCaesar Wang {696, 65000}, 3127ea38c6cSCaesar Wang {702, 70000}, 3137ea38c6cSCaesar Wang {707, 75000}, 3147ea38c6cSCaesar Wang {712, 80000}, 3157ea38c6cSCaesar Wang {717, 85000}, 3167ea38c6cSCaesar Wang {723, 90000}, 3177ea38c6cSCaesar Wang {728, 95000}, 3187ea38c6cSCaesar Wang {733, 100000}, 3197ea38c6cSCaesar Wang {738, 105000}, 3207ea38c6cSCaesar Wang {744, 110000}, 3217ea38c6cSCaesar Wang {749, 115000}, 3227ea38c6cSCaesar Wang {754, 120000}, 3237ea38c6cSCaesar Wang {760, 125000}, 3247ea38c6cSCaesar Wang {TSADCV2_DATA_MASK, 125000}, 3257b02a5e7SCaesar Wang }; 3267b02a5e7SCaesar Wang 327952418a3SCaesar Wang static const struct tsadc_table rk3288_code_table[] = { 328cbac8f63SCaesar Wang {TSADCV2_DATA_MASK, -40000}, 329cbac8f63SCaesar Wang {3800, -40000}, 330cbac8f63SCaesar Wang {3792, -35000}, 331cbac8f63SCaesar Wang {3783, -30000}, 332cbac8f63SCaesar Wang {3774, -25000}, 333cbac8f63SCaesar Wang {3765, -20000}, 334cbac8f63SCaesar Wang {3756, -15000}, 335cbac8f63SCaesar Wang {3747, -10000}, 336cbac8f63SCaesar Wang {3737, -5000}, 337cbac8f63SCaesar Wang {3728, 0}, 338cbac8f63SCaesar Wang {3718, 5000}, 339cbac8f63SCaesar Wang {3708, 10000}, 340cbac8f63SCaesar Wang {3698, 15000}, 341cbac8f63SCaesar Wang {3688, 20000}, 342cbac8f63SCaesar Wang {3678, 25000}, 343cbac8f63SCaesar Wang {3667, 30000}, 344cbac8f63SCaesar Wang {3656, 35000}, 345cbac8f63SCaesar Wang {3645, 40000}, 346cbac8f63SCaesar Wang {3634, 45000}, 347cbac8f63SCaesar Wang {3623, 50000}, 348cbac8f63SCaesar Wang {3611, 55000}, 349cbac8f63SCaesar Wang {3600, 60000}, 350cbac8f63SCaesar Wang {3588, 65000}, 351cbac8f63SCaesar Wang {3575, 70000}, 352cbac8f63SCaesar Wang {3563, 75000}, 353cbac8f63SCaesar Wang {3550, 80000}, 354cbac8f63SCaesar Wang {3537, 85000}, 355cbac8f63SCaesar Wang {3524, 90000}, 356cbac8f63SCaesar Wang {3510, 95000}, 357cbac8f63SCaesar Wang {3496, 100000}, 358cbac8f63SCaesar Wang {3482, 105000}, 359cbac8f63SCaesar Wang {3467, 110000}, 360cbac8f63SCaesar Wang {3452, 115000}, 361cbac8f63SCaesar Wang {3437, 120000}, 362cbac8f63SCaesar Wang {3421, 125000}, 363cadf29dcSCaesar Wang {0, 125000}, 364cbac8f63SCaesar Wang }; 365cbac8f63SCaesar Wang 366eda519d5SRocky Hao static const struct tsadc_table rk3328_code_table[] = { 367eda519d5SRocky Hao {0, -40000}, 368eda519d5SRocky Hao {296, -40000}, 369eda519d5SRocky Hao {304, -35000}, 370eda519d5SRocky Hao {313, -30000}, 371eda519d5SRocky Hao {331, -20000}, 372eda519d5SRocky Hao {340, -15000}, 373eda519d5SRocky Hao {349, -10000}, 374eda519d5SRocky Hao {359, -5000}, 375eda519d5SRocky Hao {368, 0}, 376eda519d5SRocky Hao {378, 5000}, 377eda519d5SRocky Hao {388, 10000}, 378eda519d5SRocky Hao {398, 15000}, 379eda519d5SRocky Hao {408, 20000}, 380eda519d5SRocky Hao {418, 25000}, 381eda519d5SRocky Hao {429, 30000}, 382eda519d5SRocky Hao {440, 35000}, 383eda519d5SRocky Hao {451, 40000}, 384eda519d5SRocky Hao {462, 45000}, 385eda519d5SRocky Hao {473, 50000}, 386eda519d5SRocky Hao {485, 55000}, 387eda519d5SRocky Hao {496, 60000}, 388eda519d5SRocky Hao {508, 65000}, 389eda519d5SRocky Hao {521, 70000}, 390eda519d5SRocky Hao {533, 75000}, 391eda519d5SRocky Hao {546, 80000}, 392eda519d5SRocky Hao {559, 85000}, 393eda519d5SRocky Hao {572, 90000}, 394eda519d5SRocky Hao {586, 95000}, 395eda519d5SRocky Hao {600, 100000}, 396eda519d5SRocky Hao {614, 105000}, 397eda519d5SRocky Hao {629, 110000}, 398eda519d5SRocky Hao {644, 115000}, 399eda519d5SRocky Hao {659, 120000}, 400eda519d5SRocky Hao {675, 125000}, 401eda519d5SRocky Hao {TSADCV2_DATA_MASK, 125000}, 402eda519d5SRocky Hao }; 403eda519d5SRocky Hao 404952418a3SCaesar Wang static const struct tsadc_table rk3368_code_table[] = { 40520f0af75SCaesar Wang {0, -40000}, 40620f0af75SCaesar Wang {106, -40000}, 40720f0af75SCaesar Wang {108, -35000}, 40820f0af75SCaesar Wang {110, -30000}, 40920f0af75SCaesar Wang {112, -25000}, 41020f0af75SCaesar Wang {114, -20000}, 41120f0af75SCaesar Wang {116, -15000}, 41220f0af75SCaesar Wang {118, -10000}, 41320f0af75SCaesar Wang {120, -5000}, 41420f0af75SCaesar Wang {122, 0}, 41520f0af75SCaesar Wang {124, 5000}, 41620f0af75SCaesar Wang {126, 10000}, 41720f0af75SCaesar Wang {128, 15000}, 41820f0af75SCaesar Wang {130, 20000}, 41920f0af75SCaesar Wang {132, 25000}, 42020f0af75SCaesar Wang {134, 30000}, 42120f0af75SCaesar Wang {136, 35000}, 42220f0af75SCaesar Wang {138, 40000}, 42320f0af75SCaesar Wang {140, 45000}, 42420f0af75SCaesar Wang {142, 50000}, 42520f0af75SCaesar Wang {144, 55000}, 42620f0af75SCaesar Wang {146, 60000}, 42720f0af75SCaesar Wang {148, 65000}, 42820f0af75SCaesar Wang {150, 70000}, 42920f0af75SCaesar Wang {152, 75000}, 43020f0af75SCaesar Wang {154, 80000}, 43120f0af75SCaesar Wang {156, 85000}, 43220f0af75SCaesar Wang {158, 90000}, 43320f0af75SCaesar Wang {160, 95000}, 43420f0af75SCaesar Wang {162, 100000}, 43520f0af75SCaesar Wang {163, 105000}, 43620f0af75SCaesar Wang {165, 110000}, 43720f0af75SCaesar Wang {167, 115000}, 43820f0af75SCaesar Wang {169, 120000}, 43920f0af75SCaesar Wang {171, 125000}, 44020f0af75SCaesar Wang {TSADCV3_DATA_MASK, 125000}, 44120f0af75SCaesar Wang }; 44220f0af75SCaesar Wang 443952418a3SCaesar Wang static const struct tsadc_table rk3399_code_table[] = { 4447ea38c6cSCaesar Wang {0, -40000}, 445f762a35dSCaesar Wang {402, -40000}, 446f762a35dSCaesar Wang {410, -35000}, 447f762a35dSCaesar Wang {419, -30000}, 448f762a35dSCaesar Wang {427, -25000}, 449f762a35dSCaesar Wang {436, -20000}, 450f762a35dSCaesar Wang {444, -15000}, 451f762a35dSCaesar Wang {453, -10000}, 452f762a35dSCaesar Wang {461, -5000}, 453f762a35dSCaesar Wang {470, 0}, 454f762a35dSCaesar Wang {478, 5000}, 455f762a35dSCaesar Wang {487, 10000}, 456f762a35dSCaesar Wang {496, 15000}, 457f762a35dSCaesar Wang {504, 20000}, 458f762a35dSCaesar Wang {513, 25000}, 459f762a35dSCaesar Wang {521, 30000}, 460f762a35dSCaesar Wang {530, 35000}, 461f762a35dSCaesar Wang {538, 40000}, 462f762a35dSCaesar Wang {547, 45000}, 463f762a35dSCaesar Wang {555, 50000}, 464f762a35dSCaesar Wang {564, 55000}, 465f762a35dSCaesar Wang {573, 60000}, 466f762a35dSCaesar Wang {581, 65000}, 467f762a35dSCaesar Wang {590, 70000}, 468f762a35dSCaesar Wang {599, 75000}, 469f762a35dSCaesar Wang {607, 80000}, 470f762a35dSCaesar Wang {616, 85000}, 471f762a35dSCaesar Wang {624, 90000}, 472f762a35dSCaesar Wang {633, 95000}, 473f762a35dSCaesar Wang {642, 100000}, 474f762a35dSCaesar Wang {650, 105000}, 475f762a35dSCaesar Wang {659, 110000}, 476f762a35dSCaesar Wang {668, 115000}, 477f762a35dSCaesar Wang {677, 120000}, 478f762a35dSCaesar Wang {685, 125000}, 4797ea38c6cSCaesar Wang {TSADCV3_DATA_MASK, 125000}, 480b0d70338SCaesar Wang }; 481b0d70338SCaesar Wang 482cdd8b3f7SBrian Norris static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table, 483437df217SCaesar Wang int temp) 484cbac8f63SCaesar Wang { 485cbac8f63SCaesar Wang int high, low, mid; 486cadf29dcSCaesar Wang unsigned long num; 487cadf29dcSCaesar Wang unsigned int denom; 488d3530497SCaesar Wang u32 error = table->data_mask; 489cbac8f63SCaesar Wang 490cbac8f63SCaesar Wang low = 0; 491cadf29dcSCaesar Wang high = (table->length - 1) - 1; /* ignore the last check for table */ 492cbac8f63SCaesar Wang mid = (high + low) / 2; 493cbac8f63SCaesar Wang 4941f09ba82SCaesar Wang /* Return mask code data when the temp is over table range */ 495d3530497SCaesar Wang if (temp < table->id[low].temp || temp > table->id[high].temp) 4961f09ba82SCaesar Wang goto exit; 497cbac8f63SCaesar Wang 498cbac8f63SCaesar Wang while (low <= high) { 499cdd8b3f7SBrian Norris if (temp == table->id[mid].temp) 500cdd8b3f7SBrian Norris return table->id[mid].code; 501cdd8b3f7SBrian Norris else if (temp < table->id[mid].temp) 502cbac8f63SCaesar Wang high = mid - 1; 503cbac8f63SCaesar Wang else 504cbac8f63SCaesar Wang low = mid + 1; 505cbac8f63SCaesar Wang mid = (low + high) / 2; 506cbac8f63SCaesar Wang } 507cbac8f63SCaesar Wang 508cadf29dcSCaesar Wang /* 509cadf29dcSCaesar Wang * The conversion code granularity provided by the table. Let's 510cadf29dcSCaesar Wang * assume that the relationship between temperature and 511cadf29dcSCaesar Wang * analog value between 2 table entries is linear and interpolate 512cadf29dcSCaesar Wang * to produce less granular result. 513cadf29dcSCaesar Wang */ 514cadf29dcSCaesar Wang num = abs(table->id[mid + 1].code - table->id[mid].code); 515cadf29dcSCaesar Wang num *= temp - table->id[mid].temp; 516cadf29dcSCaesar Wang denom = table->id[mid + 1].temp - table->id[mid].temp; 517cadf29dcSCaesar Wang 518cadf29dcSCaesar Wang switch (table->mode) { 519cadf29dcSCaesar Wang case ADC_DECREMENT: 520cadf29dcSCaesar Wang return table->id[mid].code - (num / denom); 521cadf29dcSCaesar Wang case ADC_INCREMENT: 522cadf29dcSCaesar Wang return table->id[mid].code + (num / denom); 523cadf29dcSCaesar Wang default: 524cadf29dcSCaesar Wang pr_err("%s: unknown table mode: %d\n", __func__, table->mode); 525cadf29dcSCaesar Wang return error; 526cadf29dcSCaesar Wang } 527cadf29dcSCaesar Wang 5281f09ba82SCaesar Wang exit: 529e6ed1b4aSBrian Norris pr_err("%s: invalid temperature, temp=%d error=%d\n", 530e6ed1b4aSBrian Norris __func__, temp, error); 5311f09ba82SCaesar Wang return error; 532cbac8f63SCaesar Wang } 533cbac8f63SCaesar Wang 534cdd8b3f7SBrian Norris static int rk_tsadcv2_code_to_temp(const struct chip_tsadc_table *table, 535cdd8b3f7SBrian Norris u32 code, int *temp) 536cbac8f63SCaesar Wang { 537d9a241cbSDmitry Torokhov unsigned int low = 1; 538cdd8b3f7SBrian Norris unsigned int high = table->length - 1; 5391e9a1aeaSCaesar Wang unsigned int mid = (low + high) / 2; 5401e9a1aeaSCaesar Wang unsigned int num; 5411e9a1aeaSCaesar Wang unsigned long denom; 542cbac8f63SCaesar Wang 543cdd8b3f7SBrian Norris WARN_ON(table->length < 2); 544cbac8f63SCaesar Wang 545cdd8b3f7SBrian Norris switch (table->mode) { 546020ba95dSCaesar Wang case ADC_DECREMENT: 547cdd8b3f7SBrian Norris code &= table->data_mask; 548db831886SCaesar Wang if (code <= table->id[high].code) 549d9a241cbSDmitry Torokhov return -EAGAIN; /* Incorrect reading */ 550d9a241cbSDmitry Torokhov 551d9a241cbSDmitry Torokhov while (low <= high) { 552cdd8b3f7SBrian Norris if (code >= table->id[mid].code && 553cdd8b3f7SBrian Norris code < table->id[mid - 1].code) 5541e9a1aeaSCaesar Wang break; 555cdd8b3f7SBrian Norris else if (code < table->id[mid].code) 556cbac8f63SCaesar Wang low = mid + 1; 557cbac8f63SCaesar Wang else 558cbac8f63SCaesar Wang high = mid - 1; 559020ba95dSCaesar Wang 560cbac8f63SCaesar Wang mid = (low + high) / 2; 561cbac8f63SCaesar Wang } 562020ba95dSCaesar Wang break; 563020ba95dSCaesar Wang case ADC_INCREMENT: 564cdd8b3f7SBrian Norris code &= table->data_mask; 565cdd8b3f7SBrian Norris if (code < table->id[low].code) 566020ba95dSCaesar Wang return -EAGAIN; /* Incorrect reading */ 567020ba95dSCaesar Wang 568020ba95dSCaesar Wang while (low <= high) { 569cdd8b3f7SBrian Norris if (code <= table->id[mid].code && 570cdd8b3f7SBrian Norris code > table->id[mid - 1].code) 571020ba95dSCaesar Wang break; 572cdd8b3f7SBrian Norris else if (code > table->id[mid].code) 573020ba95dSCaesar Wang low = mid + 1; 574020ba95dSCaesar Wang else 575020ba95dSCaesar Wang high = mid - 1; 576020ba95dSCaesar Wang 577020ba95dSCaesar Wang mid = (low + high) / 2; 578020ba95dSCaesar Wang } 579020ba95dSCaesar Wang break; 580020ba95dSCaesar Wang default: 581cdd8b3f7SBrian Norris pr_err("%s: unknown table mode: %d\n", __func__, table->mode); 582e6ed1b4aSBrian Norris return -EINVAL; 583020ba95dSCaesar Wang } 584cbac8f63SCaesar Wang 5851e9a1aeaSCaesar Wang /* 5861e9a1aeaSCaesar Wang * The 5C granularity provided by the table is too much. Let's 5871e9a1aeaSCaesar Wang * assume that the relationship between sensor readings and 5881e9a1aeaSCaesar Wang * temperature between 2 table entries is linear and interpolate 5891e9a1aeaSCaesar Wang * to produce less granular result. 5901e9a1aeaSCaesar Wang */ 591cdd8b3f7SBrian Norris num = table->id[mid].temp - table->id[mid - 1].temp; 592cdd8b3f7SBrian Norris num *= abs(table->id[mid - 1].code - code); 593cdd8b3f7SBrian Norris denom = abs(table->id[mid - 1].code - table->id[mid].code); 594cdd8b3f7SBrian Norris *temp = table->id[mid - 1].temp + (num / denom); 595d9a241cbSDmitry Torokhov 596d9a241cbSDmitry Torokhov return 0; 597cbac8f63SCaesar Wang } 598cbac8f63SCaesar Wang 599cbac8f63SCaesar Wang /** 600144c5565SCaesar Wang * rk_tsadcv2_initialize - initialize TASDC Controller. 601144c5565SCaesar Wang * 602144c5565SCaesar Wang * (1) Set TSADC_V2_AUTO_PERIOD: 603144c5565SCaesar Wang * Configure the interleave between every two accessing of 604144c5565SCaesar Wang * TSADC in normal operation. 605144c5565SCaesar Wang * 606144c5565SCaesar Wang * (2) Set TSADCV2_AUTO_PERIOD_HT: 607144c5565SCaesar Wang * Configure the interleave between every two accessing of 608144c5565SCaesar Wang * TSADC after the temperature is higher than COM_SHUT or COM_INT. 609144c5565SCaesar Wang * 610144c5565SCaesar Wang * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE: 611144c5565SCaesar Wang * If the temperature is higher than COMP_INT or COMP_SHUT for 612cbac8f63SCaesar Wang * "debounce" times, TSADC controller will generate interrupt or TSHUT. 613cbac8f63SCaesar Wang */ 614b9484763SCaesar Wang static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs, 615cbac8f63SCaesar Wang enum tshut_polarity tshut_polarity) 616cbac8f63SCaesar Wang { 617cbac8f63SCaesar Wang if (tshut_polarity == TSHUT_HIGH_ACTIVE) 618452e01b3SDmitry Torokhov writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 619cbac8f63SCaesar Wang regs + TSADCV2_AUTO_CON); 620cbac8f63SCaesar Wang else 621452e01b3SDmitry Torokhov writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 622cbac8f63SCaesar Wang regs + TSADCV2_AUTO_CON); 623cbac8f63SCaesar Wang 624cbac8f63SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); 625cbac8f63SCaesar Wang writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 626cbac8f63SCaesar Wang regs + TSADCV2_HIGHT_INT_DEBOUNCE); 627cbac8f63SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, 628cbac8f63SCaesar Wang regs + TSADCV2_AUTO_PERIOD_HT); 629cbac8f63SCaesar Wang writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 630cbac8f63SCaesar Wang regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 631b9484763SCaesar Wang } 632b9484763SCaesar Wang 633b9484763SCaesar Wang /** 634b9484763SCaesar Wang * rk_tsadcv3_initialize - initialize TASDC Controller. 635678065d5SCaesar Wang * 636b9484763SCaesar Wang * (1) The tsadc control power sequence. 637b9484763SCaesar Wang * 638b9484763SCaesar Wang * (2) Set TSADC_V2_AUTO_PERIOD: 639b9484763SCaesar Wang * Configure the interleave between every two accessing of 640b9484763SCaesar Wang * TSADC in normal operation. 641b9484763SCaesar Wang * 642b9484763SCaesar Wang * (2) Set TSADCV2_AUTO_PERIOD_HT: 643b9484763SCaesar Wang * Configure the interleave between every two accessing of 644b9484763SCaesar Wang * TSADC after the temperature is higher than COM_SHUT or COM_INT. 645b9484763SCaesar Wang * 646b9484763SCaesar Wang * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE: 647b9484763SCaesar Wang * If the temperature is higher than COMP_INT or COMP_SHUT for 648b9484763SCaesar Wang * "debounce" times, TSADC controller will generate interrupt or TSHUT. 649b9484763SCaesar Wang */ 650b9484763SCaesar Wang static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs, 651b9484763SCaesar Wang enum tshut_polarity tshut_polarity) 652b9484763SCaesar Wang { 653b9484763SCaesar Wang /* The tsadc control power sequence */ 654b9484763SCaesar Wang if (IS_ERR(grf)) { 655b9484763SCaesar Wang /* Set interleave value to workround ic time sync issue */ 656b9484763SCaesar Wang writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs + 657b9484763SCaesar Wang TSADCV2_USER_CON); 65846667879SCaesar Wang 65946667879SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, 66046667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD); 66146667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 66246667879SCaesar Wang regs + TSADCV2_HIGHT_INT_DEBOUNCE); 66346667879SCaesar Wang writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, 66446667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD_HT); 66546667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 66646667879SCaesar Wang regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 66746667879SCaesar Wang 668b9484763SCaesar Wang } else { 66923f75e48SRocky Hao /* Enable the voltage common mode feature */ 67023f75e48SRocky Hao regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L); 67123f75e48SRocky Hao regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H); 67223f75e48SRocky Hao 6732fe5c1b0SCaesar Wang usleep_range(15, 100); /* The spec note says at least 15 us */ 674b9484763SCaesar Wang regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON); 675b9484763SCaesar Wang regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON); 6762fe5c1b0SCaesar Wang usleep_range(90, 200); /* The spec note says at least 90 us */ 67746667879SCaesar Wang 67846667879SCaesar Wang writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, 67946667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD); 68046667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, 68146667879SCaesar Wang regs + TSADCV2_HIGHT_INT_DEBOUNCE); 68246667879SCaesar Wang writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME, 68346667879SCaesar Wang regs + TSADCV2_AUTO_PERIOD_HT); 68446667879SCaesar Wang writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, 68546667879SCaesar Wang regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); 686b9484763SCaesar Wang } 687b9484763SCaesar Wang 688b9484763SCaesar Wang if (tshut_polarity == TSHUT_HIGH_ACTIVE) 689b9484763SCaesar Wang writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 690b9484763SCaesar Wang regs + TSADCV2_AUTO_CON); 691b9484763SCaesar Wang else 692b9484763SCaesar Wang writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, 693b9484763SCaesar Wang regs + TSADCV2_AUTO_CON); 694cbac8f63SCaesar Wang } 695cbac8f63SCaesar Wang 696ffd1b122SElaine Zhang static void rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs, 697ffd1b122SElaine Zhang enum tshut_polarity tshut_polarity) 698ffd1b122SElaine Zhang { 699ffd1b122SElaine Zhang rk_tsadcv2_initialize(grf, regs, tshut_polarity); 700ffd1b122SElaine Zhang regmap_write(grf, PX30_GRF_SOC_CON2, GRF_CON_TSADC_CH_INV); 701ffd1b122SElaine Zhang } 702ffd1b122SElaine Zhang 703cbac8f63SCaesar Wang static void rk_tsadcv2_irq_ack(void __iomem *regs) 704cbac8f63SCaesar Wang { 705cbac8f63SCaesar Wang u32 val; 706cbac8f63SCaesar Wang 707cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_INT_PD); 708452e01b3SDmitry Torokhov writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); 709cbac8f63SCaesar Wang } 710cbac8f63SCaesar Wang 711952418a3SCaesar Wang static void rk_tsadcv3_irq_ack(void __iomem *regs) 712952418a3SCaesar Wang { 713952418a3SCaesar Wang u32 val; 714952418a3SCaesar Wang 715952418a3SCaesar Wang val = readl_relaxed(regs + TSADCV2_INT_PD); 716952418a3SCaesar Wang writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); 717952418a3SCaesar Wang } 718952418a3SCaesar Wang 719cbac8f63SCaesar Wang static void rk_tsadcv2_control(void __iomem *regs, bool enable) 720cbac8f63SCaesar Wang { 721cbac8f63SCaesar Wang u32 val; 722cbac8f63SCaesar Wang 723cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_AUTO_CON); 724cbac8f63SCaesar Wang if (enable) 725cbac8f63SCaesar Wang val |= TSADCV2_AUTO_EN; 726cbac8f63SCaesar Wang else 727cbac8f63SCaesar Wang val &= ~TSADCV2_AUTO_EN; 728cbac8f63SCaesar Wang 729cbac8f63SCaesar Wang writel_relaxed(val, regs + TSADCV2_AUTO_CON); 730cbac8f63SCaesar Wang } 731cbac8f63SCaesar Wang 7327ea38c6cSCaesar Wang /** 733678065d5SCaesar Wang * rk_tsadcv3_control - the tsadc controller is enabled or disabled. 734678065d5SCaesar Wang * 735678065d5SCaesar Wang * NOTE: TSADC controller works at auto mode, and some SoCs need set the 736678065d5SCaesar Wang * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output 737678065d5SCaesar Wang * adc value if setting this bit to enable. 7387ea38c6cSCaesar Wang */ 7397ea38c6cSCaesar Wang static void rk_tsadcv3_control(void __iomem *regs, bool enable) 7407ea38c6cSCaesar Wang { 7417ea38c6cSCaesar Wang u32 val; 7427ea38c6cSCaesar Wang 7437ea38c6cSCaesar Wang val = readl_relaxed(regs + TSADCV2_AUTO_CON); 7447ea38c6cSCaesar Wang if (enable) 7457ea38c6cSCaesar Wang val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN; 7467ea38c6cSCaesar Wang else 7477ea38c6cSCaesar Wang val &= ~TSADCV2_AUTO_EN; 7487ea38c6cSCaesar Wang 7497ea38c6cSCaesar Wang writel_relaxed(val, regs + TSADCV2_AUTO_CON); 7507ea38c6cSCaesar Wang } 7517ea38c6cSCaesar Wang 752cdd8b3f7SBrian Norris static int rk_tsadcv2_get_temp(const struct chip_tsadc_table *table, 753ce74110dSCaesar Wang int chn, void __iomem *regs, int *temp) 754cbac8f63SCaesar Wang { 755cbac8f63SCaesar Wang u32 val; 756cbac8f63SCaesar Wang 757cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_DATA(chn)); 758cbac8f63SCaesar Wang 759ce74110dSCaesar Wang return rk_tsadcv2_code_to_temp(table, val, temp); 760cbac8f63SCaesar Wang } 761cbac8f63SCaesar Wang 762d3530497SCaesar Wang static int rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table, 76314848502SCaesar Wang int chn, void __iomem *regs, int temp) 76414848502SCaesar Wang { 76518591addSCaesar Wang u32 alarm_value; 76618591addSCaesar Wang u32 int_en, int_clr; 76718591addSCaesar Wang 76818591addSCaesar Wang /* 76918591addSCaesar Wang * In some cases, some sensors didn't need the trip points, the 77018591addSCaesar Wang * set_trips will pass {-INT_MAX, INT_MAX} to trigger tsadc alarm 77118591addSCaesar Wang * in the end, ignore this case and disable the high temperature 77218591addSCaesar Wang * interrupt. 77318591addSCaesar Wang */ 77418591addSCaesar Wang if (temp == INT_MAX) { 77518591addSCaesar Wang int_clr = readl_relaxed(regs + TSADCV2_INT_EN); 77618591addSCaesar Wang int_clr &= ~TSADCV2_INT_SRC_EN(chn); 77718591addSCaesar Wang writel_relaxed(int_clr, regs + TSADCV2_INT_EN); 77818591addSCaesar Wang return 0; 77918591addSCaesar Wang } 78014848502SCaesar Wang 7811f09ba82SCaesar Wang /* Make sure the value is valid */ 78214848502SCaesar Wang alarm_value = rk_tsadcv2_temp_to_code(table, temp); 783cdd8b3f7SBrian Norris if (alarm_value == table->data_mask) 784d3530497SCaesar Wang return -ERANGE; 7851f09ba82SCaesar Wang 786cdd8b3f7SBrian Norris writel_relaxed(alarm_value & table->data_mask, 78714848502SCaesar Wang regs + TSADCV2_COMP_INT(chn)); 78814848502SCaesar Wang 78914848502SCaesar Wang int_en = readl_relaxed(regs + TSADCV2_INT_EN); 79014848502SCaesar Wang int_en |= TSADCV2_INT_SRC_EN(chn); 79114848502SCaesar Wang writel_relaxed(int_en, regs + TSADCV2_INT_EN); 792d3530497SCaesar Wang 793d3530497SCaesar Wang return 0; 79414848502SCaesar Wang } 79514848502SCaesar Wang 796d3530497SCaesar Wang static int rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table, 797437df217SCaesar Wang int chn, void __iomem *regs, int temp) 798cbac8f63SCaesar Wang { 799cbac8f63SCaesar Wang u32 tshut_value, val; 800cbac8f63SCaesar Wang 8011f09ba82SCaesar Wang /* Make sure the value is valid */ 802ce74110dSCaesar Wang tshut_value = rk_tsadcv2_temp_to_code(table, temp); 803cdd8b3f7SBrian Norris if (tshut_value == table->data_mask) 804d3530497SCaesar Wang return -ERANGE; 8051f09ba82SCaesar Wang 806cbac8f63SCaesar Wang writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn)); 807cbac8f63SCaesar Wang 808cbac8f63SCaesar Wang /* TSHUT will be valid */ 809cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_AUTO_CON); 810cbac8f63SCaesar Wang writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON); 811d3530497SCaesar Wang 812d3530497SCaesar Wang return 0; 813cbac8f63SCaesar Wang } 814cbac8f63SCaesar Wang 815cbac8f63SCaesar Wang static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs, 816cbac8f63SCaesar Wang enum tshut_mode mode) 817cbac8f63SCaesar Wang { 818cbac8f63SCaesar Wang u32 val; 819cbac8f63SCaesar Wang 820cbac8f63SCaesar Wang val = readl_relaxed(regs + TSADCV2_INT_EN); 821cbac8f63SCaesar Wang if (mode == TSHUT_MODE_GPIO) { 822cbac8f63SCaesar Wang val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn); 823cbac8f63SCaesar Wang val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn); 824cbac8f63SCaesar Wang } else { 825cbac8f63SCaesar Wang val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn); 826cbac8f63SCaesar Wang val |= TSADCV2_SHUT_2CRU_SRC_EN(chn); 827cbac8f63SCaesar Wang } 828cbac8f63SCaesar Wang 829cbac8f63SCaesar Wang writel_relaxed(val, regs + TSADCV2_INT_EN); 830cbac8f63SCaesar Wang } 831cbac8f63SCaesar Wang 832ffd1b122SElaine Zhang static const struct rockchip_tsadc_chip px30_tsadc_data = { 833ffd1b122SElaine Zhang .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 834ffd1b122SElaine Zhang .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ 835ffd1b122SElaine Zhang .chn_num = 2, /* 2 channels for tsadc */ 836ffd1b122SElaine Zhang 837ffd1b122SElaine Zhang .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */ 838ffd1b122SElaine Zhang .tshut_temp = 95000, 839ffd1b122SElaine Zhang 840ffd1b122SElaine Zhang .initialize = rk_tsadcv4_initialize, 841ffd1b122SElaine Zhang .irq_ack = rk_tsadcv3_irq_ack, 842ffd1b122SElaine Zhang .control = rk_tsadcv3_control, 843ffd1b122SElaine Zhang .get_temp = rk_tsadcv2_get_temp, 844ffd1b122SElaine Zhang .set_alarm_temp = rk_tsadcv2_alarm_temp, 845ffd1b122SElaine Zhang .set_tshut_temp = rk_tsadcv2_tshut_temp, 846ffd1b122SElaine Zhang .set_tshut_mode = rk_tsadcv2_tshut_mode, 847ffd1b122SElaine Zhang 848ffd1b122SElaine Zhang .table = { 849ffd1b122SElaine Zhang .id = rk3328_code_table, 850ffd1b122SElaine Zhang .length = ARRAY_SIZE(rk3328_code_table), 851ffd1b122SElaine Zhang .data_mask = TSADCV2_DATA_MASK, 852ffd1b122SElaine Zhang .mode = ADC_INCREMENT, 853ffd1b122SElaine Zhang }, 854ffd1b122SElaine Zhang }; 855ffd1b122SElaine Zhang 8564eca8cacSRocky Hao static const struct rockchip_tsadc_chip rv1108_tsadc_data = { 8574eca8cacSRocky Hao .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 8584eca8cacSRocky Hao .chn_num = 1, /* one channel for tsadc */ 8594eca8cacSRocky Hao 8604eca8cacSRocky Hao .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 8614eca8cacSRocky Hao .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 8624eca8cacSRocky Hao .tshut_temp = 95000, 8634eca8cacSRocky Hao 8644eca8cacSRocky Hao .initialize = rk_tsadcv2_initialize, 8654eca8cacSRocky Hao .irq_ack = rk_tsadcv3_irq_ack, 8664eca8cacSRocky Hao .control = rk_tsadcv3_control, 8674eca8cacSRocky Hao .get_temp = rk_tsadcv2_get_temp, 8684eca8cacSRocky Hao .set_alarm_temp = rk_tsadcv2_alarm_temp, 8694eca8cacSRocky Hao .set_tshut_temp = rk_tsadcv2_tshut_temp, 8704eca8cacSRocky Hao .set_tshut_mode = rk_tsadcv2_tshut_mode, 8714eca8cacSRocky Hao 8724eca8cacSRocky Hao .table = { 8734eca8cacSRocky Hao .id = rv1108_table, 8744eca8cacSRocky Hao .length = ARRAY_SIZE(rv1108_table), 8754eca8cacSRocky Hao .data_mask = TSADCV2_DATA_MASK, 8764eca8cacSRocky Hao .mode = ADC_INCREMENT, 8774eca8cacSRocky Hao }, 8784eca8cacSRocky Hao }; 8794eca8cacSRocky Hao 8807b02a5e7SCaesar Wang static const struct rockchip_tsadc_chip rk3228_tsadc_data = { 8817b02a5e7SCaesar Wang .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 8827b02a5e7SCaesar Wang .chn_num = 1, /* one channel for tsadc */ 8837b02a5e7SCaesar Wang 8847b02a5e7SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 8857b02a5e7SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 8867b02a5e7SCaesar Wang .tshut_temp = 95000, 8877b02a5e7SCaesar Wang 8887b02a5e7SCaesar Wang .initialize = rk_tsadcv2_initialize, 889952418a3SCaesar Wang .irq_ack = rk_tsadcv3_irq_ack, 8907ea38c6cSCaesar Wang .control = rk_tsadcv3_control, 8917b02a5e7SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 89214848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 8937b02a5e7SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 8947b02a5e7SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 8957b02a5e7SCaesar Wang 8967b02a5e7SCaesar Wang .table = { 897952418a3SCaesar Wang .id = rk3228_code_table, 898952418a3SCaesar Wang .length = ARRAY_SIZE(rk3228_code_table), 8997b02a5e7SCaesar Wang .data_mask = TSADCV3_DATA_MASK, 9007ea38c6cSCaesar Wang .mode = ADC_INCREMENT, 9017b02a5e7SCaesar Wang }, 9027b02a5e7SCaesar Wang }; 9037b02a5e7SCaesar Wang 904cbac8f63SCaesar Wang static const struct rockchip_tsadc_chip rk3288_tsadc_data = { 9051d98b618SCaesar Wang .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */ 9061d98b618SCaesar Wang .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */ 9071d98b618SCaesar Wang .chn_num = 2, /* two channels for tsadc */ 9081d98b618SCaesar Wang 909cbac8f63SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 910cbac8f63SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 911cbac8f63SCaesar Wang .tshut_temp = 95000, 912cbac8f63SCaesar Wang 913cbac8f63SCaesar Wang .initialize = rk_tsadcv2_initialize, 914cbac8f63SCaesar Wang .irq_ack = rk_tsadcv2_irq_ack, 915cbac8f63SCaesar Wang .control = rk_tsadcv2_control, 916cbac8f63SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 91714848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 918cbac8f63SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 919cbac8f63SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 920ce74110dSCaesar Wang 921ce74110dSCaesar Wang .table = { 922952418a3SCaesar Wang .id = rk3288_code_table, 923952418a3SCaesar Wang .length = ARRAY_SIZE(rk3288_code_table), 924ce74110dSCaesar Wang .data_mask = TSADCV2_DATA_MASK, 925020ba95dSCaesar Wang .mode = ADC_DECREMENT, 926ce74110dSCaesar Wang }, 927cbac8f63SCaesar Wang }; 928cbac8f63SCaesar Wang 929eda519d5SRocky Hao static const struct rockchip_tsadc_chip rk3328_tsadc_data = { 930eda519d5SRocky Hao .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 931eda519d5SRocky Hao .chn_num = 1, /* one channels for tsadc */ 932eda519d5SRocky Hao 933eda519d5SRocky Hao .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */ 934eda519d5SRocky Hao .tshut_temp = 95000, 935eda519d5SRocky Hao 936eda519d5SRocky Hao .initialize = rk_tsadcv2_initialize, 937eda519d5SRocky Hao .irq_ack = rk_tsadcv3_irq_ack, 938eda519d5SRocky Hao .control = rk_tsadcv3_control, 939eda519d5SRocky Hao .get_temp = rk_tsadcv2_get_temp, 940eda519d5SRocky Hao .set_alarm_temp = rk_tsadcv2_alarm_temp, 941eda519d5SRocky Hao .set_tshut_temp = rk_tsadcv2_tshut_temp, 942eda519d5SRocky Hao .set_tshut_mode = rk_tsadcv2_tshut_mode, 943eda519d5SRocky Hao 944eda519d5SRocky Hao .table = { 945eda519d5SRocky Hao .id = rk3328_code_table, 946eda519d5SRocky Hao .length = ARRAY_SIZE(rk3328_code_table), 947eda519d5SRocky Hao .data_mask = TSADCV2_DATA_MASK, 948eda519d5SRocky Hao .mode = ADC_INCREMENT, 949eda519d5SRocky Hao }, 950eda519d5SRocky Hao }; 951eda519d5SRocky Hao 9521cd60269SElaine Zhang static const struct rockchip_tsadc_chip rk3366_tsadc_data = { 9531cd60269SElaine Zhang .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 9541cd60269SElaine Zhang .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ 9551cd60269SElaine Zhang .chn_num = 2, /* two channels for tsadc */ 9561cd60269SElaine Zhang 9571cd60269SElaine Zhang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 9581cd60269SElaine Zhang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 9591cd60269SElaine Zhang .tshut_temp = 95000, 9601cd60269SElaine Zhang 9611cd60269SElaine Zhang .initialize = rk_tsadcv3_initialize, 9621cd60269SElaine Zhang .irq_ack = rk_tsadcv3_irq_ack, 9631cd60269SElaine Zhang .control = rk_tsadcv3_control, 9641cd60269SElaine Zhang .get_temp = rk_tsadcv2_get_temp, 96514848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 9661cd60269SElaine Zhang .set_tshut_temp = rk_tsadcv2_tshut_temp, 9671cd60269SElaine Zhang .set_tshut_mode = rk_tsadcv2_tshut_mode, 9681cd60269SElaine Zhang 9691cd60269SElaine Zhang .table = { 9701cd60269SElaine Zhang .id = rk3228_code_table, 9711cd60269SElaine Zhang .length = ARRAY_SIZE(rk3228_code_table), 9721cd60269SElaine Zhang .data_mask = TSADCV3_DATA_MASK, 9731cd60269SElaine Zhang .mode = ADC_INCREMENT, 9741cd60269SElaine Zhang }, 9751cd60269SElaine Zhang }; 9761cd60269SElaine Zhang 97720f0af75SCaesar Wang static const struct rockchip_tsadc_chip rk3368_tsadc_data = { 97820f0af75SCaesar Wang .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 97920f0af75SCaesar Wang .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ 98020f0af75SCaesar Wang .chn_num = 2, /* two channels for tsadc */ 98120f0af75SCaesar Wang 98220f0af75SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 98320f0af75SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 98420f0af75SCaesar Wang .tshut_temp = 95000, 98520f0af75SCaesar Wang 98620f0af75SCaesar Wang .initialize = rk_tsadcv2_initialize, 98720f0af75SCaesar Wang .irq_ack = rk_tsadcv2_irq_ack, 98820f0af75SCaesar Wang .control = rk_tsadcv2_control, 98920f0af75SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 99014848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 99120f0af75SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 99220f0af75SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 99320f0af75SCaesar Wang 99420f0af75SCaesar Wang .table = { 995952418a3SCaesar Wang .id = rk3368_code_table, 996952418a3SCaesar Wang .length = ARRAY_SIZE(rk3368_code_table), 99720f0af75SCaesar Wang .data_mask = TSADCV3_DATA_MASK, 99820f0af75SCaesar Wang .mode = ADC_INCREMENT, 99920f0af75SCaesar Wang }, 100020f0af75SCaesar Wang }; 100120f0af75SCaesar Wang 1002b0d70338SCaesar Wang static const struct rockchip_tsadc_chip rk3399_tsadc_data = { 1003b0d70338SCaesar Wang .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ 1004b0d70338SCaesar Wang .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ 1005b0d70338SCaesar Wang .chn_num = 2, /* two channels for tsadc */ 1006b0d70338SCaesar Wang 1007b0d70338SCaesar Wang .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ 1008b0d70338SCaesar Wang .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ 1009b0d70338SCaesar Wang .tshut_temp = 95000, 1010b0d70338SCaesar Wang 1011b9484763SCaesar Wang .initialize = rk_tsadcv3_initialize, 1012952418a3SCaesar Wang .irq_ack = rk_tsadcv3_irq_ack, 10137ea38c6cSCaesar Wang .control = rk_tsadcv3_control, 1014b0d70338SCaesar Wang .get_temp = rk_tsadcv2_get_temp, 101514848502SCaesar Wang .set_alarm_temp = rk_tsadcv2_alarm_temp, 1016b0d70338SCaesar Wang .set_tshut_temp = rk_tsadcv2_tshut_temp, 1017b0d70338SCaesar Wang .set_tshut_mode = rk_tsadcv2_tshut_mode, 1018b0d70338SCaesar Wang 1019b0d70338SCaesar Wang .table = { 1020952418a3SCaesar Wang .id = rk3399_code_table, 1021952418a3SCaesar Wang .length = ARRAY_SIZE(rk3399_code_table), 1022b0d70338SCaesar Wang .data_mask = TSADCV3_DATA_MASK, 10237ea38c6cSCaesar Wang .mode = ADC_INCREMENT, 1024b0d70338SCaesar Wang }, 1025b0d70338SCaesar Wang }; 1026b0d70338SCaesar Wang 1027cbac8f63SCaesar Wang static const struct of_device_id of_rockchip_thermal_match[] = { 1028ffd1b122SElaine Zhang { .compatible = "rockchip,px30-tsadc", 1029ffd1b122SElaine Zhang .data = (void *)&px30_tsadc_data, 1030ffd1b122SElaine Zhang }, 1031cbac8f63SCaesar Wang { 10324eca8cacSRocky Hao .compatible = "rockchip,rv1108-tsadc", 10334eca8cacSRocky Hao .data = (void *)&rv1108_tsadc_data, 10344eca8cacSRocky Hao }, 10354eca8cacSRocky Hao { 10367b02a5e7SCaesar Wang .compatible = "rockchip,rk3228-tsadc", 10377b02a5e7SCaesar Wang .data = (void *)&rk3228_tsadc_data, 10387b02a5e7SCaesar Wang }, 10397b02a5e7SCaesar Wang { 1040cbac8f63SCaesar Wang .compatible = "rockchip,rk3288-tsadc", 1041cbac8f63SCaesar Wang .data = (void *)&rk3288_tsadc_data, 1042cbac8f63SCaesar Wang }, 104320f0af75SCaesar Wang { 1044eda519d5SRocky Hao .compatible = "rockchip,rk3328-tsadc", 1045eda519d5SRocky Hao .data = (void *)&rk3328_tsadc_data, 1046eda519d5SRocky Hao }, 1047eda519d5SRocky Hao { 10481cd60269SElaine Zhang .compatible = "rockchip,rk3366-tsadc", 10491cd60269SElaine Zhang .data = (void *)&rk3366_tsadc_data, 10501cd60269SElaine Zhang }, 10511cd60269SElaine Zhang { 105220f0af75SCaesar Wang .compatible = "rockchip,rk3368-tsadc", 105320f0af75SCaesar Wang .data = (void *)&rk3368_tsadc_data, 105420f0af75SCaesar Wang }, 1055b0d70338SCaesar Wang { 1056b0d70338SCaesar Wang .compatible = "rockchip,rk3399-tsadc", 1057b0d70338SCaesar Wang .data = (void *)&rk3399_tsadc_data, 1058b0d70338SCaesar Wang }, 1059cbac8f63SCaesar Wang { /* end */ }, 1060cbac8f63SCaesar Wang }; 1061cbac8f63SCaesar Wang MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); 1062cbac8f63SCaesar Wang 1063cbac8f63SCaesar Wang static void 1064cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on) 1065cbac8f63SCaesar Wang { 1066cbac8f63SCaesar Wang struct thermal_zone_device *tzd = sensor->tzd; 1067cbac8f63SCaesar Wang 1068cbac8f63SCaesar Wang tzd->ops->set_mode(tzd, 1069cbac8f63SCaesar Wang on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED); 1070cbac8f63SCaesar Wang } 1071cbac8f63SCaesar Wang 1072cbac8f63SCaesar Wang static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev) 1073cbac8f63SCaesar Wang { 1074cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal = dev; 1075cbac8f63SCaesar Wang int i; 1076cbac8f63SCaesar Wang 1077cbac8f63SCaesar Wang dev_dbg(&thermal->pdev->dev, "thermal alarm\n"); 1078cbac8f63SCaesar Wang 1079cbac8f63SCaesar Wang thermal->chip->irq_ack(thermal->regs); 1080cbac8f63SCaesar Wang 10811d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 10820e70f466SSrinivas Pandruvada thermal_zone_device_update(thermal->sensors[i].tzd, 10830e70f466SSrinivas Pandruvada THERMAL_EVENT_UNSPECIFIED); 1084cbac8f63SCaesar Wang 1085cbac8f63SCaesar Wang return IRQ_HANDLED; 1086cbac8f63SCaesar Wang } 1087cbac8f63SCaesar Wang 108814848502SCaesar Wang static int rockchip_thermal_set_trips(void *_sensor, int low, int high) 108914848502SCaesar Wang { 109014848502SCaesar Wang struct rockchip_thermal_sensor *sensor = _sensor; 109114848502SCaesar Wang struct rockchip_thermal_data *thermal = sensor->thermal; 109214848502SCaesar Wang const struct rockchip_tsadc_chip *tsadc = thermal->chip; 109314848502SCaesar Wang 109414848502SCaesar Wang dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n", 109514848502SCaesar Wang __func__, sensor->id, low, high); 109614848502SCaesar Wang 1097d3530497SCaesar Wang return tsadc->set_alarm_temp(&tsadc->table, 109814848502SCaesar Wang sensor->id, thermal->regs, high); 109914848502SCaesar Wang } 110014848502SCaesar Wang 110117e8351aSSascha Hauer static int rockchip_thermal_get_temp(void *_sensor, int *out_temp) 1102cbac8f63SCaesar Wang { 1103cbac8f63SCaesar Wang struct rockchip_thermal_sensor *sensor = _sensor; 1104cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal = sensor->thermal; 1105cbac8f63SCaesar Wang const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip; 1106cbac8f63SCaesar Wang int retval; 1107cbac8f63SCaesar Wang 1108cdd8b3f7SBrian Norris retval = tsadc->get_temp(&tsadc->table, 1109ce74110dSCaesar Wang sensor->id, thermal->regs, out_temp); 111017e8351aSSascha Hauer dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n", 1111cbac8f63SCaesar Wang sensor->id, *out_temp, retval); 1112cbac8f63SCaesar Wang 1113cbac8f63SCaesar Wang return retval; 1114cbac8f63SCaesar Wang } 1115cbac8f63SCaesar Wang 1116cbac8f63SCaesar Wang static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = { 1117cbac8f63SCaesar Wang .get_temp = rockchip_thermal_get_temp, 111814848502SCaesar Wang .set_trips = rockchip_thermal_set_trips, 1119cbac8f63SCaesar Wang }; 1120cbac8f63SCaesar Wang 1121cbac8f63SCaesar Wang static int rockchip_configure_from_dt(struct device *dev, 1122cbac8f63SCaesar Wang struct device_node *np, 1123cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal) 1124cbac8f63SCaesar Wang { 1125cbac8f63SCaesar Wang u32 shut_temp, tshut_mode, tshut_polarity; 1126cbac8f63SCaesar Wang 1127cbac8f63SCaesar Wang if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) { 1128cbac8f63SCaesar Wang dev_warn(dev, 1129437df217SCaesar Wang "Missing tshut temp property, using default %d\n", 1130cbac8f63SCaesar Wang thermal->chip->tshut_temp); 1131cbac8f63SCaesar Wang thermal->tshut_temp = thermal->chip->tshut_temp; 1132cbac8f63SCaesar Wang } else { 113343b4eb9fSCaesar Wang if (shut_temp > INT_MAX) { 1134437df217SCaesar Wang dev_err(dev, "Invalid tshut temperature specified: %d\n", 113543b4eb9fSCaesar Wang shut_temp); 1136cbac8f63SCaesar Wang return -ERANGE; 1137cbac8f63SCaesar Wang } 113843b4eb9fSCaesar Wang thermal->tshut_temp = shut_temp; 113943b4eb9fSCaesar Wang } 1140cbac8f63SCaesar Wang 1141cbac8f63SCaesar Wang if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) { 1142cbac8f63SCaesar Wang dev_warn(dev, 1143cbac8f63SCaesar Wang "Missing tshut mode property, using default (%s)\n", 1144cbac8f63SCaesar Wang thermal->chip->tshut_mode == TSHUT_MODE_GPIO ? 1145cbac8f63SCaesar Wang "gpio" : "cru"); 1146cbac8f63SCaesar Wang thermal->tshut_mode = thermal->chip->tshut_mode; 1147cbac8f63SCaesar Wang } else { 1148cbac8f63SCaesar Wang thermal->tshut_mode = tshut_mode; 1149cbac8f63SCaesar Wang } 1150cbac8f63SCaesar Wang 1151cbac8f63SCaesar Wang if (thermal->tshut_mode > 1) { 1152cbac8f63SCaesar Wang dev_err(dev, "Invalid tshut mode specified: %d\n", 1153cbac8f63SCaesar Wang thermal->tshut_mode); 1154cbac8f63SCaesar Wang return -EINVAL; 1155cbac8f63SCaesar Wang } 1156cbac8f63SCaesar Wang 1157cbac8f63SCaesar Wang if (of_property_read_u32(np, "rockchip,hw-tshut-polarity", 1158cbac8f63SCaesar Wang &tshut_polarity)) { 1159cbac8f63SCaesar Wang dev_warn(dev, 1160cbac8f63SCaesar Wang "Missing tshut-polarity property, using default (%s)\n", 1161cbac8f63SCaesar Wang thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ? 1162cbac8f63SCaesar Wang "low" : "high"); 1163cbac8f63SCaesar Wang thermal->tshut_polarity = thermal->chip->tshut_polarity; 1164cbac8f63SCaesar Wang } else { 1165cbac8f63SCaesar Wang thermal->tshut_polarity = tshut_polarity; 1166cbac8f63SCaesar Wang } 1167cbac8f63SCaesar Wang 1168cbac8f63SCaesar Wang if (thermal->tshut_polarity > 1) { 1169cbac8f63SCaesar Wang dev_err(dev, "Invalid tshut-polarity specified: %d\n", 1170cbac8f63SCaesar Wang thermal->tshut_polarity); 1171cbac8f63SCaesar Wang return -EINVAL; 1172cbac8f63SCaesar Wang } 1173cbac8f63SCaesar Wang 1174b9484763SCaesar Wang /* The tsadc wont to handle the error in here since some SoCs didn't 1175b9484763SCaesar Wang * need this property. 1176b9484763SCaesar Wang */ 1177b9484763SCaesar Wang thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); 1178ce62abaeSShawn Lin if (IS_ERR(thermal->grf)) 1179ce62abaeSShawn Lin dev_warn(dev, "Missing rockchip,grf property\n"); 1180b9484763SCaesar Wang 1181cbac8f63SCaesar Wang return 0; 1182cbac8f63SCaesar Wang } 1183cbac8f63SCaesar Wang 1184cbac8f63SCaesar Wang static int 1185cbac8f63SCaesar Wang rockchip_thermal_register_sensor(struct platform_device *pdev, 1186cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal, 1187cbac8f63SCaesar Wang struct rockchip_thermal_sensor *sensor, 11881d98b618SCaesar Wang int id) 1189cbac8f63SCaesar Wang { 1190cbac8f63SCaesar Wang const struct rockchip_tsadc_chip *tsadc = thermal->chip; 1191cbac8f63SCaesar Wang int error; 1192cbac8f63SCaesar Wang 1193cbac8f63SCaesar Wang tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode); 1194d3530497SCaesar Wang 1195d3530497SCaesar Wang error = tsadc->set_tshut_temp(&tsadc->table, id, thermal->regs, 1196ce74110dSCaesar Wang thermal->tshut_temp); 1197d3530497SCaesar Wang if (error) 1198d3530497SCaesar Wang dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n", 1199d3530497SCaesar Wang __func__, thermal->tshut_temp, error); 1200cbac8f63SCaesar Wang 1201cbac8f63SCaesar Wang sensor->thermal = thermal; 1202cbac8f63SCaesar Wang sensor->id = id; 12032633ad19SEduardo Valentin sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id, 12042633ad19SEduardo Valentin sensor, &rockchip_of_thermal_ops); 1205cbac8f63SCaesar Wang if (IS_ERR(sensor->tzd)) { 1206cbac8f63SCaesar Wang error = PTR_ERR(sensor->tzd); 1207cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to register sensor %d: %d\n", 1208cbac8f63SCaesar Wang id, error); 1209cbac8f63SCaesar Wang return error; 1210cbac8f63SCaesar Wang } 1211cbac8f63SCaesar Wang 1212cbac8f63SCaesar Wang return 0; 1213cbac8f63SCaesar Wang } 1214cbac8f63SCaesar Wang 121513c1cfdaSCaesar Wang /** 1216cbac8f63SCaesar Wang * Reset TSADC Controller, reset all tsadc registers. 1217cbac8f63SCaesar Wang */ 1218cbac8f63SCaesar Wang static void rockchip_thermal_reset_controller(struct reset_control *reset) 1219cbac8f63SCaesar Wang { 1220cbac8f63SCaesar Wang reset_control_assert(reset); 1221cbac8f63SCaesar Wang usleep_range(10, 20); 1222cbac8f63SCaesar Wang reset_control_deassert(reset); 1223cbac8f63SCaesar Wang } 1224cbac8f63SCaesar Wang 1225cbac8f63SCaesar Wang static int rockchip_thermal_probe(struct platform_device *pdev) 1226cbac8f63SCaesar Wang { 1227cbac8f63SCaesar Wang struct device_node *np = pdev->dev.of_node; 1228cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal; 1229cbac8f63SCaesar Wang const struct of_device_id *match; 1230cbac8f63SCaesar Wang struct resource *res; 1231cbac8f63SCaesar Wang int irq; 12322633ad19SEduardo Valentin int i; 1233cbac8f63SCaesar Wang int error; 1234cbac8f63SCaesar Wang 1235cbac8f63SCaesar Wang match = of_match_node(of_rockchip_thermal_match, np); 1236cbac8f63SCaesar Wang if (!match) 1237cbac8f63SCaesar Wang return -ENXIO; 1238cbac8f63SCaesar Wang 1239cbac8f63SCaesar Wang irq = platform_get_irq(pdev, 0); 1240cbac8f63SCaesar Wang if (irq < 0) { 1241cbac8f63SCaesar Wang dev_err(&pdev->dev, "no irq resource?\n"); 1242cbac8f63SCaesar Wang return -EINVAL; 1243cbac8f63SCaesar Wang } 1244cbac8f63SCaesar Wang 1245cbac8f63SCaesar Wang thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data), 1246cbac8f63SCaesar Wang GFP_KERNEL); 1247cbac8f63SCaesar Wang if (!thermal) 1248cbac8f63SCaesar Wang return -ENOMEM; 1249cbac8f63SCaesar Wang 1250cbac8f63SCaesar Wang thermal->pdev = pdev; 1251cbac8f63SCaesar Wang 1252cbac8f63SCaesar Wang thermal->chip = (const struct rockchip_tsadc_chip *)match->data; 1253cbac8f63SCaesar Wang if (!thermal->chip) 1254cbac8f63SCaesar Wang return -EINVAL; 1255cbac8f63SCaesar Wang 1256cbac8f63SCaesar Wang res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1257cbac8f63SCaesar Wang thermal->regs = devm_ioremap_resource(&pdev->dev, res); 1258cbac8f63SCaesar Wang if (IS_ERR(thermal->regs)) 1259cbac8f63SCaesar Wang return PTR_ERR(thermal->regs); 1260cbac8f63SCaesar Wang 1261cbac8f63SCaesar Wang thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb"); 1262cbac8f63SCaesar Wang if (IS_ERR(thermal->reset)) { 1263cbac8f63SCaesar Wang error = PTR_ERR(thermal->reset); 1264cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error); 1265cbac8f63SCaesar Wang return error; 1266cbac8f63SCaesar Wang } 1267cbac8f63SCaesar Wang 1268cbac8f63SCaesar Wang thermal->clk = devm_clk_get(&pdev->dev, "tsadc"); 1269cbac8f63SCaesar Wang if (IS_ERR(thermal->clk)) { 1270cbac8f63SCaesar Wang error = PTR_ERR(thermal->clk); 1271cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error); 1272cbac8f63SCaesar Wang return error; 1273cbac8f63SCaesar Wang } 1274cbac8f63SCaesar Wang 1275cbac8f63SCaesar Wang thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); 1276cbac8f63SCaesar Wang if (IS_ERR(thermal->pclk)) { 12770d0a2bf6SDan Carpenter error = PTR_ERR(thermal->pclk); 1278cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n", 1279cbac8f63SCaesar Wang error); 1280cbac8f63SCaesar Wang return error; 1281cbac8f63SCaesar Wang } 1282cbac8f63SCaesar Wang 1283cbac8f63SCaesar Wang error = clk_prepare_enable(thermal->clk); 1284cbac8f63SCaesar Wang if (error) { 1285cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to enable converter clock: %d\n", 1286cbac8f63SCaesar Wang error); 1287cbac8f63SCaesar Wang return error; 1288cbac8f63SCaesar Wang } 1289cbac8f63SCaesar Wang 1290cbac8f63SCaesar Wang error = clk_prepare_enable(thermal->pclk); 1291cbac8f63SCaesar Wang if (error) { 1292cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to enable pclk: %d\n", error); 1293cbac8f63SCaesar Wang goto err_disable_clk; 1294cbac8f63SCaesar Wang } 1295cbac8f63SCaesar Wang 1296cbac8f63SCaesar Wang rockchip_thermal_reset_controller(thermal->reset); 1297cbac8f63SCaesar Wang 1298cbac8f63SCaesar Wang error = rockchip_configure_from_dt(&pdev->dev, np, thermal); 1299cbac8f63SCaesar Wang if (error) { 1300cbac8f63SCaesar Wang dev_err(&pdev->dev, "failed to parse device tree data: %d\n", 1301cbac8f63SCaesar Wang error); 1302cbac8f63SCaesar Wang goto err_disable_pclk; 1303cbac8f63SCaesar Wang } 1304cbac8f63SCaesar Wang 1305b9484763SCaesar Wang thermal->chip->initialize(thermal->grf, thermal->regs, 1306b9484763SCaesar Wang thermal->tshut_polarity); 1307cbac8f63SCaesar Wang 13081d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) { 1309cbac8f63SCaesar Wang error = rockchip_thermal_register_sensor(pdev, thermal, 13101d98b618SCaesar Wang &thermal->sensors[i], 13111d98b618SCaesar Wang thermal->chip->chn_id[i]); 1312cbac8f63SCaesar Wang if (error) { 1313cbac8f63SCaesar Wang dev_err(&pdev->dev, 13141d98b618SCaesar Wang "failed to register sensor[%d] : error = %d\n", 13151d98b618SCaesar Wang i, error); 1316cbac8f63SCaesar Wang goto err_disable_pclk; 1317cbac8f63SCaesar Wang } 1318cbac8f63SCaesar Wang } 1319cbac8f63SCaesar Wang 1320cbac8f63SCaesar Wang error = devm_request_threaded_irq(&pdev->dev, irq, NULL, 1321cbac8f63SCaesar Wang &rockchip_thermal_alarm_irq_thread, 1322cbac8f63SCaesar Wang IRQF_ONESHOT, 1323cbac8f63SCaesar Wang "rockchip_thermal", thermal); 1324cbac8f63SCaesar Wang if (error) { 1325cbac8f63SCaesar Wang dev_err(&pdev->dev, 1326cbac8f63SCaesar Wang "failed to request tsadc irq: %d\n", error); 13272633ad19SEduardo Valentin goto err_disable_pclk; 1328cbac8f63SCaesar Wang } 1329cbac8f63SCaesar Wang 1330cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, true); 1331cbac8f63SCaesar Wang 13321d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 1333cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); 1334cbac8f63SCaesar Wang 1335cbac8f63SCaesar Wang platform_set_drvdata(pdev, thermal); 1336cbac8f63SCaesar Wang 1337cbac8f63SCaesar Wang return 0; 1338cbac8f63SCaesar Wang 1339cbac8f63SCaesar Wang err_disable_pclk: 1340cbac8f63SCaesar Wang clk_disable_unprepare(thermal->pclk); 1341cbac8f63SCaesar Wang err_disable_clk: 1342cbac8f63SCaesar Wang clk_disable_unprepare(thermal->clk); 1343cbac8f63SCaesar Wang 1344cbac8f63SCaesar Wang return error; 1345cbac8f63SCaesar Wang } 1346cbac8f63SCaesar Wang 1347cbac8f63SCaesar Wang static int rockchip_thermal_remove(struct platform_device *pdev) 1348cbac8f63SCaesar Wang { 1349cbac8f63SCaesar Wang struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); 1350cbac8f63SCaesar Wang int i; 1351cbac8f63SCaesar Wang 13521d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) { 1353cbac8f63SCaesar Wang struct rockchip_thermal_sensor *sensor = &thermal->sensors[i]; 1354cbac8f63SCaesar Wang 1355cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(sensor, false); 1356cbac8f63SCaesar Wang } 1357cbac8f63SCaesar Wang 1358cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, false); 1359cbac8f63SCaesar Wang 1360cbac8f63SCaesar Wang clk_disable_unprepare(thermal->pclk); 1361cbac8f63SCaesar Wang clk_disable_unprepare(thermal->clk); 1362cbac8f63SCaesar Wang 1363cbac8f63SCaesar Wang return 0; 1364cbac8f63SCaesar Wang } 1365cbac8f63SCaesar Wang 1366cbac8f63SCaesar Wang static int __maybe_unused rockchip_thermal_suspend(struct device *dev) 1367cbac8f63SCaesar Wang { 136826d84c27SWolfram Sang struct rockchip_thermal_data *thermal = dev_get_drvdata(dev); 1369cbac8f63SCaesar Wang int i; 1370cbac8f63SCaesar Wang 13711d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 1372cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(&thermal->sensors[i], false); 1373cbac8f63SCaesar Wang 1374cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, false); 1375cbac8f63SCaesar Wang 1376cbac8f63SCaesar Wang clk_disable(thermal->pclk); 1377cbac8f63SCaesar Wang clk_disable(thermal->clk); 13780f5ee062SHeiko Stuebner 13790f5ee062SHeiko Stuebner pinctrl_pm_select_sleep_state(dev); 13807e38a5b1SCaesar Wang 1381cbac8f63SCaesar Wang return 0; 1382cbac8f63SCaesar Wang } 1383cbac8f63SCaesar Wang 1384cbac8f63SCaesar Wang static int __maybe_unused rockchip_thermal_resume(struct device *dev) 1385cbac8f63SCaesar Wang { 138626d84c27SWolfram Sang struct rockchip_thermal_data *thermal = dev_get_drvdata(dev); 1387cbac8f63SCaesar Wang int i; 1388cbac8f63SCaesar Wang int error; 1389cbac8f63SCaesar Wang 1390cbac8f63SCaesar Wang error = clk_enable(thermal->clk); 1391cbac8f63SCaesar Wang if (error) 1392cbac8f63SCaesar Wang return error; 1393cbac8f63SCaesar Wang 1394cbac8f63SCaesar Wang error = clk_enable(thermal->pclk); 1395ab5b52f1SShawn Lin if (error) { 1396ab5b52f1SShawn Lin clk_disable(thermal->clk); 1397cbac8f63SCaesar Wang return error; 1398ab5b52f1SShawn Lin } 1399cbac8f63SCaesar Wang 1400cbac8f63SCaesar Wang rockchip_thermal_reset_controller(thermal->reset); 1401cbac8f63SCaesar Wang 1402b9484763SCaesar Wang thermal->chip->initialize(thermal->grf, thermal->regs, 1403b9484763SCaesar Wang thermal->tshut_polarity); 1404cbac8f63SCaesar Wang 14051d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) { 14061d98b618SCaesar Wang int id = thermal->sensors[i].id; 1407cbac8f63SCaesar Wang 1408cbac8f63SCaesar Wang thermal->chip->set_tshut_mode(id, thermal->regs, 1409cbac8f63SCaesar Wang thermal->tshut_mode); 1410d3530497SCaesar Wang 1411d3530497SCaesar Wang error = thermal->chip->set_tshut_temp(&thermal->chip->table, 1412ce74110dSCaesar Wang id, thermal->regs, 1413cbac8f63SCaesar Wang thermal->tshut_temp); 1414d3530497SCaesar Wang if (error) 141526d84c27SWolfram Sang dev_err(dev, "%s: invalid tshut=%d, error=%d\n", 1416d3530497SCaesar Wang __func__, thermal->tshut_temp, error); 1417cbac8f63SCaesar Wang } 1418cbac8f63SCaesar Wang 1419cbac8f63SCaesar Wang thermal->chip->control(thermal->regs, true); 1420cbac8f63SCaesar Wang 14211d98b618SCaesar Wang for (i = 0; i < thermal->chip->chn_num; i++) 1422cbac8f63SCaesar Wang rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); 1423cbac8f63SCaesar Wang 14240f5ee062SHeiko Stuebner pinctrl_pm_select_default_state(dev); 14257e38a5b1SCaesar Wang 1426cbac8f63SCaesar Wang return 0; 1427cbac8f63SCaesar Wang } 1428cbac8f63SCaesar Wang 1429cbac8f63SCaesar Wang static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops, 1430cbac8f63SCaesar Wang rockchip_thermal_suspend, rockchip_thermal_resume); 1431cbac8f63SCaesar Wang 1432cbac8f63SCaesar Wang static struct platform_driver rockchip_thermal_driver = { 1433cbac8f63SCaesar Wang .driver = { 1434cbac8f63SCaesar Wang .name = "rockchip-thermal", 1435cbac8f63SCaesar Wang .pm = &rockchip_thermal_pm_ops, 1436cbac8f63SCaesar Wang .of_match_table = of_rockchip_thermal_match, 1437cbac8f63SCaesar Wang }, 1438cbac8f63SCaesar Wang .probe = rockchip_thermal_probe, 1439cbac8f63SCaesar Wang .remove = rockchip_thermal_remove, 1440cbac8f63SCaesar Wang }; 1441cbac8f63SCaesar Wang 1442cbac8f63SCaesar Wang module_platform_driver(rockchip_thermal_driver); 1443cbac8f63SCaesar Wang 1444cbac8f63SCaesar Wang MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver"); 1445cbac8f63SCaesar Wang MODULE_AUTHOR("Rockchip, Inc."); 1446cbac8f63SCaesar Wang MODULE_LICENSE("GPL v2"); 1447cbac8f63SCaesar Wang MODULE_ALIAS("platform:rockchip-thermal"); 1448