1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  R-Car Gen3 THS thermal sensor driver
4  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
5  *
6  * Copyright (C) 2016 Renesas Electronics Corporation.
7  * Copyright (C) 2016 Sang Engineering
8  */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/sys_soc.h>
18 #include <linux/thermal.h>
19 
20 #include "thermal_core.h"
21 #include "thermal_hwmon.h"
22 
23 /* Register offsets */
24 #define REG_GEN3_IRQSTR		0x04
25 #define REG_GEN3_IRQMSK		0x08
26 #define REG_GEN3_IRQCTL		0x0C
27 #define REG_GEN3_IRQEN		0x10
28 #define REG_GEN3_IRQTEMP1	0x14
29 #define REG_GEN3_IRQTEMP2	0x18
30 #define REG_GEN3_IRQTEMP3	0x1C
31 #define REG_GEN3_CTSR		0x20
32 #define REG_GEN3_THCTR		0x20
33 #define REG_GEN3_TEMP		0x28
34 #define REG_GEN3_THCODE1	0x50
35 #define REG_GEN3_THCODE2	0x54
36 #define REG_GEN3_THCODE3	0x58
37 
38 /* IRQ{STR,MSK,EN} bits */
39 #define IRQ_TEMP1		BIT(0)
40 #define IRQ_TEMP2		BIT(1)
41 #define IRQ_TEMP3		BIT(2)
42 #define IRQ_TEMPD1		BIT(3)
43 #define IRQ_TEMPD2		BIT(4)
44 #define IRQ_TEMPD3		BIT(5)
45 
46 /* CTSR bits */
47 #define CTSR_PONM	BIT(8)
48 #define CTSR_AOUT	BIT(7)
49 #define CTSR_THBGR	BIT(5)
50 #define CTSR_VMEN	BIT(4)
51 #define CTSR_VMST	BIT(1)
52 #define CTSR_THSST	BIT(0)
53 
54 /* THCTR bits */
55 #define THCTR_PONM	BIT(6)
56 #define THCTR_THSST	BIT(0)
57 
58 #define CTEMP_MASK	0xFFF
59 
60 #define MCELSIUS(temp)	((temp) * 1000)
61 #define GEN3_FUSE_MASK	0xFFF
62 
63 #define TSC_MAX_NUM	3
64 
65 /* default THCODE values if FUSEs are missing */
66 static const int thcode[TSC_MAX_NUM][3] = {
67 	{ 3397, 2800, 2221 },
68 	{ 3393, 2795, 2216 },
69 	{ 3389, 2805, 2237 },
70 };
71 
72 /* Structure for thermal temperature calculation */
73 struct equation_coefs {
74 	int a1;
75 	int b1;
76 	int a2;
77 	int b2;
78 };
79 
80 struct rcar_gen3_thermal_tsc {
81 	void __iomem *base;
82 	struct thermal_zone_device *zone;
83 	struct equation_coefs coef;
84 	int low;
85 	int high;
86 	int tj_t;
87 	int id; /* thermal channel id */
88 };
89 
90 struct rcar_gen3_thermal_priv {
91 	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
92 	unsigned int num_tscs;
93 	void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
94 };
95 
96 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
97 					 u32 reg)
98 {
99 	return ioread32(tsc->base + reg);
100 }
101 
102 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
103 					   u32 reg, u32 data)
104 {
105 	iowrite32(data, tsc->base + reg);
106 }
107 
108 /*
109  * Linear approximation for temperature
110  *
111  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
112  *
113  * The constants a and b are calculated using two triplets of int values PTAT
114  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
115  * coded values from driver. The formula to calculate a and b are taken from
116  * BSP and sparsely documented and understood.
117  *
118  * Examining the linear formula and the formula used to calculate constants a
119  * and b while knowing that the span for PTAT and THCODE values are between
120  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
121  * Integer also needs to be signed so that leaves 7 bits for binary
122  * fixed point scaling.
123  */
124 
125 #define FIXPT_SHIFT 7
126 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
127 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
128 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
129 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
130 
131 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
132 
133 /* no idea where these constants come from */
134 #define TJ_3 -41
135 
136 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
137 					 int *ptat, const int *thcode,
138 					 int ths_tj_1)
139 {
140 	/* TODO: Find documentation and document constant calculation formula */
141 
142 	/*
143 	 * Division is not scaled in BSP and if scaled it might overflow
144 	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
145 	 */
146 	tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
147 		     / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
148 
149 	tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
150 				 tsc->tj_t - FIXPT_INT(TJ_3));
151 	tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
152 
153 	tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
154 				 tsc->tj_t - FIXPT_INT(ths_tj_1));
155 	tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
156 }
157 
158 static int rcar_gen3_thermal_round(int temp)
159 {
160 	int result, round_offs;
161 
162 	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
163 		-RCAR3_THERMAL_GRAN / 2;
164 	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
165 	return result * RCAR3_THERMAL_GRAN;
166 }
167 
168 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
169 {
170 	struct rcar_gen3_thermal_tsc *tsc = devdata;
171 	int mcelsius, val;
172 	u32 reg;
173 
174 	/* Read register and convert to mili Celsius */
175 	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
176 
177 	if (reg <= thcode[tsc->id][1])
178 		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
179 				tsc->coef.a1);
180 	else
181 		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
182 				tsc->coef.a2);
183 	mcelsius = FIXPT_TO_MCELSIUS(val);
184 
185 	/* Make sure we are inside specifications */
186 	if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
187 		return -EIO;
188 
189 	/* Round value to device granularity setting */
190 	*temp = rcar_gen3_thermal_round(mcelsius);
191 
192 	return 0;
193 }
194 
195 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
196 					      int mcelsius)
197 {
198 	int celsius, val;
199 
200 	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
201 	if (celsius <= INT_FIXPT(tsc->tj_t))
202 		val = celsius * tsc->coef.a1 + tsc->coef.b1;
203 	else
204 		val = celsius * tsc->coef.a2 + tsc->coef.b2;
205 
206 	return INT_FIXPT(val);
207 }
208 
209 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
210 {
211 	struct rcar_gen3_thermal_tsc *tsc = devdata;
212 
213 	low = clamp_val(low, -40000, 120000);
214 	high = clamp_val(high, -40000, 120000);
215 
216 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
217 				rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
218 
219 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
220 				rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
221 
222 	tsc->low = low;
223 	tsc->high = high;
224 
225 	return 0;
226 }
227 
228 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
229 	.get_temp	= rcar_gen3_thermal_get_temp,
230 	.set_trips	= rcar_gen3_thermal_set_trips,
231 };
232 
233 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
234 {
235 	unsigned int i;
236 	u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
237 
238 	for (i = 0; i < priv->num_tscs; i++)
239 		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
240 }
241 
242 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
243 {
244 	struct rcar_gen3_thermal_priv *priv = data;
245 	u32 status;
246 	int i;
247 
248 	for (i = 0; i < priv->num_tscs; i++) {
249 		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
250 		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
251 		if (status)
252 			thermal_zone_device_update(priv->tscs[i]->zone,
253 						   THERMAL_EVENT_UNSPECIFIED);
254 	}
255 
256 	return IRQ_HANDLED;
257 }
258 
259 static const struct soc_device_attribute r8a7795es1[] = {
260 	{ .soc_id = "r8a7795", .revision = "ES1.*" },
261 	{ /* sentinel */ }
262 };
263 
264 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
265 {
266 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
267 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
268 
269 	usleep_range(1000, 2000);
270 
271 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
272 
273 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
274 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
275 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
276 
277 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
278 				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
279 
280 	usleep_range(100, 200);
281 
282 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
283 				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
284 				CTSR_VMST | CTSR_THSST);
285 
286 	usleep_range(1000, 2000);
287 }
288 
289 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
290 {
291 	u32 reg_val;
292 
293 	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
294 	reg_val &= ~THCTR_PONM;
295 	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
296 
297 	usleep_range(1000, 2000);
298 
299 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
300 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
301 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
302 
303 	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
304 	reg_val |= THCTR_THSST;
305 	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
306 
307 	usleep_range(1000, 2000);
308 }
309 
310 static const int rcar_gen3_ths_tj_1 = 126;
311 static const int rcar_gen3_ths_tj_1_m3_w = 116;
312 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
313 	{
314 		.compatible = "renesas,r8a774a1-thermal",
315 		.data = &rcar_gen3_ths_tj_1_m3_w,
316 	},
317 	{
318 		.compatible = "renesas,r8a7795-thermal",
319 		.data = &rcar_gen3_ths_tj_1,
320 	},
321 	{
322 		.compatible = "renesas,r8a7796-thermal",
323 		.data = &rcar_gen3_ths_tj_1_m3_w,
324 	},
325 	{
326 		.compatible = "renesas,r8a77965-thermal",
327 		.data = &rcar_gen3_ths_tj_1,
328 	},
329 	{
330 		.compatible = "renesas,r8a77980-thermal",
331 		.data = &rcar_gen3_ths_tj_1,
332 	},
333 	{},
334 };
335 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
336 
337 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
338 {
339 	struct device *dev = &pdev->dev;
340 	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
341 
342 	rcar_thermal_irq_set(priv, false);
343 
344 	pm_runtime_put(dev);
345 	pm_runtime_disable(dev);
346 
347 	return 0;
348 }
349 
350 static void rcar_gen3_hwmon_action(void *data)
351 {
352 	struct thermal_zone_device *zone = data;
353 
354 	thermal_remove_hwmon_sysfs(zone);
355 }
356 
357 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
358 {
359 	struct rcar_gen3_thermal_priv *priv;
360 	struct device *dev = &pdev->dev;
361 	const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev);
362 	struct resource *res;
363 	struct thermal_zone_device *zone;
364 	int ret, irq, i;
365 	char *irqname;
366 
367 	/* default values if FUSEs are missing */
368 	/* TODO: Read values from hardware on supported platforms */
369 	int ptat[3] = { 2631, 1509, 435 };
370 
371 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
372 	if (!priv)
373 		return -ENOMEM;
374 
375 	priv->thermal_init = rcar_gen3_thermal_init;
376 	if (soc_device_match(r8a7795es1))
377 		priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
378 
379 	platform_set_drvdata(pdev, priv);
380 
381 	/*
382 	 * Request 2 (of the 3 possible) IRQs, the driver only needs to
383 	 * to trigger on the low and high trip points of the current
384 	 * temp window at this point.
385 	 */
386 	for (i = 0; i < 2; i++) {
387 		irq = platform_get_irq(pdev, i);
388 		if (irq < 0)
389 			return irq;
390 
391 		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
392 					 dev_name(dev), i);
393 		if (!irqname)
394 			return -ENOMEM;
395 
396 		ret = devm_request_threaded_irq(dev, irq, NULL,
397 						rcar_gen3_thermal_irq,
398 						IRQF_ONESHOT, irqname, priv);
399 		if (ret)
400 			return ret;
401 	}
402 
403 	pm_runtime_enable(dev);
404 	pm_runtime_get_sync(dev);
405 
406 	for (i = 0; i < TSC_MAX_NUM; i++) {
407 		struct rcar_gen3_thermal_tsc *tsc;
408 
409 		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
410 		if (!res)
411 			break;
412 
413 		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
414 		if (!tsc) {
415 			ret = -ENOMEM;
416 			goto error_unregister;
417 		}
418 
419 		tsc->base = devm_ioremap_resource(dev, res);
420 		if (IS_ERR(tsc->base)) {
421 			ret = PTR_ERR(tsc->base);
422 			goto error_unregister;
423 		}
424 		tsc->id = i;
425 
426 		priv->tscs[i] = tsc;
427 
428 		priv->thermal_init(tsc);
429 		rcar_gen3_thermal_calc_coefs(tsc, ptat, thcode[i],
430 					     *rcar_gen3_ths_tj_1);
431 
432 		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
433 							    &rcar_gen3_tz_of_ops);
434 		if (IS_ERR(zone)) {
435 			dev_err(dev, "Can't register thermal zone\n");
436 			ret = PTR_ERR(zone);
437 			goto error_unregister;
438 		}
439 		tsc->zone = zone;
440 
441 		tsc->zone->tzp->no_hwmon = false;
442 		ret = thermal_add_hwmon_sysfs(tsc->zone);
443 		if (ret)
444 			goto error_unregister;
445 
446 		ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
447 		if (ret) {
448 			goto error_unregister;
449 		}
450 
451 		ret = of_thermal_get_ntrips(tsc->zone);
452 		if (ret < 0)
453 			goto error_unregister;
454 
455 		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
456 	}
457 
458 	priv->num_tscs = i;
459 
460 	if (!priv->num_tscs) {
461 		ret = -ENODEV;
462 		goto error_unregister;
463 	}
464 
465 	rcar_thermal_irq_set(priv, true);
466 
467 	return 0;
468 
469 error_unregister:
470 	rcar_gen3_thermal_remove(pdev);
471 
472 	return ret;
473 }
474 
475 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
476 {
477 	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
478 
479 	rcar_thermal_irq_set(priv, false);
480 
481 	return 0;
482 }
483 
484 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
485 {
486 	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
487 	unsigned int i;
488 
489 	for (i = 0; i < priv->num_tscs; i++) {
490 		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
491 
492 		priv->thermal_init(tsc);
493 		rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
494 	}
495 
496 	rcar_thermal_irq_set(priv, true);
497 
498 	return 0;
499 }
500 
501 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
502 			 rcar_gen3_thermal_resume);
503 
504 static struct platform_driver rcar_gen3_thermal_driver = {
505 	.driver	= {
506 		.name	= "rcar_gen3_thermal",
507 		.pm = &rcar_gen3_thermal_pm_ops,
508 		.of_match_table = rcar_gen3_thermal_dt_ids,
509 	},
510 	.probe		= rcar_gen3_thermal_probe,
511 	.remove		= rcar_gen3_thermal_remove,
512 };
513 module_platform_driver(rcar_gen3_thermal_driver);
514 
515 MODULE_LICENSE("GPL v2");
516 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
517 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
518