1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  R-Car Gen3 THS thermal sensor driver
4  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
5  *
6  * Copyright (C) 2016 Renesas Electronics Corporation.
7  * Copyright (C) 2016 Sang Engineering
8  */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/sys_soc.h>
18 #include <linux/thermal.h>
19 
20 #include "thermal_core.h"
21 #include "thermal_hwmon.h"
22 
23 /* Register offsets */
24 #define REG_GEN3_IRQSTR		0x04
25 #define REG_GEN3_IRQMSK		0x08
26 #define REG_GEN3_IRQCTL		0x0C
27 #define REG_GEN3_IRQEN		0x10
28 #define REG_GEN3_IRQTEMP1	0x14
29 #define REG_GEN3_IRQTEMP2	0x18
30 #define REG_GEN3_IRQTEMP3	0x1C
31 #define REG_GEN3_CTSR		0x20
32 #define REG_GEN3_THCTR		0x20
33 #define REG_GEN3_TEMP		0x28
34 #define REG_GEN3_THCODE1	0x50
35 #define REG_GEN3_THCODE2	0x54
36 #define REG_GEN3_THCODE3	0x58
37 
38 /* IRQ{STR,MSK,EN} bits */
39 #define IRQ_TEMP1		BIT(0)
40 #define IRQ_TEMP2		BIT(1)
41 #define IRQ_TEMP3		BIT(2)
42 #define IRQ_TEMPD1		BIT(3)
43 #define IRQ_TEMPD2		BIT(4)
44 #define IRQ_TEMPD3		BIT(5)
45 
46 /* CTSR bits */
47 #define CTSR_PONM	BIT(8)
48 #define CTSR_AOUT	BIT(7)
49 #define CTSR_THBGR	BIT(5)
50 #define CTSR_VMEN	BIT(4)
51 #define CTSR_VMST	BIT(1)
52 #define CTSR_THSST	BIT(0)
53 
54 /* THCTR bits */
55 #define THCTR_PONM	BIT(6)
56 #define THCTR_THSST	BIT(0)
57 
58 #define CTEMP_MASK	0xFFF
59 
60 #define MCELSIUS(temp)	((temp) * 1000)
61 #define GEN3_FUSE_MASK	0xFFF
62 
63 #define TSC_MAX_NUM	5
64 
65 /* default THCODE values if FUSEs are missing */
66 static const int thcodes[TSC_MAX_NUM][3] = {
67 	{ 3397, 2800, 2221 },
68 	{ 3393, 2795, 2216 },
69 	{ 3389, 2805, 2237 },
70 	{ 3415, 2694, 2195 },
71 	{ 3356, 2724, 2244 },
72 };
73 
74 /* Structure for thermal temperature calculation */
75 struct equation_coefs {
76 	int a1;
77 	int b1;
78 	int a2;
79 	int b2;
80 };
81 
82 struct rcar_gen3_thermal_tsc {
83 	void __iomem *base;
84 	struct thermal_zone_device *zone;
85 	struct equation_coefs coef;
86 	int tj_t;
87 	int id; /* thermal channel id */
88 };
89 
90 struct rcar_gen3_thermal_priv {
91 	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
92 	unsigned int num_tscs;
93 	void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
94 };
95 
96 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
97 					 u32 reg)
98 {
99 	return ioread32(tsc->base + reg);
100 }
101 
102 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
103 					   u32 reg, u32 data)
104 {
105 	iowrite32(data, tsc->base + reg);
106 }
107 
108 /*
109  * Linear approximation for temperature
110  *
111  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
112  *
113  * The constants a and b are calculated using two triplets of int values PTAT
114  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
115  * coded values from driver. The formula to calculate a and b are taken from
116  * BSP and sparsely documented and understood.
117  *
118  * Examining the linear formula and the formula used to calculate constants a
119  * and b while knowing that the span for PTAT and THCODE values are between
120  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
121  * Integer also needs to be signed so that leaves 7 bits for binary
122  * fixed point scaling.
123  */
124 
125 #define FIXPT_SHIFT 7
126 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
127 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
128 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
129 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
130 
131 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
132 
133 /* no idea where these constants come from */
134 #define TJ_3 -41
135 
136 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
137 					 int *ptat, const int *thcode,
138 					 int ths_tj_1)
139 {
140 	/* TODO: Find documentation and document constant calculation formula */
141 
142 	/*
143 	 * Division is not scaled in BSP and if scaled it might overflow
144 	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
145 	 */
146 	tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * (ths_tj_1 - TJ_3))
147 		     / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
148 
149 	tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
150 				 tsc->tj_t - FIXPT_INT(TJ_3));
151 	tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
152 
153 	tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
154 				 tsc->tj_t - FIXPT_INT(ths_tj_1));
155 	tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
156 }
157 
158 static int rcar_gen3_thermal_round(int temp)
159 {
160 	int result, round_offs;
161 
162 	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
163 		-RCAR3_THERMAL_GRAN / 2;
164 	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
165 	return result * RCAR3_THERMAL_GRAN;
166 }
167 
168 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
169 {
170 	struct rcar_gen3_thermal_tsc *tsc = devdata;
171 	int mcelsius, val;
172 	int reg;
173 
174 	/* Read register and convert to mili Celsius */
175 	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
176 
177 	if (reg <= thcodes[tsc->id][1])
178 		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
179 				tsc->coef.a1);
180 	else
181 		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
182 				tsc->coef.a2);
183 	mcelsius = FIXPT_TO_MCELSIUS(val);
184 
185 	/* Guaranteed operating range is -40C to 125C. */
186 
187 	/* Round value to device granularity setting */
188 	*temp = rcar_gen3_thermal_round(mcelsius);
189 
190 	return 0;
191 }
192 
193 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
194 	.get_temp	= rcar_gen3_thermal_get_temp,
195 };
196 
197 static const struct soc_device_attribute r8a7795es1[] = {
198 	{ .soc_id = "r8a7795", .revision = "ES1.*" },
199 	{ /* sentinel */ }
200 };
201 
202 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
203 {
204 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
205 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
206 
207 	usleep_range(1000, 2000);
208 
209 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
210 
211 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
212 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
213 
214 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
215 				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
216 
217 	usleep_range(100, 200);
218 
219 	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
220 				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
221 				CTSR_VMST | CTSR_THSST);
222 
223 	usleep_range(1000, 2000);
224 }
225 
226 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
227 {
228 	u32 reg_val;
229 
230 	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
231 	reg_val &= ~THCTR_PONM;
232 	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
233 
234 	usleep_range(1000, 2000);
235 
236 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
237 	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
238 
239 	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
240 	reg_val |= THCTR_THSST;
241 	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
242 
243 	usleep_range(1000, 2000);
244 }
245 
246 static const int rcar_gen3_ths_tj_1 = 126;
247 static const int rcar_gen3_ths_tj_1_m3_w = 116;
248 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
249 	{
250 		.compatible = "renesas,r8a774a1-thermal",
251 		.data = &rcar_gen3_ths_tj_1_m3_w,
252 	},
253 	{
254 		.compatible = "renesas,r8a774b1-thermal",
255 		.data = &rcar_gen3_ths_tj_1,
256 	},
257 	{
258 		.compatible = "renesas,r8a774e1-thermal",
259 		.data = &rcar_gen3_ths_tj_1,
260 	},
261 	{
262 		.compatible = "renesas,r8a7795-thermal",
263 		.data = &rcar_gen3_ths_tj_1,
264 	},
265 	{
266 		.compatible = "renesas,r8a7796-thermal",
267 		.data = &rcar_gen3_ths_tj_1_m3_w,
268 	},
269 	{
270 		.compatible = "renesas,r8a77961-thermal",
271 		.data = &rcar_gen3_ths_tj_1_m3_w,
272 	},
273 	{
274 		.compatible = "renesas,r8a77965-thermal",
275 		.data = &rcar_gen3_ths_tj_1,
276 	},
277 	{
278 		.compatible = "renesas,r8a77980-thermal",
279 		.data = &rcar_gen3_ths_tj_1,
280 	},
281 	{
282 		.compatible = "renesas,r8a779a0-thermal",
283 		.data = &rcar_gen3_ths_tj_1,
284 	},
285 	{},
286 };
287 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
288 
289 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
290 {
291 	struct device *dev = &pdev->dev;
292 
293 	pm_runtime_put(dev);
294 	pm_runtime_disable(dev);
295 
296 	return 0;
297 }
298 
299 static void rcar_gen3_hwmon_action(void *data)
300 {
301 	struct thermal_zone_device *zone = data;
302 
303 	thermal_remove_hwmon_sysfs(zone);
304 }
305 
306 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
307 {
308 	struct rcar_gen3_thermal_priv *priv;
309 	struct device *dev = &pdev->dev;
310 	const int *ths_tj_1 = of_device_get_match_data(dev);
311 	struct resource *res;
312 	struct thermal_zone_device *zone;
313 	int ret, i;
314 
315 	/* default values if FUSEs are missing */
316 	/* TODO: Read values from hardware on supported platforms */
317 	int ptat[3] = { 2631, 1509, 435 };
318 
319 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
320 	if (!priv)
321 		return -ENOMEM;
322 
323 	priv->thermal_init = rcar_gen3_thermal_init;
324 	if (soc_device_match(r8a7795es1))
325 		priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
326 
327 	platform_set_drvdata(pdev, priv);
328 
329 	pm_runtime_enable(dev);
330 	pm_runtime_get_sync(dev);
331 
332 	for (i = 0; i < TSC_MAX_NUM; i++) {
333 		struct rcar_gen3_thermal_tsc *tsc;
334 
335 		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
336 		if (!res)
337 			break;
338 
339 		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
340 		if (!tsc) {
341 			ret = -ENOMEM;
342 			goto error_unregister;
343 		}
344 
345 		tsc->base = devm_ioremap_resource(dev, res);
346 		if (IS_ERR(tsc->base)) {
347 			ret = PTR_ERR(tsc->base);
348 			goto error_unregister;
349 		}
350 		tsc->id = i;
351 
352 		priv->tscs[i] = tsc;
353 
354 		priv->thermal_init(tsc);
355 		rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i], *ths_tj_1);
356 
357 		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
358 							    &rcar_gen3_tz_of_ops);
359 		if (IS_ERR(zone)) {
360 			dev_err(dev, "Can't register thermal zone\n");
361 			ret = PTR_ERR(zone);
362 			goto error_unregister;
363 		}
364 		tsc->zone = zone;
365 
366 		tsc->zone->tzp->no_hwmon = false;
367 		ret = thermal_add_hwmon_sysfs(tsc->zone);
368 		if (ret)
369 			goto error_unregister;
370 
371 		ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
372 		if (ret)
373 			goto error_unregister;
374 
375 		ret = of_thermal_get_ntrips(tsc->zone);
376 		if (ret < 0)
377 			goto error_unregister;
378 
379 		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
380 	}
381 
382 	priv->num_tscs = i;
383 
384 	if (!priv->num_tscs) {
385 		ret = -ENODEV;
386 		goto error_unregister;
387 	}
388 
389 	return 0;
390 
391 error_unregister:
392 	rcar_gen3_thermal_remove(pdev);
393 
394 	return ret;
395 }
396 
397 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
398 {
399 	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
400 	unsigned int i;
401 
402 	for (i = 0; i < priv->num_tscs; i++) {
403 		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
404 
405 		priv->thermal_init(tsc);
406 	}
407 
408 	return 0;
409 }
410 
411 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
412 			 rcar_gen3_thermal_resume);
413 
414 static struct platform_driver rcar_gen3_thermal_driver = {
415 	.driver	= {
416 		.name	= "rcar_gen3_thermal",
417 		.pm = &rcar_gen3_thermal_pm_ops,
418 		.of_match_table = rcar_gen3_thermal_dt_ids,
419 	},
420 	.probe		= rcar_gen3_thermal_probe,
421 	.remove		= rcar_gen3_thermal_remove,
422 };
423 module_platform_driver(rcar_gen3_thermal_driver);
424 
425 MODULE_LICENSE("GPL v2");
426 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
427 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
428