1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * R-Car Gen3 THS thermal sensor driver 4 * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen. 5 * 6 * Copyright (C) 2016 Renesas Electronics Corporation. 7 * Copyright (C) 2016 Sang Engineering 8 */ 9 #include <linux/delay.h> 10 #include <linux/err.h> 11 #include <linux/interrupt.h> 12 #include <linux/io.h> 13 #include <linux/module.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/spinlock.h> 18 #include <linux/sys_soc.h> 19 #include <linux/thermal.h> 20 21 #include "thermal_core.h" 22 23 /* Register offsets */ 24 #define REG_GEN3_IRQSTR 0x04 25 #define REG_GEN3_IRQMSK 0x08 26 #define REG_GEN3_IRQCTL 0x0C 27 #define REG_GEN3_IRQEN 0x10 28 #define REG_GEN3_IRQTEMP1 0x14 29 #define REG_GEN3_IRQTEMP2 0x18 30 #define REG_GEN3_IRQTEMP3 0x1C 31 #define REG_GEN3_CTSR 0x20 32 #define REG_GEN3_THCTR 0x20 33 #define REG_GEN3_TEMP 0x28 34 #define REG_GEN3_THCODE1 0x50 35 #define REG_GEN3_THCODE2 0x54 36 #define REG_GEN3_THCODE3 0x58 37 38 /* IRQ{STR,MSK,EN} bits */ 39 #define IRQ_TEMP1 BIT(0) 40 #define IRQ_TEMP2 BIT(1) 41 #define IRQ_TEMP3 BIT(2) 42 #define IRQ_TEMPD1 BIT(3) 43 #define IRQ_TEMPD2 BIT(4) 44 #define IRQ_TEMPD3 BIT(5) 45 46 /* CTSR bits */ 47 #define CTSR_PONM BIT(8) 48 #define CTSR_AOUT BIT(7) 49 #define CTSR_THBGR BIT(5) 50 #define CTSR_VMEN BIT(4) 51 #define CTSR_VMST BIT(1) 52 #define CTSR_THSST BIT(0) 53 54 /* THCTR bits */ 55 #define THCTR_PONM BIT(6) 56 #define THCTR_THSST BIT(0) 57 58 #define CTEMP_MASK 0xFFF 59 60 #define MCELSIUS(temp) ((temp) * 1000) 61 #define GEN3_FUSE_MASK 0xFFF 62 63 #define TSC_MAX_NUM 3 64 65 /* Structure for thermal temperature calculation */ 66 struct equation_coefs { 67 int a1; 68 int b1; 69 int a2; 70 int b2; 71 }; 72 73 struct rcar_gen3_thermal_tsc { 74 void __iomem *base; 75 struct thermal_zone_device *zone; 76 struct equation_coefs coef; 77 int low; 78 int high; 79 }; 80 81 struct rcar_gen3_thermal_priv { 82 struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM]; 83 unsigned int num_tscs; 84 spinlock_t lock; /* Protect interrupts on and off */ 85 void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc); 86 }; 87 88 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc, 89 u32 reg) 90 { 91 return ioread32(tsc->base + reg); 92 } 93 94 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc, 95 u32 reg, u32 data) 96 { 97 iowrite32(data, tsc->base + reg); 98 } 99 100 /* 101 * Linear approximation for temperature 102 * 103 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a 104 * 105 * The constants a and b are calculated using two triplets of int values PTAT 106 * and THCODE. PTAT and THCODE can either be read from hardware or use hard 107 * coded values from driver. The formula to calculate a and b are taken from 108 * BSP and sparsely documented and understood. 109 * 110 * Examining the linear formula and the formula used to calculate constants a 111 * and b while knowing that the span for PTAT and THCODE values are between 112 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001. 113 * Integer also needs to be signed so that leaves 7 bits for binary 114 * fixed point scaling. 115 */ 116 117 #define FIXPT_SHIFT 7 118 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT) 119 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT) 120 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b)) 121 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT) 122 123 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */ 124 125 /* no idea where these constants come from */ 126 #define TJ_1 116 127 #define TJ_3 -41 128 129 static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef, 130 int *ptat, int *thcode) 131 { 132 int tj_2; 133 134 /* TODO: Find documentation and document constant calculation formula */ 135 136 /* 137 * Division is not scaled in BSP and if scaled it might overflow 138 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled 139 */ 140 tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157) 141 / (ptat[0] - ptat[2])) - FIXPT_INT(41); 142 143 coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]), 144 tj_2 - FIXPT_INT(TJ_3)); 145 coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3; 146 147 coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]), 148 tj_2 - FIXPT_INT(TJ_1)); 149 coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1; 150 } 151 152 static int rcar_gen3_thermal_round(int temp) 153 { 154 int result, round_offs; 155 156 round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 : 157 -RCAR3_THERMAL_GRAN / 2; 158 result = (temp + round_offs) / RCAR3_THERMAL_GRAN; 159 return result * RCAR3_THERMAL_GRAN; 160 } 161 162 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp) 163 { 164 struct rcar_gen3_thermal_tsc *tsc = devdata; 165 int mcelsius, val1, val2; 166 u32 reg; 167 168 /* Read register and convert to mili Celsius */ 169 reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK; 170 171 val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1); 172 val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2); 173 mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2); 174 175 /* Make sure we are inside specifications */ 176 if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125))) 177 return -EIO; 178 179 /* Round value to device granularity setting */ 180 *temp = rcar_gen3_thermal_round(mcelsius); 181 182 return 0; 183 } 184 185 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc, 186 int mcelsius) 187 { 188 int celsius, val1, val2; 189 190 celsius = DIV_ROUND_CLOSEST(mcelsius, 1000); 191 val1 = celsius * tsc->coef.a1 + tsc->coef.b1; 192 val2 = celsius * tsc->coef.a2 + tsc->coef.b2; 193 194 return INT_FIXPT((val1 + val2) / 2); 195 } 196 197 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high) 198 { 199 struct rcar_gen3_thermal_tsc *tsc = devdata; 200 201 low = clamp_val(low, -40000, 120000); 202 high = clamp_val(high, -40000, 120000); 203 204 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1, 205 rcar_gen3_thermal_mcelsius_to_temp(tsc, low)); 206 207 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2, 208 rcar_gen3_thermal_mcelsius_to_temp(tsc, high)); 209 210 tsc->low = low; 211 tsc->high = high; 212 213 return 0; 214 } 215 216 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = { 217 .get_temp = rcar_gen3_thermal_get_temp, 218 .set_trips = rcar_gen3_thermal_set_trips, 219 }; 220 221 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on) 222 { 223 unsigned int i; 224 u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0; 225 226 for (i = 0; i < priv->num_tscs; i++) 227 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val); 228 } 229 230 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data) 231 { 232 struct rcar_gen3_thermal_priv *priv = data; 233 u32 status; 234 int i, ret = IRQ_HANDLED; 235 236 spin_lock(&priv->lock); 237 for (i = 0; i < priv->num_tscs; i++) { 238 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR); 239 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0); 240 if (status) 241 ret = IRQ_WAKE_THREAD; 242 } 243 244 if (ret == IRQ_WAKE_THREAD) 245 rcar_thermal_irq_set(priv, false); 246 247 spin_unlock(&priv->lock); 248 249 return ret; 250 } 251 252 static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data) 253 { 254 struct rcar_gen3_thermal_priv *priv = data; 255 unsigned long flags; 256 int i; 257 258 for (i = 0; i < priv->num_tscs; i++) 259 thermal_zone_device_update(priv->tscs[i]->zone, 260 THERMAL_EVENT_UNSPECIFIED); 261 262 spin_lock_irqsave(&priv->lock, flags); 263 rcar_thermal_irq_set(priv, true); 264 spin_unlock_irqrestore(&priv->lock, flags); 265 266 return IRQ_HANDLED; 267 } 268 269 static const struct soc_device_attribute r8a7795es1[] = { 270 { .soc_id = "r8a7795", .revision = "ES1.*" }, 271 { /* sentinel */ } 272 }; 273 274 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc) 275 { 276 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR); 277 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0); 278 279 usleep_range(1000, 2000); 280 281 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM); 282 283 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); 284 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); 285 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2); 286 287 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 288 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN); 289 290 usleep_range(100, 200); 291 292 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 293 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN | 294 CTSR_VMST | CTSR_THSST); 295 296 usleep_range(1000, 2000); 297 } 298 299 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc) 300 { 301 u32 reg_val; 302 303 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR); 304 reg_val &= ~THCTR_PONM; 305 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val); 306 307 usleep_range(1000, 2000); 308 309 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); 310 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); 311 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2); 312 313 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR); 314 reg_val |= THCTR_THSST; 315 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val); 316 317 usleep_range(1000, 2000); 318 } 319 320 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { 321 { .compatible = "renesas,r8a774a1-thermal", }, 322 { .compatible = "renesas,r8a7795-thermal", }, 323 { .compatible = "renesas,r8a7796-thermal", }, 324 { .compatible = "renesas,r8a77965-thermal", }, 325 { .compatible = "renesas,r8a77980-thermal", }, 326 {}, 327 }; 328 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids); 329 330 static int rcar_gen3_thermal_remove(struct platform_device *pdev) 331 { 332 struct device *dev = &pdev->dev; 333 334 pm_runtime_put(dev); 335 pm_runtime_disable(dev); 336 337 return 0; 338 } 339 340 static int rcar_gen3_thermal_probe(struct platform_device *pdev) 341 { 342 struct rcar_gen3_thermal_priv *priv; 343 struct device *dev = &pdev->dev; 344 struct resource *res; 345 struct thermal_zone_device *zone; 346 int ret, irq, i; 347 char *irqname; 348 349 /* default values if FUSEs are missing */ 350 /* TODO: Read values from hardware on supported platforms */ 351 int ptat[3] = { 2631, 1509, 435 }; 352 int thcode[TSC_MAX_NUM][3] = { 353 { 3397, 2800, 2221 }, 354 { 3393, 2795, 2216 }, 355 { 3389, 2805, 2237 }, 356 }; 357 358 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 359 if (!priv) 360 return -ENOMEM; 361 362 priv->thermal_init = rcar_gen3_thermal_init; 363 if (soc_device_match(r8a7795es1)) 364 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1; 365 366 spin_lock_init(&priv->lock); 367 368 platform_set_drvdata(pdev, priv); 369 370 /* 371 * Request 2 (of the 3 possible) IRQs, the driver only needs to 372 * to trigger on the low and high trip points of the current 373 * temp window at this point. 374 */ 375 for (i = 0; i < 2; i++) { 376 irq = platform_get_irq(pdev, i); 377 if (irq < 0) 378 return irq; 379 380 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d", 381 dev_name(dev), i); 382 if (!irqname) 383 return -ENOMEM; 384 385 ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq, 386 rcar_gen3_thermal_irq_thread, 387 IRQF_SHARED, irqname, priv); 388 if (ret) 389 return ret; 390 } 391 392 pm_runtime_enable(dev); 393 pm_runtime_get_sync(dev); 394 395 for (i = 0; i < TSC_MAX_NUM; i++) { 396 struct rcar_gen3_thermal_tsc *tsc; 397 398 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 399 if (!res) 400 break; 401 402 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL); 403 if (!tsc) { 404 ret = -ENOMEM; 405 goto error_unregister; 406 } 407 408 tsc->base = devm_ioremap_resource(dev, res); 409 if (IS_ERR(tsc->base)) { 410 ret = PTR_ERR(tsc->base); 411 goto error_unregister; 412 } 413 414 priv->tscs[i] = tsc; 415 416 priv->thermal_init(tsc); 417 rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]); 418 419 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc, 420 &rcar_gen3_tz_of_ops); 421 if (IS_ERR(zone)) { 422 dev_err(dev, "Can't register thermal zone\n"); 423 ret = PTR_ERR(zone); 424 goto error_unregister; 425 } 426 tsc->zone = zone; 427 428 ret = of_thermal_get_ntrips(tsc->zone); 429 if (ret < 0) 430 goto error_unregister; 431 432 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret); 433 } 434 435 priv->num_tscs = i; 436 437 if (!priv->num_tscs) { 438 ret = -ENODEV; 439 goto error_unregister; 440 } 441 442 rcar_thermal_irq_set(priv, true); 443 444 return 0; 445 446 error_unregister: 447 rcar_gen3_thermal_remove(pdev); 448 449 return ret; 450 } 451 452 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev) 453 { 454 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev); 455 456 rcar_thermal_irq_set(priv, false); 457 458 return 0; 459 } 460 461 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev) 462 { 463 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev); 464 unsigned int i; 465 466 for (i = 0; i < priv->num_tscs; i++) { 467 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; 468 469 priv->thermal_init(tsc); 470 rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high); 471 } 472 473 rcar_thermal_irq_set(priv, true); 474 475 return 0; 476 } 477 478 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend, 479 rcar_gen3_thermal_resume); 480 481 static struct platform_driver rcar_gen3_thermal_driver = { 482 .driver = { 483 .name = "rcar_gen3_thermal", 484 .pm = &rcar_gen3_thermal_pm_ops, 485 .of_match_table = rcar_gen3_thermal_dt_ids, 486 }, 487 .probe = rcar_gen3_thermal_probe, 488 .remove = rcar_gen3_thermal_remove, 489 }; 490 module_platform_driver(rcar_gen3_thermal_driver); 491 492 MODULE_LICENSE("GPL v2"); 493 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver"); 494 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>"); 495