1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright 2016 Freescale Semiconductor, Inc.
4 
5 #include <linux/clk.h>
6 #include <linux/module.h>
7 #include <linux/platform_device.h>
8 #include <linux/err.h>
9 #include <linux/io.h>
10 #include <linux/of.h>
11 #include <linux/of_address.h>
12 #include <linux/regmap.h>
13 #include <linux/sizes.h>
14 #include <linux/thermal.h>
15 
16 #include "thermal_core.h"
17 #include "thermal_hwmon.h"
18 
19 #define SITES_MAX		16
20 #define TMR_DISABLE		0x0
21 #define TMR_ME			0x80000000
22 #define TMR_ALPF		0x0c000000
23 #define TMR_ALPF_V2		0x03000000
24 #define TMTMIR_DEFAULT	0x0000000f
25 #define TIER_DISABLE	0x0
26 #define TEUMR0_V2		0x51009c00
27 #define TMU_VER1		0x1
28 #define TMU_VER2		0x2
29 
30 #define REGS_TMR	0x000	/* Mode Register */
31 #define TMR_DISABLE	0x0
32 #define TMR_ME		0x80000000
33 #define TMR_ALPF	0x0c000000
34 #define TMR_MSITE_ALL	GENMASK(15, 0)
35 
36 #define REGS_TMTMIR	0x008	/* Temperature measurement interval Register */
37 #define TMTMIR_DEFAULT	0x0000000f
38 
39 #define REGS_V2_TMSR	0x008	/* monitor site register */
40 
41 #define REGS_V2_TMTMIR	0x00c	/* Temperature measurement interval Register */
42 
43 #define REGS_TIER	0x020	/* Interrupt Enable Register */
44 #define TIER_DISABLE	0x0
45 
46 
47 #define REGS_TTCFGR	0x080	/* Temperature Configuration Register */
48 #define REGS_TSCFGR	0x084	/* Sensor Configuration Register */
49 
50 #define REGS_TRITSR(n)	(0x100 + 16 * (n)) /* Immediate Temperature
51 					    * Site Register
52 					    */
53 #define TRITSR_V	BIT(31)
54 #define REGS_TTRnCR(n)	(0xf10 + 4 * (n)) /* Temperature Range n
55 					   * Control Register
56 					   */
57 #define REGS_IPBRR(n)		(0xbf8 + 4 * (n)) /* IP Block Revision
58 						   * Register n
59 						   */
60 #define REGS_V2_TEUMR(n)	(0xf00 + 4 * (n))
61 
62 /*
63  * Thermal zone data
64  */
65 struct qoriq_sensor {
66 	int				id;
67 };
68 
69 struct qoriq_tmu_data {
70 	int ver;
71 	struct regmap *regmap;
72 	struct clk *clk;
73 	struct qoriq_sensor	sensor[SITES_MAX];
74 };
75 
76 static struct qoriq_tmu_data *qoriq_sensor_to_data(struct qoriq_sensor *s)
77 {
78 	return container_of(s, struct qoriq_tmu_data, sensor[s->id]);
79 }
80 
81 static int tmu_get_temp(void *p, int *temp)
82 {
83 	struct qoriq_sensor *qsensor = p;
84 	struct qoriq_tmu_data *qdata = qoriq_sensor_to_data(qsensor);
85 	u32 val;
86 	/*
87 	 * REGS_TRITSR(id) has the following layout:
88 	 *
89 	 * 31  ... 7 6 5 4 3 2 1 0
90 	 *  V          TEMP
91 	 *
92 	 * Where V bit signifies if the measurement is ready and is
93 	 * within sensor range. TEMP is an 8 bit value representing
94 	 * temperature in C.
95 	 */
96 	if (regmap_read_poll_timeout(qdata->regmap,
97 				     REGS_TRITSR(qsensor->id),
98 				     val,
99 				     val & TRITSR_V,
100 				     USEC_PER_MSEC,
101 				     10 * USEC_PER_MSEC))
102 		return -ENODATA;
103 
104 	*temp = (val & 0xff) * 1000;
105 
106 	return 0;
107 }
108 
109 static const struct thermal_zone_of_device_ops tmu_tz_ops = {
110 	.get_temp = tmu_get_temp,
111 };
112 
113 static int qoriq_tmu_register_tmu_zone(struct device *dev,
114 				       struct qoriq_tmu_data *qdata)
115 {
116 	int id;
117 
118 	if (qdata->ver == TMU_VER1) {
119 		regmap_write(qdata->regmap, REGS_TMR,
120 			     TMR_MSITE_ALL | TMR_ME | TMR_ALPF);
121 	} else {
122 		regmap_write(qdata->regmap, REGS_V2_TMSR, TMR_MSITE_ALL);
123 		regmap_write(qdata->regmap, REGS_TMR, TMR_ME | TMR_ALPF_V2);
124 	}
125 
126 	for (id = 0; id < SITES_MAX; id++) {
127 		struct thermal_zone_device *tzd;
128 		struct qoriq_sensor *sensor = &qdata->sensor[id];
129 		int ret;
130 
131 		sensor->id = id;
132 
133 		tzd = devm_thermal_zone_of_sensor_register(dev, id,
134 							   sensor,
135 							   &tmu_tz_ops);
136 		ret = PTR_ERR_OR_ZERO(tzd);
137 		if (ret) {
138 			if (ret == -ENODEV)
139 				continue;
140 
141 			regmap_write(qdata->regmap, REGS_TMR, TMR_DISABLE);
142 			return ret;
143 		}
144 
145 		if (devm_thermal_add_hwmon_sysfs(tzd))
146 			dev_warn(dev,
147 				 "Failed to add hwmon sysfs attributes\n");
148 
149 	}
150 
151 	return 0;
152 }
153 
154 static int qoriq_tmu_calibration(struct device *dev,
155 				 struct qoriq_tmu_data *data)
156 {
157 	int i, val, len;
158 	u32 range[4];
159 	const u32 *calibration;
160 	struct device_node *np = dev->of_node;
161 
162 	len = of_property_count_u32_elems(np, "fsl,tmu-range");
163 	if (len < 0 || len > 4) {
164 		dev_err(dev, "invalid range data.\n");
165 		return len;
166 	}
167 
168 	val = of_property_read_u32_array(np, "fsl,tmu-range", range, len);
169 	if (val != 0) {
170 		dev_err(dev, "failed to read range data.\n");
171 		return val;
172 	}
173 
174 	/* Init temperature range registers */
175 	for (i = 0; i < len; i++)
176 		regmap_write(data->regmap, REGS_TTRnCR(i), range[i]);
177 
178 	calibration = of_get_property(np, "fsl,tmu-calibration", &len);
179 	if (calibration == NULL || len % 8) {
180 		dev_err(dev, "invalid calibration data.\n");
181 		return -ENODEV;
182 	}
183 
184 	for (i = 0; i < len; i += 8, calibration += 2) {
185 		val = of_read_number(calibration, 1);
186 		regmap_write(data->regmap, REGS_TTCFGR, val);
187 		val = of_read_number(calibration + 1, 1);
188 		regmap_write(data->regmap, REGS_TSCFGR, val);
189 	}
190 
191 	return 0;
192 }
193 
194 static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
195 {
196 	/* Disable interrupt, using polling instead */
197 	regmap_write(data->regmap, REGS_TIER, TIER_DISABLE);
198 
199 	/* Set update_interval */
200 
201 	if (data->ver == TMU_VER1) {
202 		regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
203 	} else {
204 		regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
205 		regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
206 	}
207 
208 	/* Disable monitoring */
209 	regmap_write(data->regmap, REGS_TMR, TMR_DISABLE);
210 }
211 
212 static const struct regmap_range qoriq_yes_ranges[] = {
213 	regmap_reg_range(REGS_TMR, REGS_TSCFGR),
214 	regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
215 	regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
216 	regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
217 	/* Read only registers below */
218 	regmap_reg_range(REGS_TRITSR(0), REGS_TRITSR(15)),
219 };
220 
221 static const struct regmap_access_table qoriq_wr_table = {
222 	.yes_ranges	= qoriq_yes_ranges,
223 	.n_yes_ranges	= ARRAY_SIZE(qoriq_yes_ranges) - 1,
224 };
225 
226 static const struct regmap_access_table qoriq_rd_table = {
227 	.yes_ranges	= qoriq_yes_ranges,
228 	.n_yes_ranges	= ARRAY_SIZE(qoriq_yes_ranges),
229 };
230 
231 static int qoriq_tmu_probe(struct platform_device *pdev)
232 {
233 	int ret;
234 	u32 ver;
235 	struct qoriq_tmu_data *data;
236 	struct device_node *np = pdev->dev.of_node;
237 	struct device *dev = &pdev->dev;
238 	const bool little_endian = of_property_read_bool(np, "little-endian");
239 	const enum regmap_endian format_endian =
240 		little_endian ? REGMAP_ENDIAN_LITTLE : REGMAP_ENDIAN_BIG;
241 	const struct regmap_config regmap_config = {
242 		.reg_bits		= 32,
243 		.val_bits		= 32,
244 		.reg_stride		= 4,
245 		.rd_table		= &qoriq_rd_table,
246 		.wr_table		= &qoriq_wr_table,
247 		.val_format_endian	= format_endian,
248 		.max_register		= SZ_4K,
249 	};
250 	void __iomem *base;
251 
252 	data = devm_kzalloc(dev, sizeof(struct qoriq_tmu_data),
253 			    GFP_KERNEL);
254 	if (!data)
255 		return -ENOMEM;
256 
257 	base = devm_platform_ioremap_resource(pdev, 0);
258 	ret = PTR_ERR_OR_ZERO(base);
259 	if (ret) {
260 		dev_err(dev, "Failed to get memory region\n");
261 		return ret;
262 	}
263 
264 	data->regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
265 	ret = PTR_ERR_OR_ZERO(data->regmap);
266 	if (ret) {
267 		dev_err(dev, "Failed to init regmap (%d)\n", ret);
268 		return ret;
269 	}
270 
271 	data->clk = devm_clk_get_optional(dev, NULL);
272 	if (IS_ERR(data->clk))
273 		return PTR_ERR(data->clk);
274 
275 	ret = clk_prepare_enable(data->clk);
276 	if (ret) {
277 		dev_err(dev, "Failed to enable clock\n");
278 		return ret;
279 	}
280 
281 	/* version register offset at: 0xbf8 on both v1 and v2 */
282 	ret = regmap_read(data->regmap, REGS_IPBRR(0), &ver);
283 	if (ret) {
284 		dev_err(&pdev->dev, "Failed to read IP block version\n");
285 		return ret;
286 	}
287 	data->ver = (ver >> 8) & 0xff;
288 
289 	qoriq_tmu_init_device(data);	/* TMU initialization */
290 
291 	ret = qoriq_tmu_calibration(dev, data);	/* TMU calibration */
292 	if (ret < 0)
293 		goto err;
294 
295 	ret = qoriq_tmu_register_tmu_zone(dev, data);
296 	if (ret < 0) {
297 		dev_err(dev, "Failed to register sensors\n");
298 		ret = -ENODEV;
299 		goto err;
300 	}
301 
302 	platform_set_drvdata(pdev, data);
303 
304 	return 0;
305 
306 err:
307 	clk_disable_unprepare(data->clk);
308 
309 	return ret;
310 }
311 
312 static int qoriq_tmu_remove(struct platform_device *pdev)
313 {
314 	struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
315 
316 	/* Disable monitoring */
317 	regmap_write(data->regmap, REGS_TMR, TMR_DISABLE);
318 
319 	clk_disable_unprepare(data->clk);
320 
321 	return 0;
322 }
323 
324 static int __maybe_unused qoriq_tmu_suspend(struct device *dev)
325 {
326 	struct qoriq_tmu_data *data = dev_get_drvdata(dev);
327 	int ret;
328 
329 	ret = regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, 0);
330 	if (ret)
331 		return ret;
332 
333 	clk_disable_unprepare(data->clk);
334 
335 	return 0;
336 }
337 
338 static int __maybe_unused qoriq_tmu_resume(struct device *dev)
339 {
340 	int ret;
341 	struct qoriq_tmu_data *data = dev_get_drvdata(dev);
342 
343 	ret = clk_prepare_enable(data->clk);
344 	if (ret)
345 		return ret;
346 
347 	/* Enable monitoring */
348 	return regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, TMR_ME);
349 }
350 
351 static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
352 			 qoriq_tmu_suspend, qoriq_tmu_resume);
353 
354 static const struct of_device_id qoriq_tmu_match[] = {
355 	{ .compatible = "fsl,qoriq-tmu", },
356 	{ .compatible = "fsl,imx8mq-tmu", },
357 	{},
358 };
359 MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
360 
361 static struct platform_driver qoriq_tmu = {
362 	.driver	= {
363 		.name		= "qoriq_thermal",
364 		.pm		= &qoriq_tmu_pm_ops,
365 		.of_match_table	= qoriq_tmu_match,
366 	},
367 	.probe	= qoriq_tmu_probe,
368 	.remove	= qoriq_tmu_remove,
369 };
370 module_platform_driver(qoriq_tmu);
371 
372 MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
373 MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
374 MODULE_LICENSE("GPL v2");
375