12dfef650SFabio Estevam // SPDX-License-Identifier: GPL-2.0
22dfef650SFabio Estevam //
32dfef650SFabio Estevam // Copyright 2016 Freescale Semiconductor, Inc.
443528445SJia Hongtao 
551904045SAnson Huang #include <linux/clk.h>
643528445SJia Hongtao #include <linux/module.h>
743528445SJia Hongtao #include <linux/platform_device.h>
843528445SJia Hongtao #include <linux/err.h>
943528445SJia Hongtao #include <linux/io.h>
1043528445SJia Hongtao #include <linux/of.h>
1143528445SJia Hongtao #include <linux/of_address.h>
124316237bSAndrey Smirnov #include <linux/regmap.h>
134316237bSAndrey Smirnov #include <linux/sizes.h>
1443528445SJia Hongtao #include <linux/thermal.h>
1543528445SJia Hongtao 
1643528445SJia Hongtao #include "thermal_core.h"
1743528445SJia Hongtao 
1843528445SJia Hongtao #define SITES_MAX		16
199809797bSYuantian Tang #define TMR_DISABLE		0x0
209809797bSYuantian Tang #define TMR_ME			0x80000000
219809797bSYuantian Tang #define TMR_ALPF		0x0c000000
229809797bSYuantian Tang #define TMR_ALPF_V2		0x03000000
239809797bSYuantian Tang #define TMTMIR_DEFAULT	0x0000000f
249809797bSYuantian Tang #define TIER_DISABLE	0x0
259809797bSYuantian Tang #define TEUMR0_V2		0x51009c00
269809797bSYuantian Tang #define TMU_VER1		0x1
279809797bSYuantian Tang #define TMU_VER2		0x2
2843528445SJia Hongtao 
294316237bSAndrey Smirnov #define REGS_TMR	0x000	/* Mode Register */
304316237bSAndrey Smirnov #define TMR_DISABLE	0x0
314316237bSAndrey Smirnov #define TMR_ME		0x80000000
324316237bSAndrey Smirnov #define TMR_ALPF	0x0c000000
334316237bSAndrey Smirnov 
344316237bSAndrey Smirnov #define REGS_TMTMIR	0x008	/* Temperature measurement interval Register */
354316237bSAndrey Smirnov #define TMTMIR_DEFAULT	0x0000000f
364316237bSAndrey Smirnov 
374316237bSAndrey Smirnov #define REGS_V2_TMSR	0x008	/* monitor site register */
384316237bSAndrey Smirnov 
394316237bSAndrey Smirnov #define REGS_V2_TMTMIR	0x00c	/* Temperature measurement interval Register */
404316237bSAndrey Smirnov 
414316237bSAndrey Smirnov #define REGS_TIER	0x020	/* Interrupt Enable Register */
424316237bSAndrey Smirnov #define TIER_DISABLE	0x0
434316237bSAndrey Smirnov 
444316237bSAndrey Smirnov 
454316237bSAndrey Smirnov #define REGS_TTCFGR	0x080	/* Temperature Configuration Register */
464316237bSAndrey Smirnov #define REGS_TSCFGR	0x084	/* Sensor Configuration Register */
474316237bSAndrey Smirnov 
484316237bSAndrey Smirnov #define REGS_TRITSR(n)	(0x100 + 16 * (n)) /* Immediate Temperature
494316237bSAndrey Smirnov 					    * Site Register
5043528445SJia Hongtao 					    */
514316237bSAndrey Smirnov #define REGS_TTRnCR(n)	(0xf10 + 4 * (n)) /* Temperature Range n
524316237bSAndrey Smirnov 					   * Control Register
534316237bSAndrey Smirnov 					   */
544316237bSAndrey Smirnov #define REGS_IPBRR(n)		(0xbf8 + 4 * (n)) /* IP Block Revision
554316237bSAndrey Smirnov 						   * Register n
564316237bSAndrey Smirnov 						   */
574316237bSAndrey Smirnov #define REGS_V2_TEUMR(n)	(0xf00 + 4 * (n))
5843528445SJia Hongtao 
5943528445SJia Hongtao /*
6043528445SJia Hongtao  * Thermal zone data
6143528445SJia Hongtao  */
627797ff42SYuantian Tang struct qoriq_sensor {
637797ff42SYuantian Tang 	int				id;
647797ff42SYuantian Tang };
657797ff42SYuantian Tang 
6643528445SJia Hongtao struct qoriq_tmu_data {
679809797bSYuantian Tang 	int ver;
684316237bSAndrey Smirnov 	struct regmap *regmap;
6951904045SAnson Huang 	struct clk *clk;
70b319da1bSAndrey Smirnov 	struct qoriq_sensor	sensor[SITES_MAX];
7143528445SJia Hongtao };
7243528445SJia Hongtao 
73b319da1bSAndrey Smirnov static struct qoriq_tmu_data *qoriq_sensor_to_data(struct qoriq_sensor *s)
74b319da1bSAndrey Smirnov {
75b319da1bSAndrey Smirnov 	return container_of(s, struct qoriq_tmu_data, sensor[s->id]);
76b319da1bSAndrey Smirnov }
77b319da1bSAndrey Smirnov 
7843528445SJia Hongtao static int tmu_get_temp(void *p, int *temp)
7943528445SJia Hongtao {
807797ff42SYuantian Tang 	struct qoriq_sensor *qsensor = p;
81b319da1bSAndrey Smirnov 	struct qoriq_tmu_data *qdata = qoriq_sensor_to_data(qsensor);
8243528445SJia Hongtao 	u32 val;
8343528445SJia Hongtao 
844316237bSAndrey Smirnov 	regmap_read(qdata->regmap, REGS_TRITSR(qsensor->id), &val);
8543528445SJia Hongtao 	*temp = (val & 0xff) * 1000;
8643528445SJia Hongtao 
8743528445SJia Hongtao 	return 0;
8843528445SJia Hongtao }
8943528445SJia Hongtao 
907797ff42SYuantian Tang static const struct thermal_zone_of_device_ops tmu_tz_ops = {
917797ff42SYuantian Tang 	.get_temp = tmu_get_temp,
927797ff42SYuantian Tang };
937797ff42SYuantian Tang 
9403036625SAndrey Smirnov static int qoriq_tmu_register_tmu_zone(struct device *dev,
9503036625SAndrey Smirnov 				       struct qoriq_tmu_data *qdata)
9643528445SJia Hongtao {
977797ff42SYuantian Tang 	int id, sites = 0;
9843528445SJia Hongtao 
997797ff42SYuantian Tang 	for (id = 0; id < SITES_MAX; id++) {
10011ef00f7SAndrey Smirnov 		struct thermal_zone_device *tzd;
101b319da1bSAndrey Smirnov 		struct qoriq_sensor *sensor = &qdata->sensor[id];
10211ef00f7SAndrey Smirnov 		int ret;
10311ef00f7SAndrey Smirnov 
104d6fb0564SAndrey Smirnov 		sensor->id = id;
10511ef00f7SAndrey Smirnov 
10603036625SAndrey Smirnov 		tzd = devm_thermal_zone_of_sensor_register(dev, id,
107d6fb0564SAndrey Smirnov 							   sensor,
10811ef00f7SAndrey Smirnov 							   &tmu_tz_ops);
10911ef00f7SAndrey Smirnov 		ret = PTR_ERR_OR_ZERO(tzd);
11011ef00f7SAndrey Smirnov 		if (ret) {
11111ef00f7SAndrey Smirnov 			if (ret == -ENODEV)
1127797ff42SYuantian Tang 				continue;
1137797ff42SYuantian Tang 			else
11411ef00f7SAndrey Smirnov 				return ret;
11543528445SJia Hongtao 		}
11643528445SJia Hongtao 
1179809797bSYuantian Tang 		if (qdata->ver == TMU_VER1)
1187797ff42SYuantian Tang 			sites |= 0x1 << (15 - id);
1199809797bSYuantian Tang 		else
1209809797bSYuantian Tang 			sites |= 0x1 << id;
12143528445SJia Hongtao 	}
12243528445SJia Hongtao 
1237797ff42SYuantian Tang 	/* Enable monitoring */
1249809797bSYuantian Tang 	if (sites != 0) {
1259809797bSYuantian Tang 		if (qdata->ver == TMU_VER1) {
1264316237bSAndrey Smirnov 			regmap_write(qdata->regmap, REGS_TMR,
1274316237bSAndrey Smirnov 				     sites | TMR_ME | TMR_ALPF);
1289809797bSYuantian Tang 		} else {
1294316237bSAndrey Smirnov 			regmap_write(qdata->regmap, REGS_V2_TMSR, sites);
1304316237bSAndrey Smirnov 			regmap_write(qdata->regmap, REGS_TMR,
1314316237bSAndrey Smirnov 				     TMR_ME | TMR_ALPF_V2);
1329809797bSYuantian Tang 		}
1339809797bSYuantian Tang 	}
13443528445SJia Hongtao 
1357797ff42SYuantian Tang 	return 0;
13643528445SJia Hongtao }
13743528445SJia Hongtao 
1388e1cda35SAndrey Smirnov static int qoriq_tmu_calibration(struct device *dev,
1398e1cda35SAndrey Smirnov 				 struct qoriq_tmu_data *data)
14043528445SJia Hongtao {
14143528445SJia Hongtao 	int i, val, len;
14243528445SJia Hongtao 	u32 range[4];
14343528445SJia Hongtao 	const u32 *calibration;
1448e1cda35SAndrey Smirnov 	struct device_node *np = dev->of_node;
14543528445SJia Hongtao 
1469809797bSYuantian Tang 	len = of_property_count_u32_elems(np, "fsl,tmu-range");
1479809797bSYuantian Tang 	if (len < 0 || len > 4) {
1488e1cda35SAndrey Smirnov 		dev_err(dev, "invalid range data.\n");
1499809797bSYuantian Tang 		return len;
1509809797bSYuantian Tang 	}
1519809797bSYuantian Tang 
1529809797bSYuantian Tang 	val = of_property_read_u32_array(np, "fsl,tmu-range", range, len);
1539809797bSYuantian Tang 	if (val != 0) {
1548e1cda35SAndrey Smirnov 		dev_err(dev, "failed to read range data.\n");
1559809797bSYuantian Tang 		return val;
15643528445SJia Hongtao 	}
15743528445SJia Hongtao 
15843528445SJia Hongtao 	/* Init temperature range registers */
1599809797bSYuantian Tang 	for (i = 0; i < len; i++)
1604316237bSAndrey Smirnov 		regmap_write(data->regmap, REGS_TTRnCR(i), range[i]);
16143528445SJia Hongtao 
16243528445SJia Hongtao 	calibration = of_get_property(np, "fsl,tmu-calibration", &len);
16343528445SJia Hongtao 	if (calibration == NULL || len % 8) {
1648e1cda35SAndrey Smirnov 		dev_err(dev, "invalid calibration data.\n");
16543528445SJia Hongtao 		return -ENODEV;
16643528445SJia Hongtao 	}
16743528445SJia Hongtao 
16843528445SJia Hongtao 	for (i = 0; i < len; i += 8, calibration += 2) {
16943528445SJia Hongtao 		val = of_read_number(calibration, 1);
1704316237bSAndrey Smirnov 		regmap_write(data->regmap, REGS_TTCFGR, val);
17143528445SJia Hongtao 		val = of_read_number(calibration + 1, 1);
1724316237bSAndrey Smirnov 		regmap_write(data->regmap, REGS_TSCFGR, val);
17343528445SJia Hongtao 	}
17443528445SJia Hongtao 
17543528445SJia Hongtao 	return 0;
17643528445SJia Hongtao }
17743528445SJia Hongtao 
17843528445SJia Hongtao static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
17943528445SJia Hongtao {
18043528445SJia Hongtao 	/* Disable interrupt, using polling instead */
1814316237bSAndrey Smirnov 	regmap_write(data->regmap, REGS_TIER, TIER_DISABLE);
18243528445SJia Hongtao 
18343528445SJia Hongtao 	/* Set update_interval */
1844316237bSAndrey Smirnov 
1859809797bSYuantian Tang 	if (data->ver == TMU_VER1) {
1864316237bSAndrey Smirnov 		regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
1879809797bSYuantian Tang 	} else {
1884316237bSAndrey Smirnov 		regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
1894316237bSAndrey Smirnov 		regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
1909809797bSYuantian Tang 	}
19143528445SJia Hongtao 
19243528445SJia Hongtao 	/* Disable monitoring */
1934316237bSAndrey Smirnov 	regmap_write(data->regmap, REGS_TMR, TMR_DISABLE);
19443528445SJia Hongtao }
19543528445SJia Hongtao 
1964316237bSAndrey Smirnov static const struct regmap_range qoriq_yes_ranges[] = {
1974316237bSAndrey Smirnov 	regmap_reg_range(REGS_TMR, REGS_TSCFGR),
1984316237bSAndrey Smirnov 	regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
1994316237bSAndrey Smirnov 	regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
2004316237bSAndrey Smirnov 	regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
2014316237bSAndrey Smirnov 	/* Read only registers below */
2024316237bSAndrey Smirnov 	regmap_reg_range(REGS_TRITSR(0), REGS_TRITSR(15)),
2034316237bSAndrey Smirnov };
2044316237bSAndrey Smirnov 
2054316237bSAndrey Smirnov static const struct regmap_access_table qoriq_wr_table = {
2064316237bSAndrey Smirnov 	.yes_ranges	= qoriq_yes_ranges,
2074316237bSAndrey Smirnov 	.n_yes_ranges	= ARRAY_SIZE(qoriq_yes_ranges) - 1,
2084316237bSAndrey Smirnov };
2094316237bSAndrey Smirnov 
2104316237bSAndrey Smirnov static const struct regmap_access_table qoriq_rd_table = {
2114316237bSAndrey Smirnov 	.yes_ranges	= qoriq_yes_ranges,
2124316237bSAndrey Smirnov 	.n_yes_ranges	= ARRAY_SIZE(qoriq_yes_ranges),
2134316237bSAndrey Smirnov };
2144316237bSAndrey Smirnov 
21543528445SJia Hongtao static int qoriq_tmu_probe(struct platform_device *pdev)
21643528445SJia Hongtao {
21743528445SJia Hongtao 	int ret;
2189809797bSYuantian Tang 	u32 ver;
21943528445SJia Hongtao 	struct qoriq_tmu_data *data;
22043528445SJia Hongtao 	struct device_node *np = pdev->dev.of_node;
221e167dc43SAndrey Smirnov 	struct device *dev = &pdev->dev;
2224316237bSAndrey Smirnov 	const bool little_endian = of_property_read_bool(np, "little-endian");
2234316237bSAndrey Smirnov 	const enum regmap_endian format_endian =
2244316237bSAndrey Smirnov 		little_endian ? REGMAP_ENDIAN_LITTLE : REGMAP_ENDIAN_BIG;
2254316237bSAndrey Smirnov 	const struct regmap_config regmap_config = {
2264316237bSAndrey Smirnov 		.reg_bits		= 32,
2274316237bSAndrey Smirnov 		.val_bits		= 32,
2284316237bSAndrey Smirnov 		.reg_stride		= 4,
2294316237bSAndrey Smirnov 		.rd_table		= &qoriq_rd_table,
2304316237bSAndrey Smirnov 		.wr_table		= &qoriq_wr_table,
2314316237bSAndrey Smirnov 		.val_format_endian	= format_endian,
2324316237bSAndrey Smirnov 		.max_register		= SZ_4K,
2334316237bSAndrey Smirnov 	};
2344316237bSAndrey Smirnov 	void __iomem *base;
23543528445SJia Hongtao 
236e167dc43SAndrey Smirnov 	data = devm_kzalloc(dev, sizeof(struct qoriq_tmu_data),
23743528445SJia Hongtao 			    GFP_KERNEL);
23843528445SJia Hongtao 	if (!data)
23943528445SJia Hongtao 		return -ENOMEM;
24043528445SJia Hongtao 
2414316237bSAndrey Smirnov 	base = devm_platform_ioremap_resource(pdev, 0);
2424316237bSAndrey Smirnov 	ret = PTR_ERR_OR_ZERO(base);
2434316237bSAndrey Smirnov 	if (ret) {
244e167dc43SAndrey Smirnov 		dev_err(dev, "Failed to get memory region\n");
2454316237bSAndrey Smirnov 		return ret;
2464316237bSAndrey Smirnov 	}
2474316237bSAndrey Smirnov 
2484316237bSAndrey Smirnov 	data->regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
2494316237bSAndrey Smirnov 	ret = PTR_ERR_OR_ZERO(data->regmap);
2504316237bSAndrey Smirnov 	if (ret) {
2514316237bSAndrey Smirnov 		dev_err(dev, "Failed to init regmap (%d)\n", ret);
2524316237bSAndrey Smirnov 		return ret;
25343528445SJia Hongtao 	}
25443528445SJia Hongtao 
255e167dc43SAndrey Smirnov 	data->clk = devm_clk_get_optional(dev, NULL);
25651904045SAnson Huang 	if (IS_ERR(data->clk))
25751904045SAnson Huang 		return PTR_ERR(data->clk);
25851904045SAnson Huang 
25951904045SAnson Huang 	ret = clk_prepare_enable(data->clk);
26051904045SAnson Huang 	if (ret) {
261e167dc43SAndrey Smirnov 		dev_err(dev, "Failed to enable clock\n");
26251904045SAnson Huang 		return ret;
26351904045SAnson Huang 	}
26451904045SAnson Huang 
2659809797bSYuantian Tang 	/* version register offset at: 0xbf8 on both v1 and v2 */
2664316237bSAndrey Smirnov 	ret = regmap_read(data->regmap, REGS_IPBRR(0), &ver);
2674316237bSAndrey Smirnov 	if (ret) {
2684316237bSAndrey Smirnov 		dev_err(&pdev->dev, "Failed to read IP block version\n");
2694316237bSAndrey Smirnov 		return ret;
2704316237bSAndrey Smirnov 	}
2719809797bSYuantian Tang 	data->ver = (ver >> 8) & 0xff;
2729809797bSYuantian Tang 
27343528445SJia Hongtao 	qoriq_tmu_init_device(data);	/* TMU initialization */
27443528445SJia Hongtao 
2758e1cda35SAndrey Smirnov 	ret = qoriq_tmu_calibration(dev, data);	/* TMU calibration */
27643528445SJia Hongtao 	if (ret < 0)
2774d82000aSAnson Huang 		goto err;
27843528445SJia Hongtao 
27903036625SAndrey Smirnov 	ret = qoriq_tmu_register_tmu_zone(dev, data);
2807797ff42SYuantian Tang 	if (ret < 0) {
281e167dc43SAndrey Smirnov 		dev_err(dev, "Failed to register sensors\n");
2827797ff42SYuantian Tang 		ret = -ENODEV;
2834d82000aSAnson Huang 		goto err;
28443528445SJia Hongtao 	}
28543528445SJia Hongtao 
2868e1cda35SAndrey Smirnov 	platform_set_drvdata(pdev, data);
2878e1cda35SAndrey Smirnov 
28843528445SJia Hongtao 	return 0;
28943528445SJia Hongtao 
2904d82000aSAnson Huang err:
29151904045SAnson Huang 	clk_disable_unprepare(data->clk);
29243528445SJia Hongtao 
29343528445SJia Hongtao 	return ret;
29443528445SJia Hongtao }
29543528445SJia Hongtao 
29643528445SJia Hongtao static int qoriq_tmu_remove(struct platform_device *pdev)
29743528445SJia Hongtao {
29843528445SJia Hongtao 	struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
29943528445SJia Hongtao 
30043528445SJia Hongtao 	/* Disable monitoring */
3014316237bSAndrey Smirnov 	regmap_write(data->regmap, REGS_TMR, TMR_DISABLE);
30243528445SJia Hongtao 
30351904045SAnson Huang 	clk_disable_unprepare(data->clk);
30451904045SAnson Huang 
30543528445SJia Hongtao 	return 0;
30643528445SJia Hongtao }
30743528445SJia Hongtao 
308aea59197SAnson Huang static int __maybe_unused qoriq_tmu_suspend(struct device *dev)
30943528445SJia Hongtao {
31043528445SJia Hongtao 	struct qoriq_tmu_data *data = dev_get_drvdata(dev);
3114316237bSAndrey Smirnov 	int ret;
31243528445SJia Hongtao 
3134316237bSAndrey Smirnov 	ret = regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, 0);
3144316237bSAndrey Smirnov 	if (ret)
3154316237bSAndrey Smirnov 		return ret;
31643528445SJia Hongtao 
31751904045SAnson Huang 	clk_disable_unprepare(data->clk);
31851904045SAnson Huang 
31943528445SJia Hongtao 	return 0;
32043528445SJia Hongtao }
32143528445SJia Hongtao 
322aea59197SAnson Huang static int __maybe_unused qoriq_tmu_resume(struct device *dev)
32343528445SJia Hongtao {
32451904045SAnson Huang 	int ret;
32543528445SJia Hongtao 	struct qoriq_tmu_data *data = dev_get_drvdata(dev);
32643528445SJia Hongtao 
32751904045SAnson Huang 	ret = clk_prepare_enable(data->clk);
32851904045SAnson Huang 	if (ret)
32951904045SAnson Huang 		return ret;
33051904045SAnson Huang 
33143528445SJia Hongtao 	/* Enable monitoring */
3324316237bSAndrey Smirnov 	return regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, TMR_ME);
33343528445SJia Hongtao }
33443528445SJia Hongtao 
33543528445SJia Hongtao static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
33643528445SJia Hongtao 			 qoriq_tmu_suspend, qoriq_tmu_resume);
33743528445SJia Hongtao 
33843528445SJia Hongtao static const struct of_device_id qoriq_tmu_match[] = {
33943528445SJia Hongtao 	{ .compatible = "fsl,qoriq-tmu", },
3406017e2a9SAnson Huang 	{ .compatible = "fsl,imx8mq-tmu", },
34143528445SJia Hongtao 	{},
34243528445SJia Hongtao };
34343528445SJia Hongtao MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
34443528445SJia Hongtao 
34543528445SJia Hongtao static struct platform_driver qoriq_tmu = {
34643528445SJia Hongtao 	.driver	= {
34743528445SJia Hongtao 		.name		= "qoriq_thermal",
34843528445SJia Hongtao 		.pm		= &qoriq_tmu_pm_ops,
34943528445SJia Hongtao 		.of_match_table	= qoriq_tmu_match,
35043528445SJia Hongtao 	},
35143528445SJia Hongtao 	.probe	= qoriq_tmu_probe,
35243528445SJia Hongtao 	.remove	= qoriq_tmu_remove,
35343528445SJia Hongtao };
35443528445SJia Hongtao module_platform_driver(qoriq_tmu);
35543528445SJia Hongtao 
35643528445SJia Hongtao MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
35743528445SJia Hongtao MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
35843528445SJia Hongtao MODULE_LICENSE("GPL v2");
359