xref: /openbmc/linux/drivers/thermal/qcom/tsens-v2.c (revision 7ec6b431)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4  * Copyright (c) 2018, Linaro Limited
5  */
6 
7 #include <linux/bitops.h>
8 #include <linux/regmap.h>
9 #include "tsens.h"
10 
11 /* ----- SROT ------ */
12 #define SROT_HW_VER_OFF	0x0000
13 #define SROT_CTRL_OFF		0x0004
14 
15 /* ----- TM ------ */
16 #define TM_INT_EN_OFF			0x0004
17 #define TM_UPPER_LOWER_INT_STATUS_OFF	0x0008
18 #define TM_UPPER_LOWER_INT_CLEAR_OFF	0x000c
19 #define TM_UPPER_LOWER_INT_MASK_OFF	0x0010
20 #define TM_CRITICAL_INT_STATUS_OFF	0x0014
21 #define TM_CRITICAL_INT_CLEAR_OFF	0x0018
22 #define TM_CRITICAL_INT_MASK_OFF	0x001c
23 #define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020
24 #define TM_Sn_CRITICAL_THRESHOLD_OFF	0x0060
25 #define TM_Sn_STATUS_OFF		0x00a0
26 #define TM_TRDY_OFF			0x00e4
27 
28 /* v2.x: 8996, 8998, sdm845 */
29 
30 static const struct tsens_features tsens_v2_feat = {
31 	.ver_major	= VER_2_X,
32 	.crit_int	= 1,
33 	.adc		= 0,
34 	.srot_split	= 1,
35 	.max_sensors	= 16,
36 };
37 
38 static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
39 	/* ----- SROT ------ */
40 	/* VERSION */
41 	[VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
42 	[VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
43 	[VER_STEP]  = REG_FIELD(SROT_HW_VER_OFF,  0, 15),
44 	/* CTRL_OFF */
45 	[TSENS_EN]     = REG_FIELD(SROT_CTRL_OFF,    0,  0),
46 	[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF,    1,  1),
47 
48 	/* ----- TM ------ */
49 	/* INTERRUPT ENABLE */
50 	/* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */
51 	[INT_EN]  = REG_FIELD(TM_INT_EN_OFF, 0, 2),
52 
53 	/* TEMPERATURE THRESHOLDS */
54 	REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF,  0,  11),
55 	REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH,  TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12,  23),
56 
57 	/* INTERRUPTS [CLEAR/STATUS/MASK] */
58 	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
59 	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
60 	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
61 	REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
62 	REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
63 	REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
64 
65 	/* Sn_STATUS */
66 	REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF,  0,  11),
67 	REG_FIELD_FOR_EACH_SENSOR16(VALID,           TM_Sn_STATUS_OFF, 21,  21),
68 	/* xxx_STATUS bits: 1 == threshold violated */
69 	REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS,      TM_Sn_STATUS_OFF, 16,  16),
70 	REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS,    TM_Sn_STATUS_OFF, 17,  17),
71 	REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS,    TM_Sn_STATUS_OFF, 18,  18),
72 	REG_FIELD_FOR_EACH_SENSOR16(CRITICAL_STATUS, TM_Sn_STATUS_OFF, 19,  19),
73 	REG_FIELD_FOR_EACH_SENSOR16(MAX_STATUS,      TM_Sn_STATUS_OFF, 20,  20),
74 
75 	/* TRDY: 1=ready, 0=in progress */
76 	[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
77 };
78 
79 static const struct tsens_ops ops_generic_v2 = {
80 	.init		= init_common,
81 	.get_temp	= get_temp_tsens_valid,
82 };
83 
84 const struct tsens_plat_data data_tsens_v2 = {
85 	.ops		= &ops_generic_v2,
86 	.feat		= &tsens_v2_feat,
87 	.fields	= tsens_v2_regfields,
88 };
89 
90 /* Kept around for backward compatibility with old msm8996.dtsi */
91 const struct tsens_plat_data data_8996 = {
92 	.num_sensors	= 13,
93 	.ops		= &ops_generic_v2,
94 	.feat		= &tsens_v2_feat,
95 	.fields	= tsens_v2_regfields,
96 };
97