1 // SPDX-License-Identifier: GPL-2.0-only 2 /* intel_pch_thermal.c - Intel PCH Thermal driver 3 * 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * Authors: 7 * Tushar Dave <tushar.n.dave@intel.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/delay.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/pm.h> 16 #include <linux/suspend.h> 17 #include <linux/thermal.h> 18 #include <linux/types.h> 19 #include <linux/units.h> 20 21 /* Intel PCH thermal Device IDs */ 22 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ 23 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ 24 #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ 25 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ 26 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ 27 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ 28 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ 29 #define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */ 30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */ 31 #define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */ 32 #define PCH_THERMAL_DID_WBG 0x8D24 /* Wellsburg PCH */ 33 34 /* Wildcat Point-LP PCH Thermal registers */ 35 #define WPT_TEMP 0x0000 /* Temperature */ 36 #define WPT_TSC 0x04 /* Thermal Sensor Control */ 37 #define WPT_TSS 0x06 /* Thermal Sensor Status */ 38 #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ 39 #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ 40 #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ 41 #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ 42 #define WPT_TSPM 0x001C /* Thermal Sensor Power Management */ 43 #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ 44 #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ 45 #define WPT_TL 0x00000040 /* Throttle Value */ 46 #define WPT_PHL 0x0060 /* PCH Hot Level */ 47 #define WPT_PHLC 0x62 /* PHL Control */ 48 #define WPT_TAS 0x80 /* Thermal Alert Status */ 49 #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ 50 #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ 51 52 /* Wildcat Point-LP PCH Thermal Register bit definitions */ 53 #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ 54 #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ 55 #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ 56 #define WPT_TSS_GPES 0x08 /* GPE status */ 57 #define WPT_TSEL_ETS 0x01 /* Enable TS */ 58 #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ 59 #define WPT_TL_TOL 0x000001FF /* T0 Level */ 60 #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ 61 #define WPT_TL_TTEN 0x20000000 /* TT Enable */ 62 63 /* Resolution of 1/2 degree C and an offset of -50C */ 64 #define PCH_TEMP_OFFSET (-50) 65 #define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET) 66 #define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE) 67 #define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET) 68 69 #define PCH_MAX_TRIPS 3 /* critical, hot, passive */ 70 71 /* Amount of time for each cooling delay, 100ms by default for now */ 72 static unsigned int delay_timeout = 100; 73 module_param(delay_timeout, int, 0644); 74 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration."); 75 76 /* Number of iterations for cooling delay, 600 counts by default for now */ 77 static unsigned int delay_cnt = 600; 78 module_param(delay_cnt, int, 0644); 79 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay."); 80 81 static char driver_name[] = "Intel PCH thermal driver"; 82 83 struct pch_thermal_device { 84 void __iomem *hw_base; 85 const struct pch_dev_ops *ops; 86 struct pci_dev *pdev; 87 struct thermal_zone_device *tzd; 88 struct thermal_trip trips[PCH_MAX_TRIPS]; 89 bool bios_enabled; 90 }; 91 92 #ifdef CONFIG_ACPI 93 94 /* 95 * On some platforms, there is a companion ACPI device, which adds 96 * passive trip temperature using _PSV method. There is no specific 97 * passive temperature setting in MMIO interface of this PCI device. 98 */ 99 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 100 int *nr_trips) 101 { 102 struct acpi_device *adev; 103 int ret; 104 105 adev = ACPI_COMPANION(&ptd->pdev->dev); 106 if (!adev) 107 return; 108 109 ret = thermal_acpi_trip_passive(adev, &ptd->trips[*nr_trips]); 110 if (ret) 111 return; 112 113 ++(*nr_trips); 114 } 115 #else 116 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 117 int *nr_trips) 118 { 119 120 } 121 #endif 122 123 static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) 124 { 125 u8 tsel; 126 u16 trip_temp; 127 128 *nr_trips = 0; 129 130 /* Check if BIOS has already enabled thermal sensor */ 131 if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { 132 ptd->bios_enabled = true; 133 goto read_trips; 134 } 135 136 tsel = readb(ptd->hw_base + WPT_TSEL); 137 /* 138 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. 139 * If so, thermal sensor cannot enable. Bail out. 140 */ 141 if (tsel & WPT_TSEL_PLDB) { 142 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 143 return -ENODEV; 144 } 145 146 writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 147 if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { 148 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 149 return -ENODEV; 150 } 151 152 read_trips: 153 trip_temp = readw(ptd->hw_base + WPT_CTT); 154 trip_temp &= 0x1FF; 155 if (trip_temp) { 156 ptd->trips[*nr_trips].temperature = GET_WPT_TEMP(trip_temp); 157 ptd->trips[*nr_trips].type = THERMAL_TRIP_CRITICAL; 158 ++(*nr_trips); 159 } 160 161 trip_temp = readw(ptd->hw_base + WPT_PHL); 162 trip_temp &= 0x1FF; 163 if (trip_temp) { 164 ptd->trips[*nr_trips].temperature = GET_WPT_TEMP(trip_temp); 165 ptd->trips[*nr_trips].type = THERMAL_TRIP_HOT; 166 ++(*nr_trips); 167 } 168 169 pch_wpt_add_acpi_psv_trip(ptd, nr_trips); 170 171 return 0; 172 } 173 174 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) 175 { 176 *temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 177 178 return 0; 179 } 180 181 /* Cool the PCH when it's overheat in .suspend_noirq phase */ 182 static int pch_wpt_suspend(struct pch_thermal_device *ptd) 183 { 184 u8 tsel; 185 int pch_delay_cnt = 0; 186 u16 pch_thr_temp, pch_cur_temp; 187 188 /* Shutdown the thermal sensor if it is not enabled by BIOS */ 189 if (!ptd->bios_enabled) { 190 tsel = readb(ptd->hw_base + WPT_TSEL); 191 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); 192 return 0; 193 } 194 195 /* Do not check temperature if it is not s2idle */ 196 if (pm_suspend_via_firmware()) 197 return 0; 198 199 /* Get the PCH temperature threshold value */ 200 pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM)); 201 202 /* Get the PCH current temperature value */ 203 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 204 205 /* 206 * If current PCH temperature is higher than configured PCH threshold 207 * value, run some delay loop with sleep to let the current temperature 208 * go down below the threshold value which helps to allow system enter 209 * lower power S0ix suspend state. Even after delay loop if PCH current 210 * temperature stays above threshold, notify the warning message 211 * which helps to indentify the reason why S0ix entry was rejected. 212 */ 213 while (pch_delay_cnt < delay_cnt) { 214 if (pch_cur_temp < pch_thr_temp) 215 break; 216 217 if (pm_wakeup_pending()) { 218 dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n"); 219 return 0; 220 } 221 222 pch_delay_cnt++; 223 dev_dbg(&ptd->pdev->dev, 224 "CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n", 225 pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout); 226 msleep(delay_timeout); 227 /* Read the PCH current temperature for next cycle. */ 228 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 229 } 230 231 if (pch_cur_temp >= pch_thr_temp) 232 dev_warn(&ptd->pdev->dev, 233 "CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n", 234 pch_cur_temp, pch_delay_cnt * delay_timeout); 235 else { 236 if (pch_delay_cnt) 237 dev_info(&ptd->pdev->dev, 238 "CPU-PCH is cool [%dC] after %d ms delay\n", 239 pch_cur_temp, pch_delay_cnt * delay_timeout); 240 else 241 dev_info(&ptd->pdev->dev, 242 "CPU-PCH is cool [%dC]\n", 243 pch_cur_temp); 244 } 245 246 return 0; 247 } 248 249 static int pch_wpt_resume(struct pch_thermal_device *ptd) 250 { 251 u8 tsel; 252 253 if (ptd->bios_enabled) 254 return 0; 255 256 tsel = readb(ptd->hw_base + WPT_TSEL); 257 258 writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 259 260 return 0; 261 } 262 263 struct pch_dev_ops { 264 int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); 265 int (*get_temp)(struct pch_thermal_device *ptd, int *temp); 266 int (*suspend)(struct pch_thermal_device *ptd); 267 int (*resume)(struct pch_thermal_device *ptd); 268 }; 269 270 271 /* dev ops for Wildcat Point */ 272 static const struct pch_dev_ops pch_dev_ops_wpt = { 273 .hw_init = pch_wpt_init, 274 .get_temp = pch_wpt_get_temp, 275 .suspend = pch_wpt_suspend, 276 .resume = pch_wpt_resume, 277 }; 278 279 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) 280 { 281 struct pch_thermal_device *ptd = tzd->devdata; 282 283 return ptd->ops->get_temp(ptd, temp); 284 } 285 286 static void pch_critical(struct thermal_zone_device *tzd) 287 { 288 dev_dbg(&tzd->device, "%s: critical temperature reached\n", tzd->type); 289 } 290 291 static struct thermal_zone_device_ops tzd_ops = { 292 .get_temp = pch_thermal_get_temp, 293 .critical = pch_critical, 294 }; 295 296 enum board_ids { 297 board_hsw, 298 board_wpt, 299 board_skl, 300 board_cnl, 301 board_cml, 302 board_lwb, 303 board_wbg, 304 }; 305 306 static const struct board_info { 307 const char *name; 308 const struct pch_dev_ops *ops; 309 } board_info[] = { 310 [board_hsw] = { 311 .name = "pch_haswell", 312 .ops = &pch_dev_ops_wpt, 313 }, 314 [board_wpt] = { 315 .name = "pch_wildcat_point", 316 .ops = &pch_dev_ops_wpt, 317 }, 318 [board_skl] = { 319 .name = "pch_skylake", 320 .ops = &pch_dev_ops_wpt, 321 }, 322 [board_cnl] = { 323 .name = "pch_cannonlake", 324 .ops = &pch_dev_ops_wpt, 325 }, 326 [board_cml] = { 327 .name = "pch_cometlake", 328 .ops = &pch_dev_ops_wpt, 329 }, 330 [board_lwb] = { 331 .name = "pch_lewisburg", 332 .ops = &pch_dev_ops_wpt, 333 }, 334 [board_wbg] = { 335 .name = "pch_wellsburg", 336 .ops = &pch_dev_ops_wpt, 337 }, 338 }; 339 340 static int intel_pch_thermal_probe(struct pci_dev *pdev, 341 const struct pci_device_id *id) 342 { 343 enum board_ids board_id = id->driver_data; 344 const struct board_info *bi = &board_info[board_id]; 345 struct pch_thermal_device *ptd; 346 int err; 347 int nr_trips; 348 349 ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); 350 if (!ptd) 351 return -ENOMEM; 352 353 ptd->ops = bi->ops; 354 355 pci_set_drvdata(pdev, ptd); 356 ptd->pdev = pdev; 357 358 err = pci_enable_device(pdev); 359 if (err) { 360 dev_err(&pdev->dev, "failed to enable pci device\n"); 361 return err; 362 } 363 364 err = pci_request_regions(pdev, driver_name); 365 if (err) { 366 dev_err(&pdev->dev, "failed to request pci region\n"); 367 goto error_disable; 368 } 369 370 ptd->hw_base = pci_ioremap_bar(pdev, 0); 371 if (!ptd->hw_base) { 372 err = -ENOMEM; 373 dev_err(&pdev->dev, "failed to map mem base\n"); 374 goto error_release; 375 } 376 377 err = ptd->ops->hw_init(ptd, &nr_trips); 378 if (err) 379 goto error_cleanup; 380 381 ptd->tzd = thermal_zone_device_register_with_trips(bi->name, ptd->trips, 382 nr_trips, 0, ptd, 383 &tzd_ops, NULL, 0, 0); 384 if (IS_ERR(ptd->tzd)) { 385 dev_err(&pdev->dev, "Failed to register thermal zone %s\n", 386 bi->name); 387 err = PTR_ERR(ptd->tzd); 388 goto error_cleanup; 389 } 390 err = thermal_zone_device_enable(ptd->tzd); 391 if (err) 392 goto err_unregister; 393 394 return 0; 395 396 err_unregister: 397 thermal_zone_device_unregister(ptd->tzd); 398 error_cleanup: 399 iounmap(ptd->hw_base); 400 error_release: 401 pci_release_regions(pdev); 402 error_disable: 403 pci_disable_device(pdev); 404 dev_err(&pdev->dev, "pci device failed to probe\n"); 405 return err; 406 } 407 408 static void intel_pch_thermal_remove(struct pci_dev *pdev) 409 { 410 struct pch_thermal_device *ptd = pci_get_drvdata(pdev); 411 412 thermal_zone_device_unregister(ptd->tzd); 413 iounmap(ptd->hw_base); 414 pci_set_drvdata(pdev, NULL); 415 pci_release_regions(pdev); 416 pci_disable_device(pdev); 417 } 418 419 static int intel_pch_thermal_suspend_noirq(struct device *device) 420 { 421 struct pch_thermal_device *ptd = dev_get_drvdata(device); 422 423 return ptd->ops->suspend(ptd); 424 } 425 426 static int intel_pch_thermal_resume(struct device *device) 427 { 428 struct pch_thermal_device *ptd = dev_get_drvdata(device); 429 430 return ptd->ops->resume(ptd); 431 } 432 433 static const struct pci_device_id intel_pch_thermal_id[] = { 434 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), 435 .driver_data = board_hsw, }, 436 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), 437 .driver_data = board_hsw, }, 438 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), 439 .driver_data = board_wpt, }, 440 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), 441 .driver_data = board_skl, }, 442 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), 443 .driver_data = board_skl, }, 444 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), 445 .driver_data = board_cnl, }, 446 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), 447 .driver_data = board_cnl, }, 448 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP), 449 .driver_data = board_cnl, }, 450 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H), 451 .driver_data = board_cml, }, 452 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB), 453 .driver_data = board_lwb, }, 454 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG), 455 .driver_data = board_wbg, }, 456 { 0, }, 457 }; 458 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); 459 460 static const struct dev_pm_ops intel_pch_pm_ops = { 461 .suspend_noirq = intel_pch_thermal_suspend_noirq, 462 .resume = intel_pch_thermal_resume, 463 }; 464 465 static struct pci_driver intel_pch_thermal_driver = { 466 .name = "intel_pch_thermal", 467 .id_table = intel_pch_thermal_id, 468 .probe = intel_pch_thermal_probe, 469 .remove = intel_pch_thermal_remove, 470 .driver.pm = &intel_pch_pm_ops, 471 }; 472 473 module_pci_driver(intel_pch_thermal_driver); 474 475 MODULE_LICENSE("GPL v2"); 476 MODULE_DESCRIPTION("Intel PCH Thermal driver"); 477