1 // SPDX-License-Identifier: GPL-2.0-only 2 /* intel_pch_thermal.c - Intel PCH Thermal driver 3 * 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * Authors: 7 * Tushar Dave <tushar.n.dave@intel.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/delay.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/pm.h> 16 #include <linux/suspend.h> 17 #include <linux/thermal.h> 18 #include <linux/types.h> 19 #include <linux/units.h> 20 21 /* Intel PCH thermal Device IDs */ 22 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ 23 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ 24 #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ 25 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ 26 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ 27 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ 28 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ 29 #define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */ 30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */ 31 #define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */ 32 33 /* Wildcat Point-LP PCH Thermal registers */ 34 #define WPT_TEMP 0x0000 /* Temperature */ 35 #define WPT_TSC 0x04 /* Thermal Sensor Control */ 36 #define WPT_TSS 0x06 /* Thermal Sensor Status */ 37 #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ 38 #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ 39 #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ 40 #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ 41 #define WPT_TSPM 0x001C /* Thermal Sensor Power Management */ 42 #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ 43 #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ 44 #define WPT_TL 0x00000040 /* Throttle Value */ 45 #define WPT_PHL 0x0060 /* PCH Hot Level */ 46 #define WPT_PHLC 0x62 /* PHL Control */ 47 #define WPT_TAS 0x80 /* Thermal Alert Status */ 48 #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ 49 #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ 50 51 /* Wildcat Point-LP PCH Thermal Register bit definitions */ 52 #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ 53 #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ 54 #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ 55 #define WPT_TSS_GPES 0x08 /* GPE status */ 56 #define WPT_TSEL_ETS 0x01 /* Enable TS */ 57 #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ 58 #define WPT_TL_TOL 0x000001FF /* T0 Level */ 59 #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ 60 #define WPT_TL_TTEN 0x20000000 /* TT Enable */ 61 62 /* Resolution of 1/2 degree C and an offset of -50C */ 63 #define PCH_TEMP_OFFSET (-50) 64 #define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET) 65 #define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE) 66 #define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET) 67 68 /* Amount of time for each cooling delay, 100ms by default for now */ 69 static unsigned int delay_timeout = 100; 70 module_param(delay_timeout, int, 0644); 71 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration."); 72 73 /* Number of iterations for cooling delay, 10 counts by default for now */ 74 static unsigned int delay_cnt = 10; 75 module_param(delay_cnt, int, 0644); 76 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay."); 77 78 static char driver_name[] = "Intel PCH thermal driver"; 79 80 struct pch_thermal_device { 81 void __iomem *hw_base; 82 const struct pch_dev_ops *ops; 83 struct pci_dev *pdev; 84 struct thermal_zone_device *tzd; 85 int crt_trip_id; 86 unsigned long crt_temp; 87 int hot_trip_id; 88 unsigned long hot_temp; 89 int psv_trip_id; 90 unsigned long psv_temp; 91 bool bios_enabled; 92 }; 93 94 #ifdef CONFIG_ACPI 95 96 /* 97 * On some platforms, there is a companion ACPI device, which adds 98 * passive trip temperature using _PSV method. There is no specific 99 * passive temperature setting in MMIO interface of this PCI device. 100 */ 101 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 102 int *nr_trips) 103 { 104 struct acpi_device *adev; 105 106 ptd->psv_trip_id = -1; 107 108 adev = ACPI_COMPANION(&ptd->pdev->dev); 109 if (adev) { 110 unsigned long long r; 111 acpi_status status; 112 113 status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, 114 &r); 115 if (ACPI_SUCCESS(status)) { 116 unsigned long trip_temp; 117 118 trip_temp = deci_kelvin_to_millicelsius(r); 119 if (trip_temp) { 120 ptd->psv_temp = trip_temp; 121 ptd->psv_trip_id = *nr_trips; 122 ++(*nr_trips); 123 } 124 } 125 } 126 } 127 #else 128 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 129 int *nr_trips) 130 { 131 ptd->psv_trip_id = -1; 132 133 } 134 #endif 135 136 static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) 137 { 138 u8 tsel; 139 u16 trip_temp; 140 141 *nr_trips = 0; 142 143 /* Check if BIOS has already enabled thermal sensor */ 144 if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { 145 ptd->bios_enabled = true; 146 goto read_trips; 147 } 148 149 tsel = readb(ptd->hw_base + WPT_TSEL); 150 /* 151 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. 152 * If so, thermal sensor cannot enable. Bail out. 153 */ 154 if (tsel & WPT_TSEL_PLDB) { 155 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 156 return -ENODEV; 157 } 158 159 writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 160 if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { 161 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 162 return -ENODEV; 163 } 164 165 read_trips: 166 ptd->crt_trip_id = -1; 167 trip_temp = readw(ptd->hw_base + WPT_CTT); 168 trip_temp &= 0x1FF; 169 if (trip_temp) { 170 /* Resolution of 1/2 degree C and an offset of -50C */ 171 ptd->crt_temp = trip_temp * 1000 / 2 - 50000; 172 ptd->crt_trip_id = 0; 173 ++(*nr_trips); 174 } 175 176 ptd->hot_trip_id = -1; 177 trip_temp = readw(ptd->hw_base + WPT_PHL); 178 trip_temp &= 0x1FF; 179 if (trip_temp) { 180 /* Resolution of 1/2 degree C and an offset of -50C */ 181 ptd->hot_temp = trip_temp * 1000 / 2 - 50000; 182 ptd->hot_trip_id = *nr_trips; 183 ++(*nr_trips); 184 } 185 186 pch_wpt_add_acpi_psv_trip(ptd, nr_trips); 187 188 return 0; 189 } 190 191 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) 192 { 193 u16 wpt_temp; 194 195 wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP); 196 197 /* Resolution of 1/2 degree C and an offset of -50C */ 198 *temp = (wpt_temp * 1000 / 2 - 50000); 199 200 return 0; 201 } 202 203 static int pch_wpt_suspend(struct pch_thermal_device *ptd) 204 { 205 u8 tsel; 206 u8 pch_delay_cnt = 1; 207 u16 pch_thr_temp, pch_cur_temp; 208 209 /* Shutdown the thermal sensor if it is not enabled by BIOS */ 210 if (!ptd->bios_enabled) { 211 tsel = readb(ptd->hw_base + WPT_TSEL); 212 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); 213 return 0; 214 } 215 216 /* Do not check temperature if it is not a S0ix capable platform */ 217 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 218 return 0; 219 220 /* Do not check temperature if it is not s2idle */ 221 if (pm_suspend_via_firmware()) 222 return 0; 223 224 /* Get the PCH temperature threshold value */ 225 pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM)); 226 227 /* Get the PCH current temperature value */ 228 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 229 230 /* 231 * If current PCH temperature is higher than configured PCH threshold 232 * value, run some delay loop with sleep to let the current temperature 233 * go down below the threshold value which helps to allow system enter 234 * lower power S0ix suspend state. Even after delay loop if PCH current 235 * temperature stays above threshold, notify the warning message 236 * which helps to indentify the reason why S0ix entry was rejected. 237 */ 238 while (pch_delay_cnt <= delay_cnt) { 239 if (pch_cur_temp <= pch_thr_temp) 240 break; 241 242 dev_warn(&ptd->pdev->dev, 243 "CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n", 244 pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout); 245 msleep(delay_timeout); 246 /* Read the PCH current temperature for next cycle. */ 247 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 248 pch_delay_cnt++; 249 } 250 251 if (pch_cur_temp > pch_thr_temp) 252 dev_warn(&ptd->pdev->dev, 253 "CPU-PCH is hot [%dC] even after delay, continue to suspend. S0ix might fail\n", 254 pch_cur_temp); 255 else 256 dev_info(&ptd->pdev->dev, 257 "CPU-PCH is cool [%dC], continue to suspend\n", pch_cur_temp); 258 259 return 0; 260 } 261 262 static int pch_wpt_resume(struct pch_thermal_device *ptd) 263 { 264 u8 tsel; 265 266 if (ptd->bios_enabled) 267 return 0; 268 269 tsel = readb(ptd->hw_base + WPT_TSEL); 270 271 writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 272 273 return 0; 274 } 275 276 struct pch_dev_ops { 277 int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); 278 int (*get_temp)(struct pch_thermal_device *ptd, int *temp); 279 int (*suspend)(struct pch_thermal_device *ptd); 280 int (*resume)(struct pch_thermal_device *ptd); 281 }; 282 283 284 /* dev ops for Wildcat Point */ 285 static const struct pch_dev_ops pch_dev_ops_wpt = { 286 .hw_init = pch_wpt_init, 287 .get_temp = pch_wpt_get_temp, 288 .suspend = pch_wpt_suspend, 289 .resume = pch_wpt_resume, 290 }; 291 292 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) 293 { 294 struct pch_thermal_device *ptd = tzd->devdata; 295 296 return ptd->ops->get_temp(ptd, temp); 297 } 298 299 static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip, 300 enum thermal_trip_type *type) 301 { 302 struct pch_thermal_device *ptd = tzd->devdata; 303 304 if (ptd->crt_trip_id == trip) 305 *type = THERMAL_TRIP_CRITICAL; 306 else if (ptd->hot_trip_id == trip) 307 *type = THERMAL_TRIP_HOT; 308 else if (ptd->psv_trip_id == trip) 309 *type = THERMAL_TRIP_PASSIVE; 310 else 311 return -EINVAL; 312 313 return 0; 314 } 315 316 static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp) 317 { 318 struct pch_thermal_device *ptd = tzd->devdata; 319 320 if (ptd->crt_trip_id == trip) 321 *temp = ptd->crt_temp; 322 else if (ptd->hot_trip_id == trip) 323 *temp = ptd->hot_temp; 324 else if (ptd->psv_trip_id == trip) 325 *temp = ptd->psv_temp; 326 else 327 return -EINVAL; 328 329 return 0; 330 } 331 332 static struct thermal_zone_device_ops tzd_ops = { 333 .get_temp = pch_thermal_get_temp, 334 .get_trip_type = pch_get_trip_type, 335 .get_trip_temp = pch_get_trip_temp, 336 }; 337 338 enum board_ids { 339 board_hsw, 340 board_wpt, 341 board_skl, 342 board_cnl, 343 board_cml, 344 board_lwb, 345 }; 346 347 static const struct board_info { 348 const char *name; 349 const struct pch_dev_ops *ops; 350 } board_info[] = { 351 [board_hsw] = { 352 .name = "pch_haswell", 353 .ops = &pch_dev_ops_wpt, 354 }, 355 [board_wpt] = { 356 .name = "pch_wildcat_point", 357 .ops = &pch_dev_ops_wpt, 358 }, 359 [board_skl] = { 360 .name = "pch_skylake", 361 .ops = &pch_dev_ops_wpt, 362 }, 363 [board_cnl] = { 364 .name = "pch_cannonlake", 365 .ops = &pch_dev_ops_wpt, 366 }, 367 [board_cml] = { 368 .name = "pch_cometlake", 369 .ops = &pch_dev_ops_wpt, 370 }, 371 [board_lwb] = { 372 .name = "pch_lewisburg", 373 .ops = &pch_dev_ops_wpt, 374 }, 375 }; 376 377 static int intel_pch_thermal_probe(struct pci_dev *pdev, 378 const struct pci_device_id *id) 379 { 380 enum board_ids board_id = id->driver_data; 381 const struct board_info *bi = &board_info[board_id]; 382 struct pch_thermal_device *ptd; 383 int err; 384 int nr_trips; 385 386 ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); 387 if (!ptd) 388 return -ENOMEM; 389 390 ptd->ops = bi->ops; 391 392 pci_set_drvdata(pdev, ptd); 393 ptd->pdev = pdev; 394 395 err = pci_enable_device(pdev); 396 if (err) { 397 dev_err(&pdev->dev, "failed to enable pci device\n"); 398 return err; 399 } 400 401 err = pci_request_regions(pdev, driver_name); 402 if (err) { 403 dev_err(&pdev->dev, "failed to request pci region\n"); 404 goto error_disable; 405 } 406 407 ptd->hw_base = pci_ioremap_bar(pdev, 0); 408 if (!ptd->hw_base) { 409 err = -ENOMEM; 410 dev_err(&pdev->dev, "failed to map mem base\n"); 411 goto error_release; 412 } 413 414 err = ptd->ops->hw_init(ptd, &nr_trips); 415 if (err) 416 goto error_cleanup; 417 418 ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd, 419 &tzd_ops, NULL, 0, 0); 420 if (IS_ERR(ptd->tzd)) { 421 dev_err(&pdev->dev, "Failed to register thermal zone %s\n", 422 bi->name); 423 err = PTR_ERR(ptd->tzd); 424 goto error_cleanup; 425 } 426 err = thermal_zone_device_enable(ptd->tzd); 427 if (err) 428 goto err_unregister; 429 430 return 0; 431 432 err_unregister: 433 thermal_zone_device_unregister(ptd->tzd); 434 error_cleanup: 435 iounmap(ptd->hw_base); 436 error_release: 437 pci_release_regions(pdev); 438 error_disable: 439 pci_disable_device(pdev); 440 dev_err(&pdev->dev, "pci device failed to probe\n"); 441 return err; 442 } 443 444 static void intel_pch_thermal_remove(struct pci_dev *pdev) 445 { 446 struct pch_thermal_device *ptd = pci_get_drvdata(pdev); 447 448 thermal_zone_device_unregister(ptd->tzd); 449 iounmap(ptd->hw_base); 450 pci_set_drvdata(pdev, NULL); 451 pci_release_regions(pdev); 452 pci_disable_device(pdev); 453 } 454 455 static int intel_pch_thermal_suspend(struct device *device) 456 { 457 struct pch_thermal_device *ptd = dev_get_drvdata(device); 458 459 return ptd->ops->suspend(ptd); 460 } 461 462 static int intel_pch_thermal_resume(struct device *device) 463 { 464 struct pch_thermal_device *ptd = dev_get_drvdata(device); 465 466 return ptd->ops->resume(ptd); 467 } 468 469 static const struct pci_device_id intel_pch_thermal_id[] = { 470 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), 471 .driver_data = board_hsw, }, 472 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), 473 .driver_data = board_hsw, }, 474 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), 475 .driver_data = board_wpt, }, 476 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), 477 .driver_data = board_skl, }, 478 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), 479 .driver_data = board_skl, }, 480 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), 481 .driver_data = board_cnl, }, 482 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), 483 .driver_data = board_cnl, }, 484 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP), 485 .driver_data = board_cnl, }, 486 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H), 487 .driver_data = board_cml, }, 488 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB), 489 .driver_data = board_lwb, }, 490 { 0, }, 491 }; 492 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); 493 494 static const struct dev_pm_ops intel_pch_pm_ops = { 495 .suspend = intel_pch_thermal_suspend, 496 .resume = intel_pch_thermal_resume, 497 }; 498 499 static struct pci_driver intel_pch_thermal_driver = { 500 .name = "intel_pch_thermal", 501 .id_table = intel_pch_thermal_id, 502 .probe = intel_pch_thermal_probe, 503 .remove = intel_pch_thermal_remove, 504 .driver.pm = &intel_pch_pm_ops, 505 }; 506 507 module_pci_driver(intel_pch_thermal_driver); 508 509 MODULE_LICENSE("GPL v2"); 510 MODULE_DESCRIPTION("Intel PCH Thermal driver"); 511