1 // SPDX-License-Identifier: GPL-2.0-only 2 /* intel_pch_thermal.c - Intel PCH Thermal driver 3 * 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * Authors: 7 * Tushar Dave <tushar.n.dave@intel.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/delay.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/pm.h> 16 #include <linux/suspend.h> 17 #include <linux/thermal.h> 18 #include <linux/types.h> 19 #include <linux/units.h> 20 21 /* Intel PCH thermal Device IDs */ 22 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ 23 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ 24 #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ 25 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ 26 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ 27 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ 28 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ 29 #define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */ 30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */ 31 #define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */ 32 33 /* Wildcat Point-LP PCH Thermal registers */ 34 #define WPT_TEMP 0x0000 /* Temperature */ 35 #define WPT_TSC 0x04 /* Thermal Sensor Control */ 36 #define WPT_TSS 0x06 /* Thermal Sensor Status */ 37 #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ 38 #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ 39 #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ 40 #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ 41 #define WPT_TSPM 0x001C /* Thermal Sensor Power Management */ 42 #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ 43 #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ 44 #define WPT_TL 0x00000040 /* Throttle Value */ 45 #define WPT_PHL 0x0060 /* PCH Hot Level */ 46 #define WPT_PHLC 0x62 /* PHL Control */ 47 #define WPT_TAS 0x80 /* Thermal Alert Status */ 48 #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ 49 #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ 50 51 /* Wildcat Point-LP PCH Thermal Register bit definitions */ 52 #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ 53 #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ 54 #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ 55 #define WPT_TSS_GPES 0x08 /* GPE status */ 56 #define WPT_TSEL_ETS 0x01 /* Enable TS */ 57 #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ 58 #define WPT_TL_TOL 0x000001FF /* T0 Level */ 59 #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ 60 #define WPT_TL_TTEN 0x20000000 /* TT Enable */ 61 62 /* Resolution of 1/2 degree C and an offset of -50C */ 63 #define PCH_TEMP_OFFSET (-50) 64 #define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET) 65 #define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE) 66 #define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET) 67 68 /* Amount of time for each cooling delay, 100ms by default for now */ 69 static unsigned int delay_timeout = 100; 70 module_param(delay_timeout, int, 0644); 71 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration."); 72 73 /* Number of iterations for cooling delay, 10 counts by default for now */ 74 static unsigned int delay_cnt = 10; 75 module_param(delay_cnt, int, 0644); 76 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay."); 77 78 static char driver_name[] = "Intel PCH thermal driver"; 79 80 struct pch_thermal_device { 81 void __iomem *hw_base; 82 const struct pch_dev_ops *ops; 83 struct pci_dev *pdev; 84 struct thermal_zone_device *tzd; 85 int crt_trip_id; 86 unsigned long crt_temp; 87 int hot_trip_id; 88 unsigned long hot_temp; 89 int psv_trip_id; 90 unsigned long psv_temp; 91 bool bios_enabled; 92 }; 93 94 #ifdef CONFIG_ACPI 95 96 /* 97 * On some platforms, there is a companion ACPI device, which adds 98 * passive trip temperature using _PSV method. There is no specific 99 * passive temperature setting in MMIO interface of this PCI device. 100 */ 101 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 102 int *nr_trips) 103 { 104 struct acpi_device *adev; 105 106 ptd->psv_trip_id = -1; 107 108 adev = ACPI_COMPANION(&ptd->pdev->dev); 109 if (adev) { 110 unsigned long long r; 111 acpi_status status; 112 113 status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, 114 &r); 115 if (ACPI_SUCCESS(status)) { 116 unsigned long trip_temp; 117 118 trip_temp = deci_kelvin_to_millicelsius(r); 119 if (trip_temp) { 120 ptd->psv_temp = trip_temp; 121 ptd->psv_trip_id = *nr_trips; 122 ++(*nr_trips); 123 } 124 } 125 } 126 } 127 #else 128 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 129 int *nr_trips) 130 { 131 ptd->psv_trip_id = -1; 132 133 } 134 #endif 135 136 static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) 137 { 138 u8 tsel; 139 u16 trip_temp; 140 141 *nr_trips = 0; 142 143 /* Check if BIOS has already enabled thermal sensor */ 144 if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { 145 ptd->bios_enabled = true; 146 goto read_trips; 147 } 148 149 tsel = readb(ptd->hw_base + WPT_TSEL); 150 /* 151 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. 152 * If so, thermal sensor cannot enable. Bail out. 153 */ 154 if (tsel & WPT_TSEL_PLDB) { 155 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 156 return -ENODEV; 157 } 158 159 writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 160 if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { 161 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 162 return -ENODEV; 163 } 164 165 read_trips: 166 ptd->crt_trip_id = -1; 167 trip_temp = readw(ptd->hw_base + WPT_CTT); 168 trip_temp &= 0x1FF; 169 if (trip_temp) { 170 /* Resolution of 1/2 degree C and an offset of -50C */ 171 ptd->crt_temp = trip_temp * 1000 / 2 - 50000; 172 ptd->crt_trip_id = 0; 173 ++(*nr_trips); 174 } 175 176 ptd->hot_trip_id = -1; 177 trip_temp = readw(ptd->hw_base + WPT_PHL); 178 trip_temp &= 0x1FF; 179 if (trip_temp) { 180 /* Resolution of 1/2 degree C and an offset of -50C */ 181 ptd->hot_temp = trip_temp * 1000 / 2 - 50000; 182 ptd->hot_trip_id = *nr_trips; 183 ++(*nr_trips); 184 } 185 186 pch_wpt_add_acpi_psv_trip(ptd, nr_trips); 187 188 return 0; 189 } 190 191 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) 192 { 193 u16 wpt_temp; 194 195 wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP); 196 197 /* Resolution of 1/2 degree C and an offset of -50C */ 198 *temp = (wpt_temp * 1000 / 2 - 50000); 199 200 return 0; 201 } 202 203 static int pch_wpt_suspend(struct pch_thermal_device *ptd) 204 { 205 u8 tsel; 206 u8 pch_delay_cnt = 1; 207 u16 pch_thr_temp, pch_cur_temp; 208 209 /* Shutdown the thermal sensor if it is not enabled by BIOS */ 210 if (!ptd->bios_enabled) { 211 tsel = readb(ptd->hw_base + WPT_TSEL); 212 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); 213 return 0; 214 } 215 216 /* Do not check temperature if it is not a S0ix capable platform */ 217 #ifdef CONFIG_ACPI 218 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 219 return 0; 220 #else 221 return 0; 222 #endif 223 224 /* Do not check temperature if it is not s2idle */ 225 if (pm_suspend_via_firmware()) 226 return 0; 227 228 /* Get the PCH temperature threshold value */ 229 pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM)); 230 231 /* Get the PCH current temperature value */ 232 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 233 234 /* 235 * If current PCH temperature is higher than configured PCH threshold 236 * value, run some delay loop with sleep to let the current temperature 237 * go down below the threshold value which helps to allow system enter 238 * lower power S0ix suspend state. Even after delay loop if PCH current 239 * temperature stays above threshold, notify the warning message 240 * which helps to indentify the reason why S0ix entry was rejected. 241 */ 242 while (pch_delay_cnt <= delay_cnt) { 243 if (pch_cur_temp <= pch_thr_temp) 244 break; 245 246 dev_warn(&ptd->pdev->dev, 247 "CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n", 248 pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout); 249 msleep(delay_timeout); 250 /* Read the PCH current temperature for next cycle. */ 251 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 252 pch_delay_cnt++; 253 } 254 255 if (pch_cur_temp > pch_thr_temp) 256 dev_warn(&ptd->pdev->dev, 257 "CPU-PCH is hot [%dC] even after delay, continue to suspend. S0ix might fail\n", 258 pch_cur_temp); 259 else 260 dev_info(&ptd->pdev->dev, 261 "CPU-PCH is cool [%dC], continue to suspend\n", pch_cur_temp); 262 263 return 0; 264 } 265 266 static int pch_wpt_resume(struct pch_thermal_device *ptd) 267 { 268 u8 tsel; 269 270 if (ptd->bios_enabled) 271 return 0; 272 273 tsel = readb(ptd->hw_base + WPT_TSEL); 274 275 writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 276 277 return 0; 278 } 279 280 struct pch_dev_ops { 281 int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); 282 int (*get_temp)(struct pch_thermal_device *ptd, int *temp); 283 int (*suspend)(struct pch_thermal_device *ptd); 284 int (*resume)(struct pch_thermal_device *ptd); 285 }; 286 287 288 /* dev ops for Wildcat Point */ 289 static const struct pch_dev_ops pch_dev_ops_wpt = { 290 .hw_init = pch_wpt_init, 291 .get_temp = pch_wpt_get_temp, 292 .suspend = pch_wpt_suspend, 293 .resume = pch_wpt_resume, 294 }; 295 296 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) 297 { 298 struct pch_thermal_device *ptd = tzd->devdata; 299 300 return ptd->ops->get_temp(ptd, temp); 301 } 302 303 static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip, 304 enum thermal_trip_type *type) 305 { 306 struct pch_thermal_device *ptd = tzd->devdata; 307 308 if (ptd->crt_trip_id == trip) 309 *type = THERMAL_TRIP_CRITICAL; 310 else if (ptd->hot_trip_id == trip) 311 *type = THERMAL_TRIP_HOT; 312 else if (ptd->psv_trip_id == trip) 313 *type = THERMAL_TRIP_PASSIVE; 314 else 315 return -EINVAL; 316 317 return 0; 318 } 319 320 static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp) 321 { 322 struct pch_thermal_device *ptd = tzd->devdata; 323 324 if (ptd->crt_trip_id == trip) 325 *temp = ptd->crt_temp; 326 else if (ptd->hot_trip_id == trip) 327 *temp = ptd->hot_temp; 328 else if (ptd->psv_trip_id == trip) 329 *temp = ptd->psv_temp; 330 else 331 return -EINVAL; 332 333 return 0; 334 } 335 336 static struct thermal_zone_device_ops tzd_ops = { 337 .get_temp = pch_thermal_get_temp, 338 .get_trip_type = pch_get_trip_type, 339 .get_trip_temp = pch_get_trip_temp, 340 }; 341 342 enum board_ids { 343 board_hsw, 344 board_wpt, 345 board_skl, 346 board_cnl, 347 board_cml, 348 board_lwb, 349 }; 350 351 static const struct board_info { 352 const char *name; 353 const struct pch_dev_ops *ops; 354 } board_info[] = { 355 [board_hsw] = { 356 .name = "pch_haswell", 357 .ops = &pch_dev_ops_wpt, 358 }, 359 [board_wpt] = { 360 .name = "pch_wildcat_point", 361 .ops = &pch_dev_ops_wpt, 362 }, 363 [board_skl] = { 364 .name = "pch_skylake", 365 .ops = &pch_dev_ops_wpt, 366 }, 367 [board_cnl] = { 368 .name = "pch_cannonlake", 369 .ops = &pch_dev_ops_wpt, 370 }, 371 [board_cml] = { 372 .name = "pch_cometlake", 373 .ops = &pch_dev_ops_wpt, 374 }, 375 [board_lwb] = { 376 .name = "pch_lewisburg", 377 .ops = &pch_dev_ops_wpt, 378 }, 379 }; 380 381 static int intel_pch_thermal_probe(struct pci_dev *pdev, 382 const struct pci_device_id *id) 383 { 384 enum board_ids board_id = id->driver_data; 385 const struct board_info *bi = &board_info[board_id]; 386 struct pch_thermal_device *ptd; 387 int err; 388 int nr_trips; 389 390 ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); 391 if (!ptd) 392 return -ENOMEM; 393 394 ptd->ops = bi->ops; 395 396 pci_set_drvdata(pdev, ptd); 397 ptd->pdev = pdev; 398 399 err = pci_enable_device(pdev); 400 if (err) { 401 dev_err(&pdev->dev, "failed to enable pci device\n"); 402 return err; 403 } 404 405 err = pci_request_regions(pdev, driver_name); 406 if (err) { 407 dev_err(&pdev->dev, "failed to request pci region\n"); 408 goto error_disable; 409 } 410 411 ptd->hw_base = pci_ioremap_bar(pdev, 0); 412 if (!ptd->hw_base) { 413 err = -ENOMEM; 414 dev_err(&pdev->dev, "failed to map mem base\n"); 415 goto error_release; 416 } 417 418 err = ptd->ops->hw_init(ptd, &nr_trips); 419 if (err) 420 goto error_cleanup; 421 422 ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd, 423 &tzd_ops, NULL, 0, 0); 424 if (IS_ERR(ptd->tzd)) { 425 dev_err(&pdev->dev, "Failed to register thermal zone %s\n", 426 bi->name); 427 err = PTR_ERR(ptd->tzd); 428 goto error_cleanup; 429 } 430 err = thermal_zone_device_enable(ptd->tzd); 431 if (err) 432 goto err_unregister; 433 434 return 0; 435 436 err_unregister: 437 thermal_zone_device_unregister(ptd->tzd); 438 error_cleanup: 439 iounmap(ptd->hw_base); 440 error_release: 441 pci_release_regions(pdev); 442 error_disable: 443 pci_disable_device(pdev); 444 dev_err(&pdev->dev, "pci device failed to probe\n"); 445 return err; 446 } 447 448 static void intel_pch_thermal_remove(struct pci_dev *pdev) 449 { 450 struct pch_thermal_device *ptd = pci_get_drvdata(pdev); 451 452 thermal_zone_device_unregister(ptd->tzd); 453 iounmap(ptd->hw_base); 454 pci_set_drvdata(pdev, NULL); 455 pci_release_regions(pdev); 456 pci_disable_device(pdev); 457 } 458 459 static int intel_pch_thermal_suspend(struct device *device) 460 { 461 struct pch_thermal_device *ptd = dev_get_drvdata(device); 462 463 return ptd->ops->suspend(ptd); 464 } 465 466 static int intel_pch_thermal_resume(struct device *device) 467 { 468 struct pch_thermal_device *ptd = dev_get_drvdata(device); 469 470 return ptd->ops->resume(ptd); 471 } 472 473 static const struct pci_device_id intel_pch_thermal_id[] = { 474 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), 475 .driver_data = board_hsw, }, 476 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), 477 .driver_data = board_hsw, }, 478 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), 479 .driver_data = board_wpt, }, 480 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), 481 .driver_data = board_skl, }, 482 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), 483 .driver_data = board_skl, }, 484 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), 485 .driver_data = board_cnl, }, 486 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), 487 .driver_data = board_cnl, }, 488 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP), 489 .driver_data = board_cnl, }, 490 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H), 491 .driver_data = board_cml, }, 492 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB), 493 .driver_data = board_lwb, }, 494 { 0, }, 495 }; 496 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); 497 498 static const struct dev_pm_ops intel_pch_pm_ops = { 499 .suspend = intel_pch_thermal_suspend, 500 .resume = intel_pch_thermal_resume, 501 }; 502 503 static struct pci_driver intel_pch_thermal_driver = { 504 .name = "intel_pch_thermal", 505 .id_table = intel_pch_thermal_id, 506 .probe = intel_pch_thermal_probe, 507 .remove = intel_pch_thermal_remove, 508 .driver.pm = &intel_pch_pm_ops, 509 }; 510 511 module_pci_driver(intel_pch_thermal_driver); 512 513 MODULE_LICENSE("GPL v2"); 514 MODULE_DESCRIPTION("Intel PCH Thermal driver"); 515