1 // SPDX-License-Identifier: GPL-2.0-only 2 /* intel_pch_thermal.c - Intel PCH Thermal driver 3 * 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * Authors: 7 * Tushar Dave <tushar.n.dave@intel.com> 8 */ 9 10 #include <linux/module.h> 11 #include <linux/types.h> 12 #include <linux/init.h> 13 #include <linux/pci.h> 14 #include <linux/acpi.h> 15 #include <linux/thermal.h> 16 #include <linux/pm.h> 17 18 /* Intel PCH thermal Device IDs */ 19 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ 20 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ 21 #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ 22 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ 23 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ 24 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ 25 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ 26 27 /* Wildcat Point-LP PCH Thermal registers */ 28 #define WPT_TEMP 0x0000 /* Temperature */ 29 #define WPT_TSC 0x04 /* Thermal Sensor Control */ 30 #define WPT_TSS 0x06 /* Thermal Sensor Status */ 31 #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ 32 #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ 33 #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ 34 #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ 35 #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ 36 #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ 37 #define WPT_TL 0x00000040 /* Throttle Value */ 38 #define WPT_PHL 0x0060 /* PCH Hot Level */ 39 #define WPT_PHLC 0x62 /* PHL Control */ 40 #define WPT_TAS 0x80 /* Thermal Alert Status */ 41 #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ 42 #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ 43 44 /* Wildcat Point-LP PCH Thermal Register bit definitions */ 45 #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ 46 #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ 47 #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ 48 #define WPT_TSS_GPES 0x08 /* GPE status */ 49 #define WPT_TSEL_ETS 0x01 /* Enable TS */ 50 #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ 51 #define WPT_TL_TOL 0x000001FF /* T0 Level */ 52 #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ 53 #define WPT_TL_TTEN 0x20000000 /* TT Enable */ 54 55 static char driver_name[] = "Intel PCH thermal driver"; 56 57 struct pch_thermal_device { 58 void __iomem *hw_base; 59 const struct pch_dev_ops *ops; 60 struct pci_dev *pdev; 61 struct thermal_zone_device *tzd; 62 int crt_trip_id; 63 unsigned long crt_temp; 64 int hot_trip_id; 65 unsigned long hot_temp; 66 int psv_trip_id; 67 unsigned long psv_temp; 68 bool bios_enabled; 69 }; 70 71 #ifdef CONFIG_ACPI 72 73 /* 74 * On some platforms, there is a companion ACPI device, which adds 75 * passive trip temperature using _PSV method. There is no specific 76 * passive temperature setting in MMIO interface of this PCI device. 77 */ 78 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 79 int *nr_trips) 80 { 81 struct acpi_device *adev; 82 83 ptd->psv_trip_id = -1; 84 85 adev = ACPI_COMPANION(&ptd->pdev->dev); 86 if (adev) { 87 unsigned long long r; 88 acpi_status status; 89 90 status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, 91 &r); 92 if (ACPI_SUCCESS(status)) { 93 unsigned long trip_temp; 94 95 trip_temp = DECI_KELVIN_TO_MILLICELSIUS(r); 96 if (trip_temp) { 97 ptd->psv_temp = trip_temp; 98 ptd->psv_trip_id = *nr_trips; 99 ++(*nr_trips); 100 } 101 } 102 } 103 } 104 #else 105 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 106 int *nr_trips) 107 { 108 ptd->psv_trip_id = -1; 109 110 } 111 #endif 112 113 static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) 114 { 115 u8 tsel; 116 u16 trip_temp; 117 118 *nr_trips = 0; 119 120 /* Check if BIOS has already enabled thermal sensor */ 121 if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { 122 ptd->bios_enabled = true; 123 goto read_trips; 124 } 125 126 tsel = readb(ptd->hw_base + WPT_TSEL); 127 /* 128 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. 129 * If so, thermal sensor cannot enable. Bail out. 130 */ 131 if (tsel & WPT_TSEL_PLDB) { 132 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 133 return -ENODEV; 134 } 135 136 writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 137 if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { 138 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 139 return -ENODEV; 140 } 141 142 read_trips: 143 ptd->crt_trip_id = -1; 144 trip_temp = readw(ptd->hw_base + WPT_CTT); 145 trip_temp &= 0x1FF; 146 if (trip_temp) { 147 /* Resolution of 1/2 degree C and an offset of -50C */ 148 ptd->crt_temp = trip_temp * 1000 / 2 - 50000; 149 ptd->crt_trip_id = 0; 150 ++(*nr_trips); 151 } 152 153 ptd->hot_trip_id = -1; 154 trip_temp = readw(ptd->hw_base + WPT_PHL); 155 trip_temp &= 0x1FF; 156 if (trip_temp) { 157 /* Resolution of 1/2 degree C and an offset of -50C */ 158 ptd->hot_temp = trip_temp * 1000 / 2 - 50000; 159 ptd->hot_trip_id = *nr_trips; 160 ++(*nr_trips); 161 } 162 163 pch_wpt_add_acpi_psv_trip(ptd, nr_trips); 164 165 return 0; 166 } 167 168 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) 169 { 170 u16 wpt_temp; 171 172 wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP); 173 174 /* Resolution of 1/2 degree C and an offset of -50C */ 175 *temp = (wpt_temp * 1000 / 2 - 50000); 176 177 return 0; 178 } 179 180 static int pch_wpt_suspend(struct pch_thermal_device *ptd) 181 { 182 u8 tsel; 183 184 if (ptd->bios_enabled) 185 return 0; 186 187 tsel = readb(ptd->hw_base + WPT_TSEL); 188 189 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); 190 191 return 0; 192 } 193 194 static int pch_wpt_resume(struct pch_thermal_device *ptd) 195 { 196 u8 tsel; 197 198 if (ptd->bios_enabled) 199 return 0; 200 201 tsel = readb(ptd->hw_base + WPT_TSEL); 202 203 writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 204 205 return 0; 206 } 207 208 struct pch_dev_ops { 209 int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); 210 int (*get_temp)(struct pch_thermal_device *ptd, int *temp); 211 int (*suspend)(struct pch_thermal_device *ptd); 212 int (*resume)(struct pch_thermal_device *ptd); 213 }; 214 215 216 /* dev ops for Wildcat Point */ 217 static const struct pch_dev_ops pch_dev_ops_wpt = { 218 .hw_init = pch_wpt_init, 219 .get_temp = pch_wpt_get_temp, 220 .suspend = pch_wpt_suspend, 221 .resume = pch_wpt_resume, 222 }; 223 224 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) 225 { 226 struct pch_thermal_device *ptd = tzd->devdata; 227 228 return ptd->ops->get_temp(ptd, temp); 229 } 230 231 static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip, 232 enum thermal_trip_type *type) 233 { 234 struct pch_thermal_device *ptd = tzd->devdata; 235 236 if (ptd->crt_trip_id == trip) 237 *type = THERMAL_TRIP_CRITICAL; 238 else if (ptd->hot_trip_id == trip) 239 *type = THERMAL_TRIP_HOT; 240 else if (ptd->psv_trip_id == trip) 241 *type = THERMAL_TRIP_PASSIVE; 242 else 243 return -EINVAL; 244 245 return 0; 246 } 247 248 static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp) 249 { 250 struct pch_thermal_device *ptd = tzd->devdata; 251 252 if (ptd->crt_trip_id == trip) 253 *temp = ptd->crt_temp; 254 else if (ptd->hot_trip_id == trip) 255 *temp = ptd->hot_temp; 256 else if (ptd->psv_trip_id == trip) 257 *temp = ptd->psv_temp; 258 else 259 return -EINVAL; 260 261 return 0; 262 } 263 264 static struct thermal_zone_device_ops tzd_ops = { 265 .get_temp = pch_thermal_get_temp, 266 .get_trip_type = pch_get_trip_type, 267 .get_trip_temp = pch_get_trip_temp, 268 }; 269 270 enum board_ids { 271 board_hsw, 272 board_wpt, 273 board_skl, 274 board_cnl, 275 }; 276 277 static const struct board_info { 278 const char *name; 279 const struct pch_dev_ops *ops; 280 } board_info[] = { 281 [board_hsw] = { 282 .name = "pch_haswell", 283 .ops = &pch_dev_ops_wpt, 284 }, 285 [board_wpt] = { 286 .name = "pch_wildcat_point", 287 .ops = &pch_dev_ops_wpt, 288 }, 289 [board_skl] = { 290 .name = "pch_skylake", 291 .ops = &pch_dev_ops_wpt, 292 }, 293 [board_cnl] = { 294 .name = "pch_cannonlake", 295 .ops = &pch_dev_ops_wpt, 296 }, 297 }; 298 299 static int intel_pch_thermal_probe(struct pci_dev *pdev, 300 const struct pci_device_id *id) 301 { 302 enum board_ids board_id = id->driver_data; 303 const struct board_info *bi = &board_info[board_id]; 304 struct pch_thermal_device *ptd; 305 int err; 306 int nr_trips; 307 308 ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); 309 if (!ptd) 310 return -ENOMEM; 311 312 ptd->ops = bi->ops; 313 314 pci_set_drvdata(pdev, ptd); 315 ptd->pdev = pdev; 316 317 err = pci_enable_device(pdev); 318 if (err) { 319 dev_err(&pdev->dev, "failed to enable pci device\n"); 320 return err; 321 } 322 323 err = pci_request_regions(pdev, driver_name); 324 if (err) { 325 dev_err(&pdev->dev, "failed to request pci region\n"); 326 goto error_disable; 327 } 328 329 ptd->hw_base = pci_ioremap_bar(pdev, 0); 330 if (!ptd->hw_base) { 331 err = -ENOMEM; 332 dev_err(&pdev->dev, "failed to map mem base\n"); 333 goto error_release; 334 } 335 336 err = ptd->ops->hw_init(ptd, &nr_trips); 337 if (err) 338 goto error_cleanup; 339 340 ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd, 341 &tzd_ops, NULL, 0, 0); 342 if (IS_ERR(ptd->tzd)) { 343 dev_err(&pdev->dev, "Failed to register thermal zone %s\n", 344 bi->name); 345 err = PTR_ERR(ptd->tzd); 346 goto error_cleanup; 347 } 348 349 return 0; 350 351 error_cleanup: 352 iounmap(ptd->hw_base); 353 error_release: 354 pci_release_regions(pdev); 355 error_disable: 356 pci_disable_device(pdev); 357 dev_err(&pdev->dev, "pci device failed to probe\n"); 358 return err; 359 } 360 361 static void intel_pch_thermal_remove(struct pci_dev *pdev) 362 { 363 struct pch_thermal_device *ptd = pci_get_drvdata(pdev); 364 365 thermal_zone_device_unregister(ptd->tzd); 366 iounmap(ptd->hw_base); 367 pci_set_drvdata(pdev, NULL); 368 pci_release_regions(pdev); 369 pci_disable_device(pdev); 370 } 371 372 static int intel_pch_thermal_suspend(struct device *device) 373 { 374 struct pch_thermal_device *ptd = dev_get_drvdata(device); 375 376 return ptd->ops->suspend(ptd); 377 } 378 379 static int intel_pch_thermal_resume(struct device *device) 380 { 381 struct pch_thermal_device *ptd = dev_get_drvdata(device); 382 383 return ptd->ops->resume(ptd); 384 } 385 386 static const struct pci_device_id intel_pch_thermal_id[] = { 387 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), 388 .driver_data = board_hsw, }, 389 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), 390 .driver_data = board_hsw, }, 391 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), 392 .driver_data = board_wpt, }, 393 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), 394 .driver_data = board_skl, }, 395 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), 396 .driver_data = board_skl, }, 397 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), 398 .driver_data = board_cnl, }, 399 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), 400 .driver_data = board_cnl, }, 401 { 0, }, 402 }; 403 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); 404 405 static const struct dev_pm_ops intel_pch_pm_ops = { 406 .suspend = intel_pch_thermal_suspend, 407 .resume = intel_pch_thermal_resume, 408 }; 409 410 static struct pci_driver intel_pch_thermal_driver = { 411 .name = "intel_pch_thermal", 412 .id_table = intel_pch_thermal_id, 413 .probe = intel_pch_thermal_probe, 414 .remove = intel_pch_thermal_remove, 415 .driver.pm = &intel_pch_pm_ops, 416 }; 417 418 module_pci_driver(intel_pch_thermal_driver); 419 420 MODULE_LICENSE("GPL v2"); 421 MODULE_DESCRIPTION("Intel PCH Thermal driver"); 422