1 // SPDX-License-Identifier: GPL-2.0-only 2 /* intel_pch_thermal.c - Intel PCH Thermal driver 3 * 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * Authors: 7 * Tushar Dave <tushar.n.dave@intel.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/delay.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/pm.h> 16 #include <linux/suspend.h> 17 #include <linux/thermal.h> 18 #include <linux/types.h> 19 #include <linux/units.h> 20 21 /* Intel PCH thermal Device IDs */ 22 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ 23 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ 24 #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ 25 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ 26 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ 27 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ 28 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ 29 #define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */ 30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */ 31 #define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */ 32 #define PCH_THERMAL_DID_WBG 0x8D24 /* Wellsburg PCH */ 33 34 /* Wildcat Point-LP PCH Thermal registers */ 35 #define WPT_TEMP 0x0000 /* Temperature */ 36 #define WPT_TSC 0x04 /* Thermal Sensor Control */ 37 #define WPT_TSS 0x06 /* Thermal Sensor Status */ 38 #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ 39 #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ 40 #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ 41 #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ 42 #define WPT_TSPM 0x001C /* Thermal Sensor Power Management */ 43 #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ 44 #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ 45 #define WPT_TL 0x00000040 /* Throttle Value */ 46 #define WPT_PHL 0x0060 /* PCH Hot Level */ 47 #define WPT_PHLC 0x62 /* PHL Control */ 48 #define WPT_TAS 0x80 /* Thermal Alert Status */ 49 #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ 50 #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ 51 52 /* Wildcat Point-LP PCH Thermal Register bit definitions */ 53 #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ 54 #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ 55 #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ 56 #define WPT_TSS_GPES 0x08 /* GPE status */ 57 #define WPT_TSEL_ETS 0x01 /* Enable TS */ 58 #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ 59 #define WPT_TL_TOL 0x000001FF /* T0 Level */ 60 #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ 61 #define WPT_TL_TTEN 0x20000000 /* TT Enable */ 62 63 /* Resolution of 1/2 degree C and an offset of -50C */ 64 #define PCH_TEMP_OFFSET (-50) 65 #define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET) 66 #define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE) 67 #define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET) 68 69 /* Amount of time for each cooling delay, 100ms by default for now */ 70 static unsigned int delay_timeout = 100; 71 module_param(delay_timeout, int, 0644); 72 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration."); 73 74 /* Number of iterations for cooling delay, 600 counts by default for now */ 75 static unsigned int delay_cnt = 600; 76 module_param(delay_cnt, int, 0644); 77 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay."); 78 79 static char driver_name[] = "Intel PCH thermal driver"; 80 81 struct pch_thermal_device { 82 void __iomem *hw_base; 83 const struct pch_dev_ops *ops; 84 struct pci_dev *pdev; 85 struct thermal_zone_device *tzd; 86 int crt_trip_id; 87 unsigned long crt_temp; 88 int hot_trip_id; 89 unsigned long hot_temp; 90 int psv_trip_id; 91 unsigned long psv_temp; 92 bool bios_enabled; 93 }; 94 95 #ifdef CONFIG_ACPI 96 97 /* 98 * On some platforms, there is a companion ACPI device, which adds 99 * passive trip temperature using _PSV method. There is no specific 100 * passive temperature setting in MMIO interface of this PCI device. 101 */ 102 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 103 int *nr_trips) 104 { 105 struct acpi_device *adev; 106 107 ptd->psv_trip_id = -1; 108 109 adev = ACPI_COMPANION(&ptd->pdev->dev); 110 if (adev) { 111 unsigned long long r; 112 acpi_status status; 113 114 status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, 115 &r); 116 if (ACPI_SUCCESS(status)) { 117 unsigned long trip_temp; 118 119 trip_temp = deci_kelvin_to_millicelsius(r); 120 if (trip_temp) { 121 ptd->psv_temp = trip_temp; 122 ptd->psv_trip_id = *nr_trips; 123 ++(*nr_trips); 124 } 125 } 126 } 127 } 128 #else 129 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, 130 int *nr_trips) 131 { 132 ptd->psv_trip_id = -1; 133 134 } 135 #endif 136 137 static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) 138 { 139 u8 tsel; 140 u16 trip_temp; 141 142 *nr_trips = 0; 143 144 /* Check if BIOS has already enabled thermal sensor */ 145 if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { 146 ptd->bios_enabled = true; 147 goto read_trips; 148 } 149 150 tsel = readb(ptd->hw_base + WPT_TSEL); 151 /* 152 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. 153 * If so, thermal sensor cannot enable. Bail out. 154 */ 155 if (tsel & WPT_TSEL_PLDB) { 156 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 157 return -ENODEV; 158 } 159 160 writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 161 if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { 162 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 163 return -ENODEV; 164 } 165 166 read_trips: 167 ptd->crt_trip_id = -1; 168 trip_temp = readw(ptd->hw_base + WPT_CTT); 169 trip_temp &= 0x1FF; 170 if (trip_temp) { 171 ptd->crt_temp = GET_WPT_TEMP(trip_temp); 172 ptd->crt_trip_id = 0; 173 ++(*nr_trips); 174 } 175 176 ptd->hot_trip_id = -1; 177 trip_temp = readw(ptd->hw_base + WPT_PHL); 178 trip_temp &= 0x1FF; 179 if (trip_temp) { 180 ptd->hot_temp = GET_WPT_TEMP(trip_temp); 181 ptd->hot_trip_id = *nr_trips; 182 ++(*nr_trips); 183 } 184 185 pch_wpt_add_acpi_psv_trip(ptd, nr_trips); 186 187 return 0; 188 } 189 190 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) 191 { 192 *temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 193 194 return 0; 195 } 196 197 /* Cool the PCH when it's overheat in .suspend_noirq phase */ 198 static int pch_wpt_suspend(struct pch_thermal_device *ptd) 199 { 200 u8 tsel; 201 int pch_delay_cnt = 0; 202 u16 pch_thr_temp, pch_cur_temp; 203 204 /* Shutdown the thermal sensor if it is not enabled by BIOS */ 205 if (!ptd->bios_enabled) { 206 tsel = readb(ptd->hw_base + WPT_TSEL); 207 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); 208 return 0; 209 } 210 211 /* Do not check temperature if it is not s2idle */ 212 if (pm_suspend_via_firmware()) 213 return 0; 214 215 /* Get the PCH temperature threshold value */ 216 pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM)); 217 218 /* Get the PCH current temperature value */ 219 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 220 221 /* 222 * If current PCH temperature is higher than configured PCH threshold 223 * value, run some delay loop with sleep to let the current temperature 224 * go down below the threshold value which helps to allow system enter 225 * lower power S0ix suspend state. Even after delay loop if PCH current 226 * temperature stays above threshold, notify the warning message 227 * which helps to indentify the reason why S0ix entry was rejected. 228 */ 229 while (pch_delay_cnt < delay_cnt) { 230 if (pch_cur_temp < pch_thr_temp) 231 break; 232 233 if (pm_wakeup_pending()) { 234 dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n"); 235 return 0; 236 } 237 238 pch_delay_cnt++; 239 dev_dbg(&ptd->pdev->dev, 240 "CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n", 241 pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout); 242 msleep(delay_timeout); 243 /* Read the PCH current temperature for next cycle. */ 244 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 245 } 246 247 if (pch_cur_temp >= pch_thr_temp) 248 dev_warn(&ptd->pdev->dev, 249 "CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n", 250 pch_cur_temp, pch_delay_cnt * delay_timeout); 251 else { 252 if (pch_delay_cnt) 253 dev_info(&ptd->pdev->dev, 254 "CPU-PCH is cool [%dC] after %d ms delay\n", 255 pch_cur_temp, pch_delay_cnt * delay_timeout); 256 else 257 dev_info(&ptd->pdev->dev, 258 "CPU-PCH is cool [%dC]\n", 259 pch_cur_temp); 260 } 261 262 return 0; 263 } 264 265 static int pch_wpt_resume(struct pch_thermal_device *ptd) 266 { 267 u8 tsel; 268 269 if (ptd->bios_enabled) 270 return 0; 271 272 tsel = readb(ptd->hw_base + WPT_TSEL); 273 274 writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 275 276 return 0; 277 } 278 279 struct pch_dev_ops { 280 int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); 281 int (*get_temp)(struct pch_thermal_device *ptd, int *temp); 282 int (*suspend)(struct pch_thermal_device *ptd); 283 int (*resume)(struct pch_thermal_device *ptd); 284 }; 285 286 287 /* dev ops for Wildcat Point */ 288 static const struct pch_dev_ops pch_dev_ops_wpt = { 289 .hw_init = pch_wpt_init, 290 .get_temp = pch_wpt_get_temp, 291 .suspend = pch_wpt_suspend, 292 .resume = pch_wpt_resume, 293 }; 294 295 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) 296 { 297 struct pch_thermal_device *ptd = tzd->devdata; 298 299 return ptd->ops->get_temp(ptd, temp); 300 } 301 302 static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip, 303 enum thermal_trip_type *type) 304 { 305 struct pch_thermal_device *ptd = tzd->devdata; 306 307 if (ptd->crt_trip_id == trip) 308 *type = THERMAL_TRIP_CRITICAL; 309 else if (ptd->hot_trip_id == trip) 310 *type = THERMAL_TRIP_HOT; 311 else if (ptd->psv_trip_id == trip) 312 *type = THERMAL_TRIP_PASSIVE; 313 else 314 return -EINVAL; 315 316 return 0; 317 } 318 319 static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp) 320 { 321 struct pch_thermal_device *ptd = tzd->devdata; 322 323 if (ptd->crt_trip_id == trip) 324 *temp = ptd->crt_temp; 325 else if (ptd->hot_trip_id == trip) 326 *temp = ptd->hot_temp; 327 else if (ptd->psv_trip_id == trip) 328 *temp = ptd->psv_temp; 329 else 330 return -EINVAL; 331 332 return 0; 333 } 334 335 static void pch_critical(struct thermal_zone_device *tzd) 336 { 337 dev_dbg(&tzd->device, "%s: critical temperature reached\n", tzd->type); 338 } 339 340 static struct thermal_zone_device_ops tzd_ops = { 341 .get_temp = pch_thermal_get_temp, 342 .get_trip_type = pch_get_trip_type, 343 .get_trip_temp = pch_get_trip_temp, 344 .critical = pch_critical, 345 }; 346 347 enum board_ids { 348 board_hsw, 349 board_wpt, 350 board_skl, 351 board_cnl, 352 board_cml, 353 board_lwb, 354 board_wbg, 355 }; 356 357 static const struct board_info { 358 const char *name; 359 const struct pch_dev_ops *ops; 360 } board_info[] = { 361 [board_hsw] = { 362 .name = "pch_haswell", 363 .ops = &pch_dev_ops_wpt, 364 }, 365 [board_wpt] = { 366 .name = "pch_wildcat_point", 367 .ops = &pch_dev_ops_wpt, 368 }, 369 [board_skl] = { 370 .name = "pch_skylake", 371 .ops = &pch_dev_ops_wpt, 372 }, 373 [board_cnl] = { 374 .name = "pch_cannonlake", 375 .ops = &pch_dev_ops_wpt, 376 }, 377 [board_cml] = { 378 .name = "pch_cometlake", 379 .ops = &pch_dev_ops_wpt, 380 }, 381 [board_lwb] = { 382 .name = "pch_lewisburg", 383 .ops = &pch_dev_ops_wpt, 384 }, 385 [board_wbg] = { 386 .name = "pch_wellsburg", 387 .ops = &pch_dev_ops_wpt, 388 }, 389 }; 390 391 static int intel_pch_thermal_probe(struct pci_dev *pdev, 392 const struct pci_device_id *id) 393 { 394 enum board_ids board_id = id->driver_data; 395 const struct board_info *bi = &board_info[board_id]; 396 struct pch_thermal_device *ptd; 397 int err; 398 int nr_trips; 399 400 ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); 401 if (!ptd) 402 return -ENOMEM; 403 404 ptd->ops = bi->ops; 405 406 pci_set_drvdata(pdev, ptd); 407 ptd->pdev = pdev; 408 409 err = pci_enable_device(pdev); 410 if (err) { 411 dev_err(&pdev->dev, "failed to enable pci device\n"); 412 return err; 413 } 414 415 err = pci_request_regions(pdev, driver_name); 416 if (err) { 417 dev_err(&pdev->dev, "failed to request pci region\n"); 418 goto error_disable; 419 } 420 421 ptd->hw_base = pci_ioremap_bar(pdev, 0); 422 if (!ptd->hw_base) { 423 err = -ENOMEM; 424 dev_err(&pdev->dev, "failed to map mem base\n"); 425 goto error_release; 426 } 427 428 err = ptd->ops->hw_init(ptd, &nr_trips); 429 if (err) 430 goto error_cleanup; 431 432 ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd, 433 &tzd_ops, NULL, 0, 0); 434 if (IS_ERR(ptd->tzd)) { 435 dev_err(&pdev->dev, "Failed to register thermal zone %s\n", 436 bi->name); 437 err = PTR_ERR(ptd->tzd); 438 goto error_cleanup; 439 } 440 err = thermal_zone_device_enable(ptd->tzd); 441 if (err) 442 goto err_unregister; 443 444 return 0; 445 446 err_unregister: 447 thermal_zone_device_unregister(ptd->tzd); 448 error_cleanup: 449 iounmap(ptd->hw_base); 450 error_release: 451 pci_release_regions(pdev); 452 error_disable: 453 pci_disable_device(pdev); 454 dev_err(&pdev->dev, "pci device failed to probe\n"); 455 return err; 456 } 457 458 static void intel_pch_thermal_remove(struct pci_dev *pdev) 459 { 460 struct pch_thermal_device *ptd = pci_get_drvdata(pdev); 461 462 thermal_zone_device_unregister(ptd->tzd); 463 iounmap(ptd->hw_base); 464 pci_set_drvdata(pdev, NULL); 465 pci_release_regions(pdev); 466 pci_disable_device(pdev); 467 } 468 469 static int intel_pch_thermal_suspend_noirq(struct device *device) 470 { 471 struct pch_thermal_device *ptd = dev_get_drvdata(device); 472 473 return ptd->ops->suspend(ptd); 474 } 475 476 static int intel_pch_thermal_resume(struct device *device) 477 { 478 struct pch_thermal_device *ptd = dev_get_drvdata(device); 479 480 return ptd->ops->resume(ptd); 481 } 482 483 static const struct pci_device_id intel_pch_thermal_id[] = { 484 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), 485 .driver_data = board_hsw, }, 486 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), 487 .driver_data = board_hsw, }, 488 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), 489 .driver_data = board_wpt, }, 490 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), 491 .driver_data = board_skl, }, 492 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), 493 .driver_data = board_skl, }, 494 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), 495 .driver_data = board_cnl, }, 496 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), 497 .driver_data = board_cnl, }, 498 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP), 499 .driver_data = board_cnl, }, 500 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H), 501 .driver_data = board_cml, }, 502 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB), 503 .driver_data = board_lwb, }, 504 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG), 505 .driver_data = board_wbg, }, 506 { 0, }, 507 }; 508 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); 509 510 static const struct dev_pm_ops intel_pch_pm_ops = { 511 .suspend_noirq = intel_pch_thermal_suspend_noirq, 512 .resume = intel_pch_thermal_resume, 513 }; 514 515 static struct pci_driver intel_pch_thermal_driver = { 516 .name = "intel_pch_thermal", 517 .id_table = intel_pch_thermal_id, 518 .probe = intel_pch_thermal_probe, 519 .remove = intel_pch_thermal_remove, 520 .driver.pm = &intel_pch_pm_ops, 521 }; 522 523 module_pci_driver(intel_pch_thermal_driver); 524 525 MODULE_LICENSE("GPL v2"); 526 MODULE_DESCRIPTION("Intel PCH Thermal driver"); 527