1 // SPDX-License-Identifier: GPL-2.0-only 2 /* intel_pch_thermal.c - Intel PCH Thermal driver 3 * 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * Authors: 7 * Tushar Dave <tushar.n.dave@intel.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/delay.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/pm.h> 16 #include <linux/suspend.h> 17 #include <linux/thermal.h> 18 #include <linux/types.h> 19 #include <linux/units.h> 20 21 /* Intel PCH thermal Device IDs */ 22 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ 23 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ 24 #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ 25 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ 26 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ 27 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ 28 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ 29 #define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */ 30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */ 31 #define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */ 32 #define PCH_THERMAL_DID_WBG 0x8D24 /* Wellsburg PCH */ 33 34 /* Wildcat Point-LP PCH Thermal registers */ 35 #define WPT_TEMP 0x0000 /* Temperature */ 36 #define WPT_TSC 0x04 /* Thermal Sensor Control */ 37 #define WPT_TSS 0x06 /* Thermal Sensor Status */ 38 #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ 39 #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ 40 #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ 41 #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ 42 #define WPT_TSPM 0x001C /* Thermal Sensor Power Management */ 43 #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ 44 #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ 45 #define WPT_TL 0x00000040 /* Throttle Value */ 46 #define WPT_PHL 0x0060 /* PCH Hot Level */ 47 #define WPT_PHLC 0x62 /* PHL Control */ 48 #define WPT_TAS 0x80 /* Thermal Alert Status */ 49 #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ 50 #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ 51 52 /* Wildcat Point-LP PCH Thermal Register bit definitions */ 53 #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ 54 #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ 55 #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ 56 #define WPT_TSS_GPES 0x08 /* GPE status */ 57 #define WPT_TSEL_ETS 0x01 /* Enable TS */ 58 #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ 59 #define WPT_TL_TOL 0x000001FF /* T0 Level */ 60 #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ 61 #define WPT_TL_TTEN 0x20000000 /* TT Enable */ 62 63 /* Resolution of 1/2 degree C and an offset of -50C */ 64 #define PCH_TEMP_OFFSET (-50) 65 #define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET) 66 #define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE) 67 #define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET) 68 69 #define PCH_MAX_TRIPS 3 /* critical, hot, passive */ 70 71 /* Amount of time for each cooling delay, 100ms by default for now */ 72 static unsigned int delay_timeout = 100; 73 module_param(delay_timeout, int, 0644); 74 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration."); 75 76 /* Number of iterations for cooling delay, 600 counts by default for now */ 77 static unsigned int delay_cnt = 600; 78 module_param(delay_cnt, int, 0644); 79 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay."); 80 81 static char driver_name[] = "Intel PCH thermal driver"; 82 83 struct pch_thermal_device { 84 void __iomem *hw_base; 85 const struct pch_dev_ops *ops; 86 struct pci_dev *pdev; 87 struct thermal_zone_device *tzd; 88 struct thermal_trip trips[PCH_MAX_TRIPS]; 89 bool bios_enabled; 90 }; 91 92 #ifdef CONFIG_ACPI 93 /* 94 * On some platforms, there is a companion ACPI device, which adds 95 * passive trip temperature using _PSV method. There is no specific 96 * passive temperature setting in MMIO interface of this PCI device. 97 */ 98 static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, int trip) 99 { 100 struct acpi_device *adev; 101 int temp; 102 103 adev = ACPI_COMPANION(&ptd->pdev->dev); 104 if (!adev) 105 return 0; 106 107 if (thermal_acpi_passive_trip_temp(adev, &temp) || temp <= 0) 108 return 0; 109 110 ptd->trips[trip].type = THERMAL_TRIP_PASSIVE; 111 ptd->trips[trip].temperature = temp; 112 return 1; 113 } 114 #else 115 static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, int trip) 116 { 117 return 0; 118 } 119 #endif 120 121 static int pch_hw_init(struct pch_thermal_device *ptd) 122 { 123 int nr_trips = 0; 124 u16 trip_temp; 125 u8 tsel; 126 127 /* Check if BIOS has already enabled thermal sensor */ 128 if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { 129 ptd->bios_enabled = true; 130 goto read_trips; 131 } 132 133 tsel = readb(ptd->hw_base + WPT_TSEL); 134 /* 135 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. 136 * If so, thermal sensor cannot enable. Bail out. 137 */ 138 if (tsel & WPT_TSEL_PLDB) { 139 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 140 return -ENODEV; 141 } 142 143 writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 144 if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { 145 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); 146 return -ENODEV; 147 } 148 149 read_trips: 150 trip_temp = readw(ptd->hw_base + WPT_CTT); 151 trip_temp &= 0x1FF; 152 if (trip_temp) { 153 ptd->trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp); 154 ptd->trips[nr_trips++].type = THERMAL_TRIP_CRITICAL; 155 } 156 157 trip_temp = readw(ptd->hw_base + WPT_PHL); 158 trip_temp &= 0x1FF; 159 if (trip_temp) { 160 ptd->trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp); 161 ptd->trips[nr_trips++].type = THERMAL_TRIP_HOT; 162 } 163 164 return nr_trips + pch_wpt_add_acpi_psv_trip(ptd, nr_trips); 165 } 166 167 static int pch_get_temp(struct pch_thermal_device *ptd) 168 { 169 return GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 170 } 171 172 /* Cool the PCH when it's overheat in .suspend_noirq phase */ 173 static int pch_suspend(struct pch_thermal_device *ptd) 174 { 175 u8 tsel; 176 int pch_delay_cnt = 0; 177 u16 pch_thr_temp, pch_cur_temp; 178 179 /* Shutdown the thermal sensor if it is not enabled by BIOS */ 180 if (!ptd->bios_enabled) { 181 tsel = readb(ptd->hw_base + WPT_TSEL); 182 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); 183 return 0; 184 } 185 186 /* Do not check temperature if it is not s2idle */ 187 if (pm_suspend_via_firmware()) 188 return 0; 189 190 /* Get the PCH temperature threshold value */ 191 pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM)); 192 193 /* Get the PCH current temperature value */ 194 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 195 196 /* 197 * If current PCH temperature is higher than configured PCH threshold 198 * value, run some delay loop with sleep to let the current temperature 199 * go down below the threshold value which helps to allow system enter 200 * lower power S0ix suspend state. Even after delay loop if PCH current 201 * temperature stays above threshold, notify the warning message 202 * which helps to indentify the reason why S0ix entry was rejected. 203 */ 204 while (pch_delay_cnt < delay_cnt) { 205 if (pch_cur_temp < pch_thr_temp) 206 break; 207 208 if (pm_wakeup_pending()) { 209 dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n"); 210 return 0; 211 } 212 213 pch_delay_cnt++; 214 dev_dbg(&ptd->pdev->dev, 215 "CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n", 216 pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout); 217 msleep(delay_timeout); 218 /* Read the PCH current temperature for next cycle. */ 219 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP)); 220 } 221 222 if (pch_cur_temp >= pch_thr_temp) 223 dev_warn(&ptd->pdev->dev, 224 "CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n", 225 pch_cur_temp, pch_delay_cnt * delay_timeout); 226 else { 227 if (pch_delay_cnt) 228 dev_info(&ptd->pdev->dev, 229 "CPU-PCH is cool [%dC] after %d ms delay\n", 230 pch_cur_temp, pch_delay_cnt * delay_timeout); 231 else 232 dev_info(&ptd->pdev->dev, 233 "CPU-PCH is cool [%dC]\n", 234 pch_cur_temp); 235 } 236 237 return 0; 238 } 239 240 static int pch_resume(struct pch_thermal_device *ptd) 241 { 242 u8 tsel; 243 244 if (ptd->bios_enabled) 245 return 0; 246 247 tsel = readb(ptd->hw_base + WPT_TSEL); 248 249 writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); 250 251 return 0; 252 } 253 254 struct pch_dev_ops { 255 int (*hw_init)(struct pch_thermal_device *ptd); 256 int (*get_temp)(struct pch_thermal_device *ptd); 257 int (*suspend)(struct pch_thermal_device *ptd); 258 int (*resume)(struct pch_thermal_device *ptd); 259 }; 260 261 static const struct pch_dev_ops pch_dev_ops = { 262 .hw_init = pch_hw_init, 263 .get_temp = pch_get_temp, 264 .suspend = pch_suspend, 265 .resume = pch_resume, 266 }; 267 268 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) 269 { 270 struct pch_thermal_device *ptd = tzd->devdata; 271 272 *temp = ptd->ops->get_temp(ptd); 273 return 0; 274 } 275 276 static void pch_critical(struct thermal_zone_device *tzd) 277 { 278 dev_dbg(&tzd->device, "%s: critical temperature reached\n", tzd->type); 279 } 280 281 static struct thermal_zone_device_ops tzd_ops = { 282 .get_temp = pch_thermal_get_temp, 283 .critical = pch_critical, 284 }; 285 286 enum board_ids { 287 board_hsw, 288 board_wpt, 289 board_skl, 290 board_cnl, 291 board_cml, 292 board_lwb, 293 board_wbg, 294 }; 295 296 static const struct board_info { 297 const char *name; 298 const struct pch_dev_ops *ops; 299 } board_info[] = { 300 [board_hsw] = { 301 .name = "pch_haswell", 302 .ops = &pch_dev_ops, 303 }, 304 [board_wpt] = { 305 .name = "pch_wildcat_point", 306 .ops = &pch_dev_ops, 307 }, 308 [board_skl] = { 309 .name = "pch_skylake", 310 .ops = &pch_dev_ops, 311 }, 312 [board_cnl] = { 313 .name = "pch_cannonlake", 314 .ops = &pch_dev_ops, 315 }, 316 [board_cml] = { 317 .name = "pch_cometlake", 318 .ops = &pch_dev_ops, 319 }, 320 [board_lwb] = { 321 .name = "pch_lewisburg", 322 .ops = &pch_dev_ops, 323 }, 324 [board_wbg] = { 325 .name = "pch_wellsburg", 326 .ops = &pch_dev_ops, 327 }, 328 }; 329 330 static int intel_pch_thermal_probe(struct pci_dev *pdev, 331 const struct pci_device_id *id) 332 { 333 enum board_ids board_id = id->driver_data; 334 const struct board_info *bi = &board_info[board_id]; 335 struct pch_thermal_device *ptd; 336 int err; 337 int nr_trips; 338 339 ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); 340 if (!ptd) 341 return -ENOMEM; 342 343 ptd->ops = bi->ops; 344 345 pci_set_drvdata(pdev, ptd); 346 ptd->pdev = pdev; 347 348 err = pci_enable_device(pdev); 349 if (err) { 350 dev_err(&pdev->dev, "failed to enable pci device\n"); 351 return err; 352 } 353 354 err = pci_request_regions(pdev, driver_name); 355 if (err) { 356 dev_err(&pdev->dev, "failed to request pci region\n"); 357 goto error_disable; 358 } 359 360 ptd->hw_base = pci_ioremap_bar(pdev, 0); 361 if (!ptd->hw_base) { 362 err = -ENOMEM; 363 dev_err(&pdev->dev, "failed to map mem base\n"); 364 goto error_release; 365 } 366 367 nr_trips = ptd->ops->hw_init(ptd); 368 if (nr_trips < 0) { 369 err = nr_trips; 370 goto error_cleanup; 371 } 372 373 ptd->tzd = thermal_zone_device_register_with_trips(bi->name, ptd->trips, 374 nr_trips, 0, ptd, 375 &tzd_ops, NULL, 0, 0); 376 if (IS_ERR(ptd->tzd)) { 377 dev_err(&pdev->dev, "Failed to register thermal zone %s\n", 378 bi->name); 379 err = PTR_ERR(ptd->tzd); 380 goto error_cleanup; 381 } 382 err = thermal_zone_device_enable(ptd->tzd); 383 if (err) 384 goto err_unregister; 385 386 return 0; 387 388 err_unregister: 389 thermal_zone_device_unregister(ptd->tzd); 390 error_cleanup: 391 iounmap(ptd->hw_base); 392 error_release: 393 pci_release_regions(pdev); 394 error_disable: 395 pci_disable_device(pdev); 396 dev_err(&pdev->dev, "pci device failed to probe\n"); 397 return err; 398 } 399 400 static void intel_pch_thermal_remove(struct pci_dev *pdev) 401 { 402 struct pch_thermal_device *ptd = pci_get_drvdata(pdev); 403 404 thermal_zone_device_unregister(ptd->tzd); 405 iounmap(ptd->hw_base); 406 pci_set_drvdata(pdev, NULL); 407 pci_release_regions(pdev); 408 pci_disable_device(pdev); 409 } 410 411 static int intel_pch_thermal_suspend_noirq(struct device *device) 412 { 413 struct pch_thermal_device *ptd = dev_get_drvdata(device); 414 415 return ptd->ops->suspend(ptd); 416 } 417 418 static int intel_pch_thermal_resume(struct device *device) 419 { 420 struct pch_thermal_device *ptd = dev_get_drvdata(device); 421 422 return ptd->ops->resume(ptd); 423 } 424 425 static const struct pci_device_id intel_pch_thermal_id[] = { 426 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), 427 .driver_data = board_hsw, }, 428 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), 429 .driver_data = board_hsw, }, 430 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), 431 .driver_data = board_wpt, }, 432 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), 433 .driver_data = board_skl, }, 434 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), 435 .driver_data = board_skl, }, 436 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), 437 .driver_data = board_cnl, }, 438 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), 439 .driver_data = board_cnl, }, 440 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP), 441 .driver_data = board_cnl, }, 442 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H), 443 .driver_data = board_cml, }, 444 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB), 445 .driver_data = board_lwb, }, 446 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG), 447 .driver_data = board_wbg, }, 448 { 0, }, 449 }; 450 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); 451 452 static const struct dev_pm_ops intel_pch_pm_ops = { 453 .suspend_noirq = intel_pch_thermal_suspend_noirq, 454 .resume = intel_pch_thermal_resume, 455 }; 456 457 static struct pci_driver intel_pch_thermal_driver = { 458 .name = "intel_pch_thermal", 459 .id_table = intel_pch_thermal_id, 460 .probe = intel_pch_thermal_probe, 461 .remove = intel_pch_thermal_remove, 462 .driver.pm = &intel_pch_pm_ops, 463 }; 464 465 module_pci_driver(intel_pch_thermal_driver); 466 467 MODULE_LICENSE("GPL v2"); 468 MODULE_DESCRIPTION("Intel PCH Thermal driver"); 469