1 /* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * 16 * File: mac.h 17 * 18 * Purpose: MAC routines 19 * 20 * Author: Tevin Chen 21 * 22 * Date: May 21, 1996 23 * 24 * Revision History: 25 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. 26 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53. 27 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD 28 */ 29 30 #ifndef __MAC_H__ 31 #define __MAC_H__ 32 33 #include "device.h" 34 35 #define REV_ID_VT3253_A0 0x00 36 #define REV_ID_VT3253_A1 0x01 37 #define REV_ID_VT3253_B0 0x08 38 #define REV_ID_VT3253_B1 0x09 39 40 /* Registers in the MAC */ 41 #define MAC_REG_BISTCMD 0x04 42 #define MAC_REG_BISTSR0 0x05 43 #define MAC_REG_BISTSR1 0x06 44 #define MAC_REG_BISTSR2 0x07 45 #define MAC_REG_I2MCSR 0x08 46 #define MAC_REG_I2MTGID 0x09 47 #define MAC_REG_I2MTGAD 0x0a 48 #define MAC_REG_I2MCFG 0x0b 49 #define MAC_REG_I2MDIPT 0x0c 50 #define MAC_REG_I2MDOPT 0x0e 51 #define MAC_REG_USBSUS 0x0f 52 53 #define MAC_REG_LOCALID 0x14 54 #define MAC_REG_TESTCFG 0x15 55 #define MAC_REG_JUMPER0 0x16 56 #define MAC_REG_JUMPER1 0x17 57 #define MAC_REG_TMCTL 0x18 58 #define MAC_REG_TMDATA0 0x1c 59 #define MAC_REG_TMDATA1 0x1d 60 #define MAC_REG_TMDATA2 0x1e 61 #define MAC_REG_TMDATA3 0x1f 62 63 /* MAC Parameter related */ 64 #define MAC_REG_LRT 0x20 65 #define MAC_REG_SRT 0x21 66 #define MAC_REG_SIFS 0x22 67 #define MAC_REG_DIFS 0x23 68 #define MAC_REG_EIFS 0x24 69 #define MAC_REG_SLOT 0x25 70 #define MAC_REG_BI 0x26 71 #define MAC_REG_CWMAXMIN0 0x28 72 #define MAC_REG_LINKOFFTOTM 0x2a 73 #define MAC_REG_SWTMOT 0x2b 74 #define MAC_REG_RTSOKCNT 0x2c 75 #define MAC_REG_RTSFAILCNT 0x2d 76 #define MAC_REG_ACKFAILCNT 0x2e 77 #define MAC_REG_FCSERRCNT 0x2f 78 79 /* TSF Related */ 80 #define MAC_REG_TSFCNTR 0x30 81 #define MAC_REG_NEXTTBTT 0x38 82 #define MAC_REG_TSFOFST 0x40 83 #define MAC_REG_TFTCTL 0x48 84 85 /* WMAC Control/Status Related */ 86 #define MAC_REG_ENCFG0 0x4c 87 #define MAC_REG_ENCFG1 0x4d 88 #define MAC_REG_ENCFG2 0x4e 89 90 #define MAC_REG_CFG 0x50 91 #define MAC_REG_TEST 0x52 92 #define MAC_REG_HOSTCR 0x54 93 #define MAC_REG_MACCR 0x55 94 #define MAC_REG_RCR 0x56 95 #define MAC_REG_TCR 0x57 96 #define MAC_REG_IMR 0x58 97 #define MAC_REG_ISR 0x5c 98 #define MAC_REG_ISR1 0x5d 99 100 /* Power Saving Related */ 101 #define MAC_REG_PSCFG 0x60 102 #define MAC_REG_PSCTL 0x61 103 #define MAC_REG_PSPWRSIG 0x62 104 #define MAC_REG_BBCR13 0x63 105 #define MAC_REG_AIDATIM 0x64 106 #define MAC_REG_PWBT 0x66 107 #define MAC_REG_WAKEOKTMR 0x68 108 #define MAC_REG_CALTMR 0x69 109 #define MAC_REG_SYNSPACCNT 0x6a 110 #define MAC_REG_WAKSYNOPT 0x6b 111 112 /* Baseband/IF Control Group */ 113 #define MAC_REG_BBREGCTL 0x6c 114 #define MAC_REG_CHANNEL 0x6d 115 #define MAC_REG_BBREGADR 0x6e 116 #define MAC_REG_BBREGDATA 0x6f 117 #define MAC_REG_IFREGCTL 0x70 118 #define MAC_REG_IFDATA 0x71 119 #define MAC_REG_ITRTMSET 0x74 120 #define MAC_REG_PAPEDELAY 0x77 121 #define MAC_REG_SOFTPWRCTL 0x78 122 #define MAC_REG_SOFTPWRCTL2 0x79 123 #define MAC_REG_GPIOCTL0 0x7a 124 #define MAC_REG_GPIOCTL1 0x7b 125 126 /* MiscFF PIO related */ 127 #define MAC_REG_MISCFFNDEX 0xbc 128 #define MAC_REG_MISCFFCTL 0xbe 129 #define MAC_REG_MISCFFDATA 0xc0 130 131 /* MAC Configuration Group */ 132 #define MAC_REG_PAR0 0xc4 133 #define MAC_REG_PAR4 0xc8 134 #define MAC_REG_BSSID0 0xcc 135 #define MAC_REG_BSSID4 0xd0 136 #define MAC_REG_MAR0 0xd4 137 #define MAC_REG_MAR4 0xd8 138 139 /* MAC RSPPKT INFO Group */ 140 #define MAC_REG_RSPINF_B_1 0xdC 141 #define MAC_REG_RSPINF_B_2 0xe0 142 #define MAC_REG_RSPINF_B_5 0xe4 143 #define MAC_REG_RSPINF_B_11 0xe8 144 #define MAC_REG_RSPINF_A_6 0xec 145 #define MAC_REG_RSPINF_A_9 0xee 146 #define MAC_REG_RSPINF_A_12 0xf0 147 #define MAC_REG_RSPINF_A_18 0xf2 148 #define MAC_REG_RSPINF_A_24 0xf4 149 #define MAC_REG_RSPINF_A_36 0xf6 150 #define MAC_REG_RSPINF_A_48 0xf8 151 #define MAC_REG_RSPINF_A_54 0xfa 152 #define MAC_REG_RSPINF_A_72 0xfc 153 154 /* Bits in the I2MCFG EEPROM register */ 155 #define I2MCFG_BOUNDCTL 0x80 156 #define I2MCFG_WAITCTL 0x20 157 #define I2MCFG_SCLOECTL 0x10 158 #define I2MCFG_WBUSYCTL 0x08 159 #define I2MCFG_NORETRY 0x04 160 #define I2MCFG_I2MLDSEQ 0x02 161 #define I2MCFG_I2CMFAST 0x01 162 163 /* Bits in the I2MCSR EEPROM register */ 164 #define I2MCSR_EEMW 0x80 165 #define I2MCSR_EEMR 0x40 166 #define I2MCSR_AUTOLD 0x08 167 #define I2MCSR_NACK 0x02 168 #define I2MCSR_DONE 0x01 169 170 /* Bits in the TMCTL register */ 171 #define TMCTL_TSUSP 0x04 172 #define TMCTL_TMD 0x02 173 #define TMCTL_TE 0x01 174 175 /* Bits in the TFTCTL register */ 176 #define TFTCTL_HWUTSF 0x80 177 #define TFTCTL_TBTTSYNC 0x40 178 #define TFTCTL_HWUTSFEN 0x20 179 #define TFTCTL_TSFCNTRRD 0x10 180 #define TFTCTL_TBTTSYNCEN 0x08 181 #define TFTCTL_TSFSYNCEN 0x04 182 #define TFTCTL_TSFCNTRST 0x02 183 #define TFTCTL_TSFCNTREN 0x01 184 185 /* Bits in the EnhanceCFG_0 register */ 186 #define EnCFG_BBType_a 0x00 187 #define EnCFG_BBType_b 0x01 188 #define EnCFG_BBType_g 0x02 189 #define EnCFG_BBType_MASK 0x03 190 #define EnCFG_ProtectMd 0x20 191 192 /* Bits in the EnhanceCFG_1 register */ 193 #define EnCFG_BcnSusInd 0x01 194 #define EnCFG_BcnSusClr 0x02 195 196 /* Bits in the EnhanceCFG_2 register */ 197 #define EnCFG_NXTBTTCFPSTR 0x01 198 #define EnCFG_BarkerPream 0x02 199 #define EnCFG_PktBurstMode 0x04 200 201 /* Bits in the CFG register */ 202 #define CFG_TKIPOPT 0x80 203 #define CFG_RXDMAOPT 0x40 204 #define CFG_TMOT_SW 0x20 205 #define CFG_TMOT_HWLONG 0x10 206 #define CFG_TMOT_HW 0x00 207 #define CFG_CFPENDOPT 0x08 208 #define CFG_BCNSUSEN 0x04 209 #define CFG_NOTXTIMEOUT 0x02 210 #define CFG_NOBUFOPT 0x01 211 212 /* Bits in the TEST register */ 213 #define TEST_LBEXT 0x80 214 #define TEST_LBINT 0x40 215 #define TEST_LBNONE 0x00 216 #define TEST_SOFTINT 0x20 217 #define TEST_CONTTX 0x10 218 #define TEST_TXPE 0x08 219 #define TEST_NAVDIS 0x04 220 #define TEST_NOCTS 0x02 221 #define TEST_NOACK 0x01 222 223 /* Bits in the HOSTCR register */ 224 #define HOSTCR_TXONST 0x80 225 #define HOSTCR_RXONST 0x40 226 #define HOSTCR_ADHOC 0x20 227 #define HOSTCR_AP 0x10 228 #define HOSTCR_TXON 0x08 229 #define HOSTCR_RXON 0x04 230 #define HOSTCR_MACEN 0x02 231 #define HOSTCR_SOFTRST 0x01 232 233 /* Bits in the MACCR register */ 234 #define MACCR_SYNCFLUSHOK 0x04 235 #define MACCR_SYNCFLUSH 0x02 236 #define MACCR_CLRNAV 0x01 237 238 /* Bits in the RCR register */ 239 #define RCR_SSID 0x80 240 #define RCR_RXALLTYPE 0x40 241 #define RCR_UNICAST 0x20 242 #define RCR_BROADCAST 0x10 243 #define RCR_MULTICAST 0x08 244 #define RCR_WPAERR 0x04 245 #define RCR_ERRCRC 0x02 246 #define RCR_BSSID 0x01 247 248 /* Bits in the TCR register */ 249 #define TCR_SYNCDCFOPT 0x02 250 #define TCR_AUTOBCNTX 0x01 251 252 /* ISR1 */ 253 #define ISR_GPIO3 0x40 254 #define ISR_RXNOBUF 0x08 255 #define ISR_MIBNEARFULL 0x04 256 #define ISR_SOFTINT 0x02 257 #define ISR_FETALERR 0x01 258 259 #define LEDSTS_STS 0x06 260 #define LEDSTS_TMLEN 0x78 261 #define LEDSTS_OFF 0x00 262 #define LEDSTS_ON 0x02 263 #define LEDSTS_SLOW 0x04 264 #define LEDSTS_INTER 0x06 265 266 /* ISR0 */ 267 #define ISR_WATCHDOG 0x80 268 #define ISR_SOFTTIMER 0x40 269 #define ISR_GPIO0 0x20 270 #define ISR_TBTT 0x10 271 #define ISR_RXDMA0 0x08 272 #define ISR_BNTX 0x04 273 #define ISR_ACTX 0x01 274 275 /* Bits in the PSCFG register */ 276 #define PSCFG_PHILIPMD 0x40 277 #define PSCFG_WAKECALEN 0x20 278 #define PSCFG_WAKETMREN 0x10 279 #define PSCFG_BBPSPROG 0x08 280 #define PSCFG_WAKESYN 0x04 281 #define PSCFG_SLEEPSYN 0x02 282 #define PSCFG_AUTOSLEEP 0x01 283 284 /* Bits in the PSCTL register */ 285 #define PSCTL_WAKEDONE 0x20 286 #define PSCTL_PS 0x10 287 #define PSCTL_GO2DOZE 0x08 288 #define PSCTL_LNBCN 0x04 289 #define PSCTL_ALBCN 0x02 290 #define PSCTL_PSEN 0x01 291 292 /* Bits in the PSPWSIG register */ 293 #define PSSIG_WPE3 0x80 294 #define PSSIG_WPE2 0x40 295 #define PSSIG_WPE1 0x20 296 #define PSSIG_WRADIOPE 0x10 297 #define PSSIG_SPE3 0x08 298 #define PSSIG_SPE2 0x04 299 #define PSSIG_SPE1 0x02 300 #define PSSIG_SRADIOPE 0x01 301 302 /* Bits in the BBREGCTL register */ 303 #define BBREGCTL_DONE 0x04 304 #define BBREGCTL_REGR 0x02 305 #define BBREGCTL_REGW 0x01 306 307 /* Bits in the IFREGCTL register */ 308 #define IFREGCTL_DONE 0x04 309 #define IFREGCTL_IFRF 0x02 310 #define IFREGCTL_REGW 0x01 311 312 /* Bits in the SOFTPWRCTL register */ 313 #define SOFTPWRCTL_RFLEOPT 0x08 314 #define SOFTPWRCTL_TXPEINV 0x02 315 #define SOFTPWRCTL_SWPECTI 0x01 316 #define SOFTPWRCTL_SWPAPE 0x20 317 #define SOFTPWRCTL_SWCALEN 0x10 318 #define SOFTPWRCTL_SWRADIO_PE 0x08 319 #define SOFTPWRCTL_SWPE2 0x04 320 #define SOFTPWRCTL_SWPE1 0x02 321 #define SOFTPWRCTL_SWPE3 0x01 322 323 /* Bits in the GPIOCTL1 register */ 324 #define GPIO3_MD 0x20 325 #define GPIO3_DATA 0x40 326 #define GPIO3_INTMD 0x80 327 328 /* Bits in the MISCFFCTL register */ 329 #define MISCFFCTL_WRITE 0x0001 330 331 /* Loopback mode */ 332 #define MAC_LB_EXT 0x02 333 #define MAC_LB_INTERNAL 0x01 334 #define MAC_LB_NONE 0x00 335 336 /* Ethernet address filter type */ 337 #define PKT_TYPE_NONE 0x00 /* turn off receiver */ 338 #define PKT_TYPE_ALL_MULTICAST 0x80 339 #define PKT_TYPE_PROMISCUOUS 0x40 340 #define PKT_TYPE_DIRECTED 0x20 /* obselete */ 341 #define PKT_TYPE_BROADCAST 0x10 342 #define PKT_TYPE_MULTICAST 0x08 343 #define PKT_TYPE_ERROR_WPA 0x04 344 #define PKT_TYPE_ERROR_CRC 0x02 345 #define PKT_TYPE_BSSID 0x01 346 347 #define Default_BI 0x200 348 349 /* MiscFIFO Offset */ 350 #define MISCFIFO_KEYETRY0 32 351 #define MISCFIFO_KEYENTRYSIZE 22 352 353 #define MAC_REVISION_A0 0x00 354 #define MAC_REVISION_A1 0x01 355 356 struct vnt_mac_set_key { 357 union { 358 struct { 359 u8 addr[ETH_ALEN]; 360 __le16 key_ctl; 361 } write __packed; 362 u32 swap[2]; 363 } u; 364 u8 key[WLAN_KEY_LEN_CCMP]; 365 } __packed; 366 367 void vnt_mac_set_filter(struct vnt_private *, u64); 368 void vnt_mac_shutdown(struct vnt_private *); 369 void vnt_mac_set_bb_type(struct vnt_private *, u8); 370 void vnt_mac_disable_keyentry(struct vnt_private *, u8); 371 void vnt_mac_set_keyentry(struct vnt_private *, u16, u32, u32, u8 *, u8 *); 372 void vnt_mac_reg_bits_off(struct vnt_private *, u8, u8); 373 void vnt_mac_reg_bits_on(struct vnt_private *, u8, u8); 374 void vnt_mac_write_word(struct vnt_private *, u8, u16); 375 void vnt_mac_set_bssid_addr(struct vnt_private *, u8 *); 376 void vnt_mac_enable_protect_mode(struct vnt_private *); 377 void vnt_mac_disable_protect_mode(struct vnt_private *); 378 void vnt_mac_enable_barker_preamble_mode(struct vnt_private *); 379 void vnt_mac_disable_barker_preamble_mode(struct vnt_private *); 380 void vnt_mac_set_beacon_interval(struct vnt_private *, u16); 381 void vnt_mac_set_led(struct vnt_private *priv, u8, u8); 382 383 #endif /* __MAC_H__ */ 384