1 /* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * File: device_main.c 20 * 21 * Purpose: driver entry for initial, open, close, tx and rx. 22 * 23 * Author: Lyndon Chen 24 * 25 * Date: Jan 8, 2003 26 * 27 * Functions: 28 * 29 * vt6655_probe - module initial (insmod) driver entry 30 * vt6655_remove - module remove entry 31 * device_free_info - device structure resource free function 32 * device_print_info - print out resource 33 * device_rx_srv - rx service function 34 * device_alloc_rx_buf - rx buffer pre-allocated function 35 * device_free_tx_buf - free tx buffer function 36 * device_init_rd0_ring- initial rd dma0 ring 37 * device_init_rd1_ring- initial rd dma1 ring 38 * device_init_td0_ring- initial tx dma0 ring buffer 39 * device_init_td1_ring- initial tx dma1 ring buffer 40 * device_init_registers- initial MAC & BBP & RF internal registers. 41 * device_init_rings- initial tx/rx ring buffer 42 * device_free_rings- free all allocated ring buffer 43 * device_tx_srv- tx interrupt service function 44 * 45 * Revision History: 46 */ 47 #undef __NO_VERSION__ 48 49 #include <linux/file.h> 50 #include "device.h" 51 #include "card.h" 52 #include "channel.h" 53 #include "baseband.h" 54 #include "mac.h" 55 #include "power.h" 56 #include "rxtx.h" 57 #include "dpc.h" 58 #include "rf.h" 59 #include <linux/delay.h> 60 #include <linux/kthread.h> 61 #include <linux/slab.h> 62 63 /*--------------------- Static Definitions -------------------------*/ 64 /* 65 * Define module options 66 */ 67 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>"); 68 MODULE_LICENSE("GPL"); 69 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver"); 70 71 #define DEVICE_PARAM(N, D) 72 73 #define RX_DESC_MIN0 16 74 #define RX_DESC_MAX0 128 75 #define RX_DESC_DEF0 32 76 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0"); 77 78 #define RX_DESC_MIN1 16 79 #define RX_DESC_MAX1 128 80 #define RX_DESC_DEF1 32 81 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1"); 82 83 #define TX_DESC_MIN0 16 84 #define TX_DESC_MAX0 128 85 #define TX_DESC_DEF0 32 86 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0"); 87 88 #define TX_DESC_MIN1 16 89 #define TX_DESC_MAX1 128 90 #define TX_DESC_DEF1 64 91 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1"); 92 93 #define INT_WORKS_DEF 20 94 #define INT_WORKS_MIN 10 95 #define INT_WORKS_MAX 64 96 97 DEVICE_PARAM(int_works, "Number of packets per interrupt services"); 98 99 #define RTS_THRESH_DEF 2347 100 101 #define FRAG_THRESH_DEF 2346 102 103 #define SHORT_RETRY_MIN 0 104 #define SHORT_RETRY_MAX 31 105 #define SHORT_RETRY_DEF 8 106 107 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits"); 108 109 #define LONG_RETRY_MIN 0 110 #define LONG_RETRY_MAX 15 111 #define LONG_RETRY_DEF 4 112 113 DEVICE_PARAM(LongRetryLimit, "long frame retry limits"); 114 115 /* BasebandType[] baseband type selected 116 0: indicate 802.11a type 117 1: indicate 802.11b type 118 2: indicate 802.11g type 119 */ 120 #define BBP_TYPE_MIN 0 121 #define BBP_TYPE_MAX 2 122 #define BBP_TYPE_DEF 2 123 124 DEVICE_PARAM(BasebandType, "baseband type"); 125 126 /* 127 * Static vars definitions 128 */ 129 static const struct pci_device_id vt6655_pci_id_table[] = { 130 { PCI_VDEVICE(VIA, 0x3253) }, 131 { 0, } 132 }; 133 134 /*--------------------- Static Functions --------------------------*/ 135 136 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent); 137 static void device_free_info(struct vnt_private *priv); 138 static void device_print_info(struct vnt_private *priv); 139 140 static void device_init_rd0_ring(struct vnt_private *priv); 141 static void device_init_rd1_ring(struct vnt_private *priv); 142 static void device_init_td0_ring(struct vnt_private *priv); 143 static void device_init_td1_ring(struct vnt_private *priv); 144 145 static int device_rx_srv(struct vnt_private *priv, unsigned int idx); 146 static int device_tx_srv(struct vnt_private *priv, unsigned int idx); 147 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *); 148 static void device_init_registers(struct vnt_private *priv); 149 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *); 150 static void device_free_td0_ring(struct vnt_private *priv); 151 static void device_free_td1_ring(struct vnt_private *priv); 152 static void device_free_rd0_ring(struct vnt_private *priv); 153 static void device_free_rd1_ring(struct vnt_private *priv); 154 static void device_free_rings(struct vnt_private *priv); 155 156 /*--------------------- Export Variables --------------------------*/ 157 158 /*--------------------- Export Functions --------------------------*/ 159 160 static void vt6655_remove(struct pci_dev *pcid) 161 { 162 struct vnt_private *priv = pci_get_drvdata(pcid); 163 164 if (priv == NULL) 165 return; 166 device_free_info(priv); 167 } 168 169 static void device_get_options(struct vnt_private *priv) 170 { 171 struct vnt_options *opts = &priv->opts; 172 173 opts->rx_descs0 = RX_DESC_DEF0; 174 opts->rx_descs1 = RX_DESC_DEF1; 175 opts->tx_descs[0] = TX_DESC_DEF0; 176 opts->tx_descs[1] = TX_DESC_DEF1; 177 opts->int_works = INT_WORKS_DEF; 178 179 opts->short_retry = SHORT_RETRY_DEF; 180 opts->long_retry = LONG_RETRY_DEF; 181 opts->bbp_type = BBP_TYPE_DEF; 182 } 183 184 static void 185 device_set_options(struct vnt_private *priv) 186 { 187 priv->byShortRetryLimit = priv->opts.short_retry; 188 priv->byLongRetryLimit = priv->opts.long_retry; 189 priv->byBBType = priv->opts.bbp_type; 190 priv->byPacketType = priv->byBBType; 191 priv->byAutoFBCtrl = AUTO_FB_0; 192 priv->bUpdateBBVGA = true; 193 priv->byPreambleType = 0; 194 195 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit); 196 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit); 197 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType); 198 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble); 199 pr_debug(" byBBType= %d\n", (int)priv->byBBType); 200 } 201 202 /* 203 * Initialisation of MAC & BBP registers 204 */ 205 206 static void device_init_registers(struct vnt_private *priv) 207 { 208 unsigned long flags; 209 unsigned int ii; 210 unsigned char byValue; 211 unsigned char byCCKPwrdBm = 0; 212 unsigned char byOFDMPwrdBm = 0; 213 214 MACbShutdown(priv); 215 BBvSoftwareReset(priv); 216 217 /* Do MACbSoftwareReset in MACvInitialize */ 218 MACbSoftwareReset(priv); 219 220 priv->bAES = false; 221 222 /* Only used in 11g type, sync with ERP IE */ 223 priv->bProtectMode = false; 224 225 priv->bNonERPPresent = false; 226 priv->bBarkerPreambleMd = false; 227 priv->wCurrentRate = RATE_1M; 228 priv->byTopOFDMBasicRate = RATE_24M; 229 priv->byTopCCKBasicRate = RATE_1M; 230 231 /* init MAC */ 232 MACvInitialize(priv); 233 234 /* Get Local ID */ 235 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID); 236 237 spin_lock_irqsave(&priv->lock, flags); 238 239 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM); 240 241 spin_unlock_irqrestore(&priv->lock, flags); 242 243 /* Get Channel range */ 244 priv->byMinChannel = 1; 245 priv->byMaxChannel = CB_MAX_CHANNEL; 246 247 /* Get Antena */ 248 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA); 249 if (byValue & EEP_ANTINV) 250 priv->bTxRxAntInv = true; 251 else 252 priv->bTxRxAntInv = false; 253 254 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN); 255 /* if not set default is All */ 256 if (byValue == 0) 257 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN); 258 259 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) { 260 priv->byAntennaCount = 2; 261 priv->byTxAntennaMode = ANT_B; 262 priv->dwTxAntennaSel = 1; 263 priv->dwRxAntennaSel = 1; 264 265 if (priv->bTxRxAntInv) 266 priv->byRxAntennaMode = ANT_A; 267 else 268 priv->byRxAntennaMode = ANT_B; 269 } else { 270 priv->byAntennaCount = 1; 271 priv->dwTxAntennaSel = 0; 272 priv->dwRxAntennaSel = 0; 273 274 if (byValue & EEP_ANTENNA_AUX) { 275 priv->byTxAntennaMode = ANT_A; 276 277 if (priv->bTxRxAntInv) 278 priv->byRxAntennaMode = ANT_B; 279 else 280 priv->byRxAntennaMode = ANT_A; 281 } else { 282 priv->byTxAntennaMode = ANT_B; 283 284 if (priv->bTxRxAntInv) 285 priv->byRxAntennaMode = ANT_A; 286 else 287 priv->byRxAntennaMode = ANT_B; 288 } 289 } 290 291 /* Set initial antenna mode */ 292 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode); 293 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode); 294 295 /* zonetype initial */ 296 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE]; 297 298 if (!priv->bZoneRegExist) 299 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE]; 300 301 pr_debug("priv->byZoneType = %x\n", priv->byZoneType); 302 303 /* Init RF module */ 304 RFbInit(priv); 305 306 /* Get Desire Power Value */ 307 priv->byCurPwr = 0xFF; 308 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK); 309 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_OFDMG); 310 311 /* Load power Table */ 312 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) { 313 priv->abyCCKPwrTbl[ii + 1] = 314 SROMbyReadEmbedded(priv->PortOffset, 315 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL)); 316 if (priv->abyCCKPwrTbl[ii + 1] == 0) 317 priv->abyCCKPwrTbl[ii+1] = priv->byCCKPwr; 318 319 priv->abyOFDMPwrTbl[ii + 1] = 320 SROMbyReadEmbedded(priv->PortOffset, 321 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL)); 322 if (priv->abyOFDMPwrTbl[ii + 1] == 0) 323 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG; 324 325 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm; 326 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm; 327 } 328 329 /* recover 12,13 ,14channel for EUROPE by 11 channel */ 330 for (ii = 11; ii < 14; ii++) { 331 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10]; 332 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10]; 333 } 334 335 /* Load OFDM A Power Table */ 336 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) { 337 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] = 338 SROMbyReadEmbedded(priv->PortOffset, 339 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL)); 340 341 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] = 342 SROMbyReadEmbedded(priv->PortOffset, 343 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm)); 344 } 345 346 if (priv->byLocalID > REV_ID_VT3253_B1) { 347 MACvSelectPage1(priv->PortOffset); 348 349 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1, 350 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN)); 351 352 MACvSelectPage0(priv->PortOffset); 353 } 354 355 /* use relative tx timeout and 802.11i D4 */ 356 MACvWordRegBitsOn(priv->PortOffset, 357 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT)); 358 359 /* set performance parameter by registry */ 360 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit); 361 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit); 362 363 /* reset TSF counter */ 364 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 365 /* enable TSF counter */ 366 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 367 368 /* initialize BBP registers */ 369 BBbVT3253Init(priv); 370 371 if (priv->bUpdateBBVGA) { 372 priv->byBBVGACurrent = priv->abyBBVGA[0]; 373 priv->byBBVGANew = priv->byBBVGACurrent; 374 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]); 375 } 376 377 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode); 378 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode); 379 380 /* Set BB and packet type at the same time. */ 381 /* Set Short Slot Time, xIFS, and RSPINF. */ 382 priv->wCurrentRate = RATE_54M; 383 384 priv->bRadioOff = false; 385 386 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset, 387 EEP_OFS_RADIOCTL); 388 priv->bHWRadioOff = false; 389 390 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) { 391 /* Get GPIO */ 392 MACvGPIOIn(priv->PortOffset, &priv->byGPIO); 393 394 if (((priv->byGPIO & GPIO0_DATA) && 395 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) || 396 (!(priv->byGPIO & GPIO0_DATA) && 397 (priv->byRadioCtl & EEP_RADIOCTL_INV))) 398 priv->bHWRadioOff = true; 399 } 400 401 if (priv->bHWRadioOff || priv->bRadioControlOff) 402 CARDbRadioPowerOff(priv); 403 404 /* get Permanent network address */ 405 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 406 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr); 407 408 /* reset Tx pointer */ 409 CARDvSafeResetRx(priv); 410 /* reset Rx pointer */ 411 CARDvSafeResetTx(priv); 412 413 if (priv->byLocalID <= REV_ID_VT3253_A1) 414 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR); 415 416 /* Turn On Rx DMA */ 417 MACvReceive0(priv->PortOffset); 418 MACvReceive1(priv->PortOffset); 419 420 /* start the adapter */ 421 MACvStart(priv->PortOffset); 422 } 423 424 static void device_print_info(struct vnt_private *priv) 425 { 426 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n", 427 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr, 428 (unsigned long)priv->PortOffset, priv->pcid->irq); 429 } 430 431 static void device_free_info(struct vnt_private *priv) 432 { 433 if (!priv) 434 return; 435 436 if (priv->mac_hw) 437 ieee80211_unregister_hw(priv->hw); 438 439 if (priv->PortOffset) 440 iounmap(priv->PortOffset); 441 442 if (priv->pcid) 443 pci_release_regions(priv->pcid); 444 445 if (priv->hw) 446 ieee80211_free_hw(priv->hw); 447 } 448 449 static bool device_init_rings(struct vnt_private *priv) 450 { 451 void *vir_pool; 452 453 /*allocate all RD/TD rings a single pool*/ 454 vir_pool = dma_zalloc_coherent(&priv->pcid->dev, 455 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + 456 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + 457 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + 458 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), 459 &priv->pool_dma, GFP_ATOMIC); 460 if (vir_pool == NULL) { 461 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n"); 462 return false; 463 } 464 465 priv->aRD0Ring = vir_pool; 466 priv->aRD1Ring = vir_pool + 467 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc); 468 469 priv->rd0_pool_dma = priv->pool_dma; 470 priv->rd1_pool_dma = priv->rd0_pool_dma + 471 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc); 472 473 priv->tx0_bufs = dma_zalloc_coherent(&priv->pcid->dev, 474 priv->opts.tx_descs[0] * PKT_BUF_SZ + 475 priv->opts.tx_descs[1] * PKT_BUF_SZ + 476 CB_BEACON_BUF_SIZE + 477 CB_MAX_BUF_SIZE, 478 &priv->tx_bufs_dma0, 479 GFP_ATOMIC); 480 if (priv->tx0_bufs == NULL) { 481 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n"); 482 483 dma_free_coherent(&priv->pcid->dev, 484 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + 485 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + 486 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + 487 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), 488 vir_pool, priv->pool_dma); 489 return false; 490 } 491 492 priv->td0_pool_dma = priv->rd1_pool_dma + 493 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc); 494 495 priv->td1_pool_dma = priv->td0_pool_dma + 496 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc); 497 498 /* vir_pool: pvoid type */ 499 priv->apTD0Rings = vir_pool 500 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) 501 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc); 502 503 priv->apTD1Rings = vir_pool 504 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) 505 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) 506 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc); 507 508 priv->tx1_bufs = priv->tx0_bufs + 509 priv->opts.tx_descs[0] * PKT_BUF_SZ; 510 511 priv->tx_beacon_bufs = priv->tx1_bufs + 512 priv->opts.tx_descs[1] * PKT_BUF_SZ; 513 514 priv->pbyTmpBuff = priv->tx_beacon_bufs + 515 CB_BEACON_BUF_SIZE; 516 517 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 + 518 priv->opts.tx_descs[0] * PKT_BUF_SZ; 519 520 priv->tx_beacon_dma = priv->tx_bufs_dma1 + 521 priv->opts.tx_descs[1] * PKT_BUF_SZ; 522 523 return true; 524 } 525 526 static void device_free_rings(struct vnt_private *priv) 527 { 528 dma_free_coherent(&priv->pcid->dev, 529 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + 530 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + 531 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + 532 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), 533 priv->aRD0Ring, priv->pool_dma); 534 535 if (priv->tx0_bufs) 536 dma_free_coherent(&priv->pcid->dev, 537 priv->opts.tx_descs[0] * PKT_BUF_SZ + 538 priv->opts.tx_descs[1] * PKT_BUF_SZ + 539 CB_BEACON_BUF_SIZE + 540 CB_MAX_BUF_SIZE, 541 priv->tx0_bufs, priv->tx_bufs_dma0); 542 } 543 544 static void device_init_rd0_ring(struct vnt_private *priv) 545 { 546 int i; 547 dma_addr_t curr = priv->rd0_pool_dma; 548 struct vnt_rx_desc *desc; 549 550 /* Init the RD0 ring entries */ 551 for (i = 0; i < priv->opts.rx_descs0; 552 i ++, curr += sizeof(struct vnt_rx_desc)) { 553 desc = &priv->aRD0Ring[i]; 554 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_ATOMIC); 555 556 if (!device_alloc_rx_buf(priv, desc)) 557 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n"); 558 559 desc->next = &(priv->aRD0Ring[(i+1) % priv->opts.rx_descs0]); 560 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc)); 561 } 562 563 if (i > 0) 564 priv->aRD0Ring[i-1].next_desc = cpu_to_le32(priv->rd0_pool_dma); 565 priv->pCurrRD[0] = &priv->aRD0Ring[0]; 566 } 567 568 static void device_init_rd1_ring(struct vnt_private *priv) 569 { 570 int i; 571 dma_addr_t curr = priv->rd1_pool_dma; 572 struct vnt_rx_desc *desc; 573 574 /* Init the RD1 ring entries */ 575 for (i = 0; i < priv->opts.rx_descs1; 576 i ++, curr += sizeof(struct vnt_rx_desc)) { 577 desc = &priv->aRD1Ring[i]; 578 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_ATOMIC); 579 580 if (!device_alloc_rx_buf(priv, desc)) 581 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n"); 582 583 desc->next = &(priv->aRD1Ring[(i+1) % priv->opts.rx_descs1]); 584 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc)); 585 } 586 587 if (i > 0) 588 priv->aRD1Ring[i-1].next_desc = cpu_to_le32(priv->rd1_pool_dma); 589 priv->pCurrRD[1] = &priv->aRD1Ring[0]; 590 } 591 592 static void device_free_rd0_ring(struct vnt_private *priv) 593 { 594 int i; 595 596 for (i = 0; i < priv->opts.rx_descs0; i++) { 597 struct vnt_rx_desc *desc = &(priv->aRD0Ring[i]); 598 struct vnt_rd_info *rd_info = desc->rd_info; 599 600 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma, 601 priv->rx_buf_sz, DMA_FROM_DEVICE); 602 603 dev_kfree_skb(rd_info->skb); 604 605 kfree(desc->rd_info); 606 } 607 } 608 609 static void device_free_rd1_ring(struct vnt_private *priv) 610 { 611 int i; 612 613 for (i = 0; i < priv->opts.rx_descs1; i++) { 614 struct vnt_rx_desc *desc = &priv->aRD1Ring[i]; 615 struct vnt_rd_info *rd_info = desc->rd_info; 616 617 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma, 618 priv->rx_buf_sz, DMA_FROM_DEVICE); 619 620 dev_kfree_skb(rd_info->skb); 621 622 kfree(desc->rd_info); 623 } 624 } 625 626 static void device_init_td0_ring(struct vnt_private *priv) 627 { 628 int i; 629 dma_addr_t curr; 630 struct vnt_tx_desc *desc; 631 632 curr = priv->td0_pool_dma; 633 for (i = 0; i < priv->opts.tx_descs[0]; 634 i++, curr += sizeof(struct vnt_tx_desc)) { 635 desc = &priv->apTD0Rings[i]; 636 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_ATOMIC); 637 638 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ; 639 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ; 640 641 desc->next = &(priv->apTD0Rings[(i+1) % priv->opts.tx_descs[0]]); 642 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc)); 643 } 644 645 if (i > 0) 646 priv->apTD0Rings[i-1].next_desc = cpu_to_le32(priv->td0_pool_dma); 647 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0]; 648 } 649 650 static void device_init_td1_ring(struct vnt_private *priv) 651 { 652 int i; 653 dma_addr_t curr; 654 struct vnt_tx_desc *desc; 655 656 /* Init the TD ring entries */ 657 curr = priv->td1_pool_dma; 658 for (i = 0; i < priv->opts.tx_descs[1]; 659 i++, curr += sizeof(struct vnt_tx_desc)) { 660 desc = &priv->apTD1Rings[i]; 661 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_ATOMIC); 662 663 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ; 664 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ; 665 666 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]); 667 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc)); 668 } 669 670 if (i > 0) 671 priv->apTD1Rings[i-1].next_desc = cpu_to_le32(priv->td1_pool_dma); 672 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0]; 673 } 674 675 static void device_free_td0_ring(struct vnt_private *priv) 676 { 677 int i; 678 679 for (i = 0; i < priv->opts.tx_descs[0]; i++) { 680 struct vnt_tx_desc *desc = &priv->apTD0Rings[i]; 681 struct vnt_td_info *td_info = desc->td_info; 682 683 dev_kfree_skb(td_info->skb); 684 kfree(desc->td_info); 685 } 686 } 687 688 static void device_free_td1_ring(struct vnt_private *priv) 689 { 690 int i; 691 692 for (i = 0; i < priv->opts.tx_descs[1]; i++) { 693 struct vnt_tx_desc *desc = &priv->apTD1Rings[i]; 694 struct vnt_td_info *td_info = desc->td_info; 695 696 dev_kfree_skb(td_info->skb); 697 kfree(desc->td_info); 698 } 699 } 700 701 /*-----------------------------------------------------------------*/ 702 703 static int device_rx_srv(struct vnt_private *priv, unsigned int idx) 704 { 705 struct vnt_rx_desc *rd; 706 int works = 0; 707 708 for (rd = priv->pCurrRD[idx]; 709 rd->rd0.owner == OWNED_BY_HOST; 710 rd = rd->next) { 711 if (works++ > 15) 712 break; 713 714 if (!rd->rd_info->skb) 715 break; 716 717 if (vnt_receive_frame(priv, rd)) { 718 if (!device_alloc_rx_buf(priv, rd)) { 719 dev_err(&priv->pcid->dev, 720 "can not allocate rx buf\n"); 721 break; 722 } 723 } 724 rd->rd0.owner = OWNED_BY_NIC; 725 } 726 727 priv->pCurrRD[idx] = rd; 728 729 return works; 730 } 731 732 static bool device_alloc_rx_buf(struct vnt_private *priv, 733 struct vnt_rx_desc *rd) 734 { 735 struct vnt_rd_info *rd_info = rd->rd_info; 736 737 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz); 738 if (rd_info->skb == NULL) 739 return false; 740 741 rd_info->skb_dma = 742 dma_map_single(&priv->pcid->dev, 743 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)), 744 priv->rx_buf_sz, DMA_FROM_DEVICE); 745 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) { 746 dev_kfree_skb(rd_info->skb); 747 rd_info->skb = NULL; 748 return false; 749 } 750 751 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */ 752 753 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz); 754 rd->rd0.owner = OWNED_BY_NIC; 755 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz); 756 rd->buff_addr = cpu_to_le32(rd_info->skb_dma); 757 758 return true; 759 } 760 761 static const u8 fallback_rate0[5][5] = { 762 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M}, 763 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M}, 764 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M}, 765 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M}, 766 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M} 767 }; 768 769 static const u8 fallback_rate1[5][5] = { 770 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M}, 771 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M}, 772 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M}, 773 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M}, 774 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M} 775 }; 776 777 static int vnt_int_report_rate(struct vnt_private *priv, 778 struct vnt_td_info *context, u8 tsr0, u8 tsr1) 779 { 780 struct vnt_tx_fifo_head *fifo_head; 781 struct ieee80211_tx_info *info; 782 struct ieee80211_rate *rate; 783 u16 fb_option; 784 u8 tx_retry = (tsr0 & TSR0_NCR); 785 s8 idx; 786 787 if (!context) 788 return -ENOMEM; 789 790 if (!context->skb) 791 return -EINVAL; 792 793 fifo_head = (struct vnt_tx_fifo_head *)context->buf; 794 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) & 795 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1)); 796 797 info = IEEE80211_SKB_CB(context->skb); 798 idx = info->control.rates[0].idx; 799 800 if (fb_option && !(tsr1 & TSR1_TERR)) { 801 u8 tx_rate; 802 u8 retry = tx_retry; 803 804 rate = ieee80211_get_tx_rate(priv->hw, info); 805 tx_rate = rate->hw_value - RATE_18M; 806 807 if (retry > 4) 808 retry = 4; 809 810 if (fb_option & FIFOCTL_AUTO_FB_0) 811 tx_rate = fallback_rate0[tx_rate][retry]; 812 else if (fb_option & FIFOCTL_AUTO_FB_1) 813 tx_rate = fallback_rate1[tx_rate][retry]; 814 815 if (info->band == NL80211_BAND_5GHZ) 816 idx = tx_rate - RATE_6M; 817 else 818 idx = tx_rate; 819 } 820 821 ieee80211_tx_info_clear_status(info); 822 823 info->status.rates[0].count = tx_retry; 824 825 if (!(tsr1 & TSR1_TERR)) { 826 info->status.rates[0].idx = idx; 827 828 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 829 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 830 else 831 info->flags |= IEEE80211_TX_STAT_ACK; 832 } 833 834 return 0; 835 } 836 837 static int device_tx_srv(struct vnt_private *priv, unsigned int idx) 838 { 839 struct vnt_tx_desc *desc; 840 int works = 0; 841 unsigned char byTsr0; 842 unsigned char byTsr1; 843 844 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) { 845 if (desc->td0.owner == OWNED_BY_NIC) 846 break; 847 if (works++ > 15) 848 break; 849 850 byTsr0 = desc->td0.tsr0; 851 byTsr1 = desc->td0.tsr1; 852 853 /* Only the status of first TD in the chain is correct */ 854 if (desc->td1.tcr & TCR_STP) { 855 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) { 856 if (!(byTsr1 & TSR1_TERR)) { 857 if (byTsr0 != 0) { 858 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n", 859 (int)idx, byTsr1, 860 byTsr0); 861 } 862 } else { 863 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n", 864 (int)idx, byTsr1, byTsr0); 865 } 866 } 867 868 if (byTsr1 & TSR1_TERR) { 869 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) { 870 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n", 871 (int)idx, byTsr1, byTsr0); 872 } 873 } 874 875 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1); 876 877 device_free_tx_buf(priv, desc); 878 priv->iTDUsed[idx]--; 879 } 880 } 881 882 priv->apTailTD[idx] = desc; 883 884 return works; 885 } 886 887 static void device_error(struct vnt_private *priv, unsigned short status) 888 { 889 if (status & ISR_FETALERR) { 890 dev_err(&priv->pcid->dev, "Hardware fatal error\n"); 891 892 MACbShutdown(priv); 893 return; 894 } 895 } 896 897 static void device_free_tx_buf(struct vnt_private *priv, 898 struct vnt_tx_desc *desc) 899 { 900 struct vnt_td_info *td_info = desc->td_info; 901 struct sk_buff *skb = td_info->skb; 902 903 if (skb) 904 ieee80211_tx_status_irqsafe(priv->hw, skb); 905 906 td_info->skb = NULL; 907 td_info->flags = 0; 908 } 909 910 static void vnt_check_bb_vga(struct vnt_private *priv) 911 { 912 long dbm; 913 int i; 914 915 if (!priv->bUpdateBBVGA) 916 return; 917 918 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 919 return; 920 921 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI)) 922 return; 923 924 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm); 925 926 for (i = 0; i < BB_VGA_LEVEL; i++) { 927 if (dbm < priv->ldBmThreshold[i]) { 928 priv->byBBVGANew = priv->abyBBVGA[i]; 929 break; 930 } 931 } 932 933 if (priv->byBBVGANew == priv->byBBVGACurrent) { 934 priv->uBBVGADiffCount = 1; 935 return; 936 } 937 938 priv->uBBVGADiffCount++; 939 940 if (priv->uBBVGADiffCount == 1) { 941 /* first VGA diff gain */ 942 BBvSetVGAGainOffset(priv, priv->byBBVGANew); 943 944 dev_dbg(&priv->pcid->dev, 945 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", 946 (int)dbm, priv->byBBVGANew, 947 priv->byBBVGACurrent, 948 (int)priv->uBBVGADiffCount); 949 } 950 951 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) { 952 dev_dbg(&priv->pcid->dev, 953 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", 954 (int)dbm, priv->byBBVGANew, 955 priv->byBBVGACurrent, 956 (int)priv->uBBVGADiffCount); 957 958 BBvSetVGAGainOffset(priv, priv->byBBVGANew); 959 } 960 } 961 962 static void vnt_interrupt_process(struct vnt_private *priv) 963 { 964 struct ieee80211_low_level_stats *low_stats = &priv->low_stats; 965 int max_count = 0; 966 u32 mib_counter; 967 u32 isr; 968 unsigned long flags; 969 970 MACvReadISR(priv->PortOffset, &isr); 971 972 if (isr == 0) 973 return; 974 975 if (isr == 0xffffffff) { 976 pr_debug("isr = 0xffff\n"); 977 return; 978 } 979 980 MACvIntDisable(priv->PortOffset); 981 982 spin_lock_irqsave(&priv->lock, flags); 983 984 /* Read low level stats */ 985 MACvReadMIBCounter(priv->PortOffset, &mib_counter); 986 987 low_stats->dot11RTSSuccessCount += mib_counter & 0xff; 988 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff; 989 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff; 990 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff; 991 992 /* 993 * TBD.... 994 * Must do this after doing rx/tx, cause ISR bit is slow 995 * than RD/TD write back 996 * update ISR counter 997 */ 998 while (isr && priv->vif) { 999 MACvWriteISR(priv->PortOffset, isr); 1000 1001 if (isr & ISR_FETALERR) { 1002 pr_debug(" ISR_FETALERR\n"); 1003 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0); 1004 VNSvOutPortW(priv->PortOffset + 1005 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI); 1006 device_error(priv, isr); 1007 } 1008 1009 if (isr & ISR_TBTT) { 1010 if (priv->op_mode != NL80211_IFTYPE_ADHOC) 1011 vnt_check_bb_vga(priv); 1012 1013 priv->bBeaconSent = false; 1014 if (priv->bEnablePSMode) 1015 PSbIsNextTBTTWakeUp((void *)priv); 1016 1017 if ((priv->op_mode == NL80211_IFTYPE_AP || 1018 priv->op_mode == NL80211_IFTYPE_ADHOC) && 1019 priv->vif->bss_conf.enable_beacon) { 1020 MACvOneShotTimer1MicroSec(priv, 1021 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10); 1022 } 1023 1024 /* TODO: adhoc PS mode */ 1025 1026 } 1027 1028 if (isr & ISR_BNTX) { 1029 if (priv->op_mode == NL80211_IFTYPE_ADHOC) { 1030 priv->bIsBeaconBufReadySet = false; 1031 priv->cbBeaconBufReadySetCnt = 0; 1032 } 1033 1034 priv->bBeaconSent = true; 1035 } 1036 1037 if (isr & ISR_RXDMA0) 1038 max_count += device_rx_srv(priv, TYPE_RXDMA0); 1039 1040 if (isr & ISR_RXDMA1) 1041 max_count += device_rx_srv(priv, TYPE_RXDMA1); 1042 1043 if (isr & ISR_TXDMA0) 1044 max_count += device_tx_srv(priv, TYPE_TXDMA0); 1045 1046 if (isr & ISR_AC0DMA) 1047 max_count += device_tx_srv(priv, TYPE_AC0DMA); 1048 1049 if (isr & ISR_SOFTTIMER1) { 1050 if (priv->vif->bss_conf.enable_beacon) 1051 vnt_beacon_make(priv, priv->vif); 1052 } 1053 1054 /* If both buffers available wake the queue */ 1055 if (AVAIL_TD(priv, TYPE_TXDMA0) && 1056 AVAIL_TD(priv, TYPE_AC0DMA) && 1057 ieee80211_queue_stopped(priv->hw, 0)) 1058 ieee80211_wake_queues(priv->hw); 1059 1060 MACvReadISR(priv->PortOffset, &isr); 1061 1062 MACvReceive0(priv->PortOffset); 1063 MACvReceive1(priv->PortOffset); 1064 1065 if (max_count > priv->opts.int_works) 1066 break; 1067 } 1068 1069 spin_unlock_irqrestore(&priv->lock, flags); 1070 1071 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); 1072 } 1073 1074 static void vnt_interrupt_work(struct work_struct *work) 1075 { 1076 struct vnt_private *priv = 1077 container_of(work, struct vnt_private, interrupt_work); 1078 1079 if (priv->vif) 1080 vnt_interrupt_process(priv); 1081 } 1082 1083 static irqreturn_t vnt_interrupt(int irq, void *arg) 1084 { 1085 struct vnt_private *priv = arg; 1086 1087 if (priv->vif) 1088 schedule_work(&priv->interrupt_work); 1089 1090 return IRQ_HANDLED; 1091 } 1092 1093 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb) 1094 { 1095 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1096 struct vnt_tx_desc *head_td; 1097 u32 dma_idx; 1098 unsigned long flags; 1099 1100 spin_lock_irqsave(&priv->lock, flags); 1101 1102 if (ieee80211_is_data(hdr->frame_control)) 1103 dma_idx = TYPE_AC0DMA; 1104 else 1105 dma_idx = TYPE_TXDMA0; 1106 1107 if (AVAIL_TD(priv, dma_idx) < 1) { 1108 spin_unlock_irqrestore(&priv->lock, flags); 1109 ieee80211_stop_queues(priv->hw); 1110 return -ENOMEM; 1111 } 1112 1113 head_td = priv->apCurrTD[dma_idx]; 1114 1115 head_td->td1.tcr = 0; 1116 1117 head_td->td_info->skb = skb; 1118 1119 if (dma_idx == TYPE_AC0DMA) 1120 head_td->td_info->flags = TD_FLAGS_NETIF_SKB; 1121 1122 priv->apCurrTD[dma_idx] = head_td->next; 1123 1124 spin_unlock_irqrestore(&priv->lock, flags); 1125 1126 vnt_generate_fifo_header(priv, dma_idx, head_td, skb); 1127 1128 spin_lock_irqsave(&priv->lock, flags); 1129 1130 priv->bPWBitOn = false; 1131 1132 /* Set TSR1 & ReqCount in TxDescHead */ 1133 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU); 1134 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count); 1135 1136 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma); 1137 1138 /* Poll Transmit the adapter */ 1139 wmb(); 1140 head_td->td0.owner = OWNED_BY_NIC; 1141 wmb(); /* second memory barrier */ 1142 1143 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB) 1144 MACvTransmitAC0(priv->PortOffset); 1145 else 1146 MACvTransmit0(priv->PortOffset); 1147 1148 priv->iTDUsed[dma_idx]++; 1149 1150 spin_unlock_irqrestore(&priv->lock, flags); 1151 1152 return 0; 1153 } 1154 1155 static void vnt_tx_80211(struct ieee80211_hw *hw, 1156 struct ieee80211_tx_control *control, 1157 struct sk_buff *skb) 1158 { 1159 struct vnt_private *priv = hw->priv; 1160 1161 if (vnt_tx_packet(priv, skb)) 1162 ieee80211_free_txskb(hw, skb); 1163 } 1164 1165 static int vnt_start(struct ieee80211_hw *hw) 1166 { 1167 struct vnt_private *priv = hw->priv; 1168 int ret; 1169 1170 priv->rx_buf_sz = PKT_BUF_SZ; 1171 if (!device_init_rings(priv)) 1172 return -ENOMEM; 1173 1174 ret = request_irq(priv->pcid->irq, vnt_interrupt, 1175 IRQF_SHARED, "vt6655", priv); 1176 if (ret) { 1177 dev_dbg(&priv->pcid->dev, "failed to start irq\n"); 1178 return ret; 1179 } 1180 1181 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n"); 1182 device_init_rd0_ring(priv); 1183 device_init_rd1_ring(priv); 1184 device_init_td0_ring(priv); 1185 device_init_td1_ring(priv); 1186 1187 device_init_registers(priv); 1188 1189 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n"); 1190 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); 1191 1192 ieee80211_wake_queues(hw); 1193 1194 return 0; 1195 } 1196 1197 static void vnt_stop(struct ieee80211_hw *hw) 1198 { 1199 struct vnt_private *priv = hw->priv; 1200 1201 ieee80211_stop_queues(hw); 1202 1203 cancel_work_sync(&priv->interrupt_work); 1204 1205 MACbShutdown(priv); 1206 MACbSoftwareReset(priv); 1207 CARDbRadioPowerOff(priv); 1208 1209 device_free_td0_ring(priv); 1210 device_free_td1_ring(priv); 1211 device_free_rd0_ring(priv); 1212 device_free_rd1_ring(priv); 1213 device_free_rings(priv); 1214 1215 free_irq(priv->pcid->irq, priv); 1216 } 1217 1218 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1219 { 1220 struct vnt_private *priv = hw->priv; 1221 1222 priv->vif = vif; 1223 1224 switch (vif->type) { 1225 case NL80211_IFTYPE_STATION: 1226 break; 1227 case NL80211_IFTYPE_ADHOC: 1228 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); 1229 1230 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1231 1232 break; 1233 case NL80211_IFTYPE_AP: 1234 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); 1235 1236 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); 1237 1238 break; 1239 default: 1240 return -EOPNOTSUPP; 1241 } 1242 1243 priv->op_mode = vif->type; 1244 1245 return 0; 1246 } 1247 1248 static void vnt_remove_interface(struct ieee80211_hw *hw, 1249 struct ieee80211_vif *vif) 1250 { 1251 struct vnt_private *priv = hw->priv; 1252 1253 switch (vif->type) { 1254 case NL80211_IFTYPE_STATION: 1255 break; 1256 case NL80211_IFTYPE_ADHOC: 1257 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1258 MACvRegBitsOff(priv->PortOffset, 1259 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1260 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1261 break; 1262 case NL80211_IFTYPE_AP: 1263 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1264 MACvRegBitsOff(priv->PortOffset, 1265 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1266 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); 1267 break; 1268 default: 1269 break; 1270 } 1271 1272 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED; 1273 } 1274 1275 1276 static int vnt_config(struct ieee80211_hw *hw, u32 changed) 1277 { 1278 struct vnt_private *priv = hw->priv; 1279 struct ieee80211_conf *conf = &hw->conf; 1280 u8 bb_type; 1281 1282 if (changed & IEEE80211_CONF_CHANGE_PS) { 1283 if (conf->flags & IEEE80211_CONF_PS) 1284 PSvEnablePowerSaving(priv, conf->listen_interval); 1285 else 1286 PSvDisablePowerSaving(priv); 1287 } 1288 1289 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || 1290 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) { 1291 set_channel(priv, conf->chandef.chan); 1292 1293 if (conf->chandef.chan->band == NL80211_BAND_5GHZ) 1294 bb_type = BB_TYPE_11A; 1295 else 1296 bb_type = BB_TYPE_11G; 1297 1298 if (priv->byBBType != bb_type) { 1299 priv->byBBType = bb_type; 1300 1301 CARDbSetPhyParameter(priv, priv->byBBType); 1302 } 1303 } 1304 1305 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1306 if (priv->byBBType == BB_TYPE_11B) 1307 priv->wCurrentRate = RATE_1M; 1308 else 1309 priv->wCurrentRate = RATE_54M; 1310 1311 RFbSetPower(priv, priv->wCurrentRate, 1312 conf->chandef.chan->hw_value); 1313 } 1314 1315 return 0; 1316 } 1317 1318 static void vnt_bss_info_changed(struct ieee80211_hw *hw, 1319 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf, 1320 u32 changed) 1321 { 1322 struct vnt_private *priv = hw->priv; 1323 1324 priv->current_aid = conf->aid; 1325 1326 if (changed & BSS_CHANGED_BSSID && conf->bssid) { 1327 unsigned long flags; 1328 1329 spin_lock_irqsave(&priv->lock, flags); 1330 1331 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid); 1332 1333 spin_unlock_irqrestore(&priv->lock, flags); 1334 } 1335 1336 if (changed & BSS_CHANGED_BASIC_RATES) { 1337 priv->basic_rates = conf->basic_rates; 1338 1339 CARDvUpdateBasicTopRate(priv); 1340 1341 dev_dbg(&priv->pcid->dev, 1342 "basic rates %x\n", conf->basic_rates); 1343 } 1344 1345 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 1346 if (conf->use_short_preamble) { 1347 MACvEnableBarkerPreambleMd(priv->PortOffset); 1348 priv->byPreambleType = true; 1349 } else { 1350 MACvDisableBarkerPreambleMd(priv->PortOffset); 1351 priv->byPreambleType = false; 1352 } 1353 } 1354 1355 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 1356 if (conf->use_cts_prot) 1357 MACvEnableProtectMD(priv->PortOffset); 1358 else 1359 MACvDisableProtectMD(priv->PortOffset); 1360 } 1361 1362 if (changed & BSS_CHANGED_ERP_SLOT) { 1363 if (conf->use_short_slot) 1364 priv->bShortSlotTime = true; 1365 else 1366 priv->bShortSlotTime = false; 1367 1368 CARDbSetPhyParameter(priv, priv->byBBType); 1369 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]); 1370 } 1371 1372 if (changed & BSS_CHANGED_TXPOWER) 1373 RFbSetPower(priv, priv->wCurrentRate, 1374 conf->chandef.chan->hw_value); 1375 1376 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1377 dev_dbg(&priv->pcid->dev, 1378 "Beacon enable %d\n", conf->enable_beacon); 1379 1380 if (conf->enable_beacon) { 1381 vnt_beacon_enable(priv, vif, conf); 1382 1383 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR, 1384 TCR_AUTOBCNTX); 1385 } else { 1386 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, 1387 TCR_AUTOBCNTX); 1388 } 1389 } 1390 1391 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) && 1392 priv->op_mode != NL80211_IFTYPE_AP) { 1393 if (conf->assoc && conf->beacon_rate) { 1394 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value, 1395 conf->sync_tsf); 1396 1397 CARDbSetBeaconPeriod(priv, conf->beacon_int); 1398 1399 CARDvSetFirstNextTBTT(priv, conf->beacon_int); 1400 } else { 1401 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, 1402 TFTCTL_TSFCNTRST); 1403 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, 1404 TFTCTL_TSFCNTREN); 1405 } 1406 } 1407 } 1408 1409 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw, 1410 struct netdev_hw_addr_list *mc_list) 1411 { 1412 struct vnt_private *priv = hw->priv; 1413 struct netdev_hw_addr *ha; 1414 u64 mc_filter = 0; 1415 u32 bit_nr = 0; 1416 1417 netdev_hw_addr_list_for_each(ha, mc_list) { 1418 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; 1419 1420 mc_filter |= 1ULL << (bit_nr & 0x3f); 1421 } 1422 1423 priv->mc_list_count = mc_list->count; 1424 1425 return mc_filter; 1426 } 1427 1428 static void vnt_configure(struct ieee80211_hw *hw, 1429 unsigned int changed_flags, unsigned int *total_flags, u64 multicast) 1430 { 1431 struct vnt_private *priv = hw->priv; 1432 u8 rx_mode = 0; 1433 1434 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC; 1435 1436 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode); 1437 1438 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode); 1439 1440 if (changed_flags & FIF_ALLMULTI) { 1441 if (*total_flags & FIF_ALLMULTI) { 1442 unsigned long flags; 1443 1444 spin_lock_irqsave(&priv->lock, flags); 1445 1446 if (priv->mc_list_count > 2) { 1447 MACvSelectPage1(priv->PortOffset); 1448 1449 VNSvOutPortD(priv->PortOffset + 1450 MAC_REG_MAR0, 0xffffffff); 1451 VNSvOutPortD(priv->PortOffset + 1452 MAC_REG_MAR0 + 4, 0xffffffff); 1453 1454 MACvSelectPage0(priv->PortOffset); 1455 } else { 1456 MACvSelectPage1(priv->PortOffset); 1457 1458 VNSvOutPortD(priv->PortOffset + 1459 MAC_REG_MAR0, (u32)multicast); 1460 VNSvOutPortD(priv->PortOffset + 1461 MAC_REG_MAR0 + 4, 1462 (u32)(multicast >> 32)); 1463 1464 MACvSelectPage0(priv->PortOffset); 1465 } 1466 1467 spin_unlock_irqrestore(&priv->lock, flags); 1468 1469 rx_mode |= RCR_MULTICAST | RCR_BROADCAST; 1470 } else { 1471 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST); 1472 } 1473 } 1474 1475 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) { 1476 rx_mode |= RCR_MULTICAST | RCR_BROADCAST; 1477 1478 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) 1479 rx_mode &= ~RCR_BSSID; 1480 else 1481 rx_mode |= RCR_BSSID; 1482 } 1483 1484 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode); 1485 1486 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode); 1487 } 1488 1489 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 1490 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 1491 struct ieee80211_key_conf *key) 1492 { 1493 struct vnt_private *priv = hw->priv; 1494 1495 switch (cmd) { 1496 case SET_KEY: 1497 if (vnt_set_keys(hw, sta, vif, key)) 1498 return -EOPNOTSUPP; 1499 break; 1500 case DISABLE_KEY: 1501 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) 1502 clear_bit(key->hw_key_idx, &priv->key_entry_inuse); 1503 default: 1504 break; 1505 } 1506 1507 return 0; 1508 } 1509 1510 static int vnt_get_stats(struct ieee80211_hw *hw, 1511 struct ieee80211_low_level_stats *stats) 1512 { 1513 struct vnt_private *priv = hw->priv; 1514 1515 memcpy(stats, &priv->low_stats, sizeof(*stats)); 1516 1517 return 0; 1518 } 1519 1520 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1521 { 1522 struct vnt_private *priv = hw->priv; 1523 u64 tsf; 1524 1525 CARDbGetCurrentTSF(priv, &tsf); 1526 1527 return tsf; 1528 } 1529 1530 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1531 u64 tsf) 1532 { 1533 struct vnt_private *priv = hw->priv; 1534 1535 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int); 1536 } 1537 1538 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1539 { 1540 struct vnt_private *priv = hw->priv; 1541 1542 /* reset TSF counter */ 1543 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1544 } 1545 1546 static const struct ieee80211_ops vnt_mac_ops = { 1547 .tx = vnt_tx_80211, 1548 .start = vnt_start, 1549 .stop = vnt_stop, 1550 .add_interface = vnt_add_interface, 1551 .remove_interface = vnt_remove_interface, 1552 .config = vnt_config, 1553 .bss_info_changed = vnt_bss_info_changed, 1554 .prepare_multicast = vnt_prepare_multicast, 1555 .configure_filter = vnt_configure, 1556 .set_key = vnt_set_key, 1557 .get_stats = vnt_get_stats, 1558 .get_tsf = vnt_get_tsf, 1559 .set_tsf = vnt_set_tsf, 1560 .reset_tsf = vnt_reset_tsf, 1561 }; 1562 1563 static int vnt_init(struct vnt_private *priv) 1564 { 1565 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr); 1566 1567 vnt_init_bands(priv); 1568 1569 if (ieee80211_register_hw(priv->hw)) 1570 return -ENODEV; 1571 1572 priv->mac_hw = true; 1573 1574 CARDbRadioPowerOff(priv); 1575 1576 return 0; 1577 } 1578 1579 static int 1580 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) 1581 { 1582 struct vnt_private *priv; 1583 struct ieee80211_hw *hw; 1584 struct wiphy *wiphy; 1585 int rc; 1586 1587 dev_notice(&pcid->dev, 1588 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION); 1589 1590 dev_notice(&pcid->dev, 1591 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n"); 1592 1593 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops); 1594 if (!hw) { 1595 dev_err(&pcid->dev, "could not register ieee80211_hw\n"); 1596 return -ENOMEM; 1597 } 1598 1599 priv = hw->priv; 1600 priv->pcid = pcid; 1601 1602 spin_lock_init(&priv->lock); 1603 1604 priv->hw = hw; 1605 1606 SET_IEEE80211_DEV(priv->hw, &pcid->dev); 1607 1608 if (pci_enable_device(pcid)) { 1609 device_free_info(priv); 1610 return -ENODEV; 1611 } 1612 1613 dev_dbg(&pcid->dev, 1614 "Before get pci_info memaddr is %x\n", priv->memaddr); 1615 1616 pci_set_master(pcid); 1617 1618 priv->memaddr = pci_resource_start(pcid, 0); 1619 priv->ioaddr = pci_resource_start(pcid, 1); 1620 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK, 1621 256); 1622 if (!priv->PortOffset) { 1623 dev_err(&pcid->dev, ": Failed to IO remapping ..\n"); 1624 device_free_info(priv); 1625 return -ENODEV; 1626 } 1627 1628 rc = pci_request_regions(pcid, DEVICE_NAME); 1629 if (rc) { 1630 dev_err(&pcid->dev, ": Failed to find PCI device\n"); 1631 device_free_info(priv); 1632 return -ENODEV; 1633 } 1634 1635 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) { 1636 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n"); 1637 device_free_info(priv); 1638 return -ENODEV; 1639 } 1640 1641 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work); 1642 1643 /* do reset */ 1644 if (!MACbSoftwareReset(priv)) { 1645 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n"); 1646 device_free_info(priv); 1647 return -ENODEV; 1648 } 1649 /* initial to reload eeprom */ 1650 MACvInitialize(priv); 1651 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 1652 1653 /* Get RFType */ 1654 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE); 1655 priv->byRFType &= RF_MASK; 1656 1657 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType); 1658 1659 device_get_options(priv); 1660 device_set_options(priv); 1661 1662 wiphy = priv->hw->wiphy; 1663 1664 wiphy->frag_threshold = FRAG_THRESH_DEF; 1665 wiphy->rts_threshold = RTS_THRESH_DEF; 1666 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1667 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP); 1668 1669 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY); 1670 ieee80211_hw_set(priv->hw, SIGNAL_DBM); 1671 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS); 1672 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS); 1673 ieee80211_hw_set(priv->hw, SUPPORTS_PS); 1674 1675 priv->hw->max_signal = 100; 1676 1677 if (vnt_init(priv)) 1678 return -ENODEV; 1679 1680 device_print_info(priv); 1681 pci_set_drvdata(pcid, priv); 1682 1683 return 0; 1684 } 1685 1686 /*------------------------------------------------------------------*/ 1687 1688 #ifdef CONFIG_PM 1689 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state) 1690 { 1691 struct vnt_private *priv = pci_get_drvdata(pcid); 1692 unsigned long flags; 1693 1694 spin_lock_irqsave(&priv->lock, flags); 1695 1696 pci_save_state(pcid); 1697 1698 MACbShutdown(priv); 1699 1700 pci_disable_device(pcid); 1701 pci_set_power_state(pcid, pci_choose_state(pcid, state)); 1702 1703 spin_unlock_irqrestore(&priv->lock, flags); 1704 1705 return 0; 1706 } 1707 1708 static int vt6655_resume(struct pci_dev *pcid) 1709 { 1710 1711 pci_set_power_state(pcid, PCI_D0); 1712 pci_enable_wake(pcid, PCI_D0, 0); 1713 pci_restore_state(pcid); 1714 1715 return 0; 1716 } 1717 #endif 1718 1719 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table); 1720 1721 static struct pci_driver device_driver = { 1722 .name = DEVICE_NAME, 1723 .id_table = vt6655_pci_id_table, 1724 .probe = vt6655_probe, 1725 .remove = vt6655_remove, 1726 #ifdef CONFIG_PM 1727 .suspend = vt6655_suspend, 1728 .resume = vt6655_resume, 1729 #endif 1730 }; 1731 1732 module_pci_driver(device_driver); 1733